2 * pic18f4331.c - device specific definitions
4 * This file is part of the GNU PIC library for SDCC,
5 * originally devised by Vangelis Rokas <vrokas AT otenet.gr>
7 * It has been automatically generated by inc2h-pic16.pl,
8 * (c) 2007 by Raphael Neider <rneider AT web.de>
11 #include <pic18f4331.h>
14 __sfr __at (0xF60) DFLTCON;
15 volatile __DFLTCONbits_t __at (0xF60) DFLTCONbits;
17 __sfr __at (0xF61) CAP3CON;
18 volatile __CAP3CONbits_t __at (0xF61) CAP3CONbits;
20 __sfr __at (0xF62) CAP2CON;
21 volatile __CAP2CONbits_t __at (0xF62) CAP2CONbits;
23 __sfr __at (0xF63) CAP1CON;
24 volatile __CAP1CONbits_t __at (0xF63) CAP1CONbits;
26 __sfr __at (0xF64) CAP3BUFL;
28 __sfr __at (0xF64) MAXCNTL;
30 __sfr __at (0xF65) CAP3BUFH;
32 __sfr __at (0xF65) MAXCNTH;
34 __sfr __at (0xF66) CAP2BUFL;
36 __sfr __at (0xF66) POSCNTL;
38 __sfr __at (0xF67) CAP2BUFH;
40 __sfr __at (0xF67) POSCNTH;
42 __sfr __at (0xF68) CAP1BUFL;
44 __sfr __at (0xF68) VELRL;
46 __sfr __at (0xF69) CAP1BUFH;
48 __sfr __at (0xF69) VELRH;
50 __sfr __at (0xF6A) OVDCONS;
51 volatile __OVDCONSbits_t __at (0xF6A) OVDCONSbits;
53 __sfr __at (0xF6B) OVDCOND;
54 volatile __OVDCONDbits_t __at (0xF6B) OVDCONDbits;
56 __sfr __at (0xF6C) FLTCONFIG;
57 volatile __FLTCONFIGbits_t __at (0xF6C) FLTCONFIGbits;
59 __sfr __at (0xF6D) DTCON;
60 volatile __DTCONbits_t __at (0xF6D) DTCONbits;
62 __sfr __at (0xF6E) PWMCON1;
63 volatile __PWMCON1bits_t __at (0xF6E) PWMCON1bits;
65 __sfr __at (0xF6F) PWMCON0;
66 volatile __PWMCON0bits_t __at (0xF6F) PWMCON0bits;
68 __sfr __at (0xF70) SEVTCMPH;
70 __sfr __at (0xF71) SEVTCMPL;
72 __sfr __at (0xF72) PDC3H;
74 __sfr __at (0xF73) PDC3L;
76 __sfr __at (0xF74) PDC2H;
78 __sfr __at (0xF75) PDC2L;
80 __sfr __at (0xF76) PDC1H;
82 __sfr __at (0xF77) PDC1L;
84 __sfr __at (0xF78) PDC0H;
86 __sfr __at (0xF79) PDC0L;
88 __sfr __at (0xF7A) PTPERH;
90 __sfr __at (0xF7B) PTPERL;
92 __sfr __at (0xF7C) PTMRH;
94 __sfr __at (0xF7D) PTMRL;
96 __sfr __at (0xF7E) PTCON1;
97 volatile __PTCON1bits_t __at (0xF7E) PTCON1bits;
99 __sfr __at (0xF7F) PTCON0;
100 volatile __PTCON0bits_t __at (0xF7F) PTCON0bits;
102 __sfr __at (0xF80) PORTA;
103 volatile __PORTAbits_t __at (0xF80) PORTAbits;
105 __sfr __at (0xF81) PORTB;
106 volatile __PORTBbits_t __at (0xF81) PORTBbits;
108 __sfr __at (0xF82) PORTC;
109 volatile __PORTCbits_t __at (0xF82) PORTCbits;
111 __sfr __at (0xF83) PORTD;
112 volatile __PORTDbits_t __at (0xF83) PORTDbits;
114 __sfr __at (0xF84) PORTE;
115 volatile __PORTEbits_t __at (0xF84) PORTEbits;
117 __sfr __at (0xF87) TMR5L;
119 __sfr __at (0xF88) TMR5H;
121 __sfr __at (0xF89) LATA;
122 volatile __LATAbits_t __at (0xF89) LATAbits;
124 __sfr __at (0xF8A) LATB;
125 volatile __LATBbits_t __at (0xF8A) LATBbits;
127 __sfr __at (0xF8B) LATC;
128 volatile __LATCbits_t __at (0xF8B) LATCbits;
130 __sfr __at (0xF8C) LATD;
131 volatile __LATDbits_t __at (0xF8C) LATDbits;
133 __sfr __at (0xF8D) LATE;
134 volatile __LATEbits_t __at (0xF8D) LATEbits;
136 __sfr __at (0xF90) PR5L;
138 __sfr __at (0xF91) PR5H;
140 __sfr __at (0xF92) DDRA;
141 volatile __DDRAbits_t __at (0xF92) DDRAbits;
143 __sfr __at (0xF92) TRISA;
144 volatile __TRISAbits_t __at (0xF92) TRISAbits;
146 __sfr __at (0xF93) DDRB;
147 volatile __DDRBbits_t __at (0xF93) DDRBbits;
149 __sfr __at (0xF93) TRISB;
150 volatile __TRISBbits_t __at (0xF93) TRISBbits;
152 __sfr __at (0xF94) DDRC;
153 volatile __DDRCbits_t __at (0xF94) DDRCbits;
155 __sfr __at (0xF94) TRISC;
156 volatile __TRISCbits_t __at (0xF94) TRISCbits;
158 __sfr __at (0xF95) DDRD;
159 volatile __DDRDbits_t __at (0xF95) DDRDbits;
161 __sfr __at (0xF95) TRISD;
162 volatile __TRISDbits_t __at (0xF95) TRISDbits;
164 __sfr __at (0xF96) DDRE;
165 volatile __DDREbits_t __at (0xF96) DDREbits;
167 __sfr __at (0xF96) TRISE;
168 volatile __TRISEbits_t __at (0xF96) TRISEbits;
170 __sfr __at (0xF99) ADCHS;
171 volatile __ADCHSbits_t __at (0xF99) ADCHSbits;
173 __sfr __at (0xF9A) ADCON3;
174 volatile __ADCON3bits_t __at (0xF9A) ADCON3bits;
176 __sfr __at (0xF9B) OSCTUNE;
177 volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits;
179 __sfr __at (0xF9D) PIE1;
180 volatile __PIE1bits_t __at (0xF9D) PIE1bits;
182 __sfr __at (0xF9E) PIR1;
183 volatile __PIR1bits_t __at (0xF9E) PIR1bits;
185 __sfr __at (0xF9F) IPR1;
186 volatile __IPR1bits_t __at (0xF9F) IPR1bits;
188 __sfr __at (0xFA0) PIE2;
189 volatile __PIE2bits_t __at (0xFA0) PIE2bits;
191 __sfr __at (0xFA1) PIR2;
192 volatile __PIR2bits_t __at (0xFA1) PIR2bits;
194 __sfr __at (0xFA2) IPR2;
195 volatile __IPR2bits_t __at (0xFA2) IPR2bits;
197 __sfr __at (0xFA3) PIE3;
198 volatile __PIE3bits_t __at (0xFA3) PIE3bits;
200 __sfr __at (0xFA4) PIR3;
201 volatile __PIR3bits_t __at (0xFA4) PIR3bits;
203 __sfr __at (0xFA5) IPR3;
204 volatile __IPR3bits_t __at (0xFA5) IPR3bits;
206 __sfr __at (0xFA6) EECON1;
207 volatile __EECON1bits_t __at (0xFA6) EECON1bits;
209 __sfr __at (0xFA7) EECON2;
211 __sfr __at (0xFA8) EEDATA;
213 __sfr __at (0xFA9) EEADR;
215 __sfr __at (0xFAA) BAUDCON;
216 volatile __BAUDCONbits_t __at (0xFAA) BAUDCONbits;
218 __sfr __at (0xFAA) BAUDCTL;
219 volatile __BAUDCTLbits_t __at (0xFAA) BAUDCTLbits;
221 __sfr __at (0xFAB) RCSTA;
222 volatile __RCSTAbits_t __at (0xFAB) RCSTAbits;
224 __sfr __at (0xFAC) TXSTA;
225 volatile __TXSTAbits_t __at (0xFAC) TXSTAbits;
227 __sfr __at (0xFAD) TXREG;
229 __sfr __at (0xFAE) RCREG;
231 __sfr __at (0xFAF) SPBRG;
233 __sfr __at (0xFB0) SPBRGH;
235 __sfr __at (0xFB6) QEICON;
236 volatile __QEICONbits_t __at (0xFB6) QEICONbits;
238 __sfr __at (0xFB7) T5CON;
239 volatile __T5CONbits_t __at (0xFB7) T5CONbits;
241 __sfr __at (0xFB8) ANSEL0;
242 volatile __ANSEL0bits_t __at (0xFB8) ANSEL0bits;
244 __sfr __at (0xFB9) ANSEL1;
245 volatile __ANSEL1bits_t __at (0xFB9) ANSEL1bits;
247 __sfr __at (0xFBA) CCP2CON;
248 volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits;
250 __sfr __at (0xFBB) CCPR2;
252 __sfr __at (0xFBB) CCPR2L;
254 __sfr __at (0xFBC) CCPR2H;
256 __sfr __at (0xFBD) CCP1CON;
257 volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits;
259 __sfr __at (0xFBE) CCPR1;
261 __sfr __at (0xFBE) CCPR1L;
263 __sfr __at (0xFBF) CCPR1H;
265 __sfr __at (0xFC0) ADCON2;
266 volatile __ADCON2bits_t __at (0xFC0) ADCON2bits;
268 __sfr __at (0xFC1) ADCON1;
269 volatile __ADCON1bits_t __at (0xFC1) ADCON1bits;
271 __sfr __at (0xFC2) ADCON0;
272 volatile __ADCON0bits_t __at (0xFC2) ADCON0bits;
274 __sfr __at (0xFC3) ADRES;
276 __sfr __at (0xFC3) ADRESL;
278 __sfr __at (0xFC4) ADRESH;
280 __sfr __at (0xFC6) SSPCON;
281 volatile __SSPCONbits_t __at (0xFC6) SSPCONbits;
283 __sfr __at (0xFC7) SSPSTAT;
284 volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits;
286 __sfr __at (0xFC8) SSPADD;
288 __sfr __at (0xFC9) SSPBUF;
290 __sfr __at (0xFCA) T2CON;
291 volatile __T2CONbits_t __at (0xFCA) T2CONbits;
293 __sfr __at (0xFCB) PR2;
295 __sfr __at (0xFCC) TMR2;
297 __sfr __at (0xFCD) T1CON;
298 volatile __T1CONbits_t __at (0xFCD) T1CONbits;
300 __sfr __at (0xFCE) TMR1L;
302 __sfr __at (0xFCF) TMR1H;
304 __sfr __at (0xFD0) RCON;
305 volatile __RCONbits_t __at (0xFD0) RCONbits;
307 __sfr __at (0xFD1) WDTCON;
308 volatile __WDTCONbits_t __at (0xFD1) WDTCONbits;
310 __sfr __at (0xFD2) LVDCON;
311 volatile __LVDCONbits_t __at (0xFD2) LVDCONbits;
313 __sfr __at (0xFD3) OSCCON;
314 volatile __OSCCONbits_t __at (0xFD3) OSCCONbits;
316 __sfr __at (0xFD5) T0CON;
317 volatile __T0CONbits_t __at (0xFD5) T0CONbits;
319 __sfr __at (0xFD6) TMR0L;
321 __sfr __at (0xFD7) TMR0H;
323 __sfr __at (0xFD8) STATUS;
324 volatile __STATUSbits_t __at (0xFD8) STATUSbits;
326 __sfr __at (0xFD9) FSR2L;
328 __sfr __at (0xFDA) FSR2H;
330 __sfr __at (0xFDB) PLUSW2;
332 __sfr __at (0xFDC) PREINC2;
334 __sfr __at (0xFDD) POSTDEC2;
336 __sfr __at (0xFDE) POSTINC2;
338 __sfr __at (0xFDF) INDF2;
340 __sfr __at (0xFE0) BSR;
342 __sfr __at (0xFE1) FSR1L;
344 __sfr __at (0xFE2) FSR1H;
346 __sfr __at (0xFE3) PLUSW1;
348 __sfr __at (0xFE4) PREINC1;
350 __sfr __at (0xFE5) POSTDEC1;
352 __sfr __at (0xFE6) POSTINC1;
354 __sfr __at (0xFE7) INDF1;
356 __sfr __at (0xFE8) WREG;
358 __sfr __at (0xFE9) FSR0L;
360 __sfr __at (0xFEA) FSR0H;
362 __sfr __at (0xFEB) PLUSW0;
364 __sfr __at (0xFEC) PREINC0;
366 __sfr __at (0xFED) POSTDEC0;
368 __sfr __at (0xFEE) POSTINC0;
370 __sfr __at (0xFEF) INDF0;
372 __sfr __at (0xFF0) INTCON3;
373 volatile __INTCON3bits_t __at (0xFF0) INTCON3bits;
375 __sfr __at (0xFF1) INTCON2;
376 volatile __INTCON2bits_t __at (0xFF1) INTCON2bits;
378 __sfr __at (0xFF2) INTCON;
379 volatile __INTCONbits_t __at (0xFF2) INTCONbits;
381 __sfr __at (0xFF3) PROD;
383 __sfr __at (0xFF3) PRODL;
385 __sfr __at (0xFF4) PRODH;
387 __sfr __at (0xFF5) TABLAT;
389 __sfr __at (0xFF6) TBLPTR;
391 __sfr __at (0xFF6) TBLPTRL;
393 __sfr __at (0xFF7) TBLPTRH;
395 __sfr __at (0xFF8) TBLPTRU;
397 __sfr __at (0xFF9) PC;
399 __sfr __at (0xFF9) PCL;
401 __sfr __at (0xFFA) PCLATH;
403 __sfr __at (0xFFB) PCLATU;
405 __sfr __at (0xFFC) STKPTR;
406 volatile __STKPTRbits_t __at (0xFFC) STKPTRbits;
408 __sfr __at (0xFFD) TOS;
410 __sfr __at (0xFFD) TOSL;
412 __sfr __at (0xFFE) TOSH;
414 __sfr __at (0xFFF) TOSU;