1 /* Register definitions for pic16f917.
2 * This file was automatically generated by:
4 * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
8 __sfr __at (INDF_ADDR) INDF;
9 __sfr __at (TMR0_ADDR) TMR0;
10 __sfr __at (PCL_ADDR) PCL;
11 __sfr __at (STATUS_ADDR) STATUS;
12 __sfr __at (FSR_ADDR) FSR;
13 __sfr __at (PORTA_ADDR) PORTA;
14 __sfr __at (PORTB_ADDR) PORTB;
15 __sfr __at (PORTC_ADDR) PORTC;
16 __sfr __at (PORTD_ADDR) PORTD;
17 __sfr __at (PORTE_ADDR) PORTE;
18 __sfr __at (PCLATH_ADDR) PCLATH;
19 __sfr __at (INTCON_ADDR) INTCON;
20 __sfr __at (PIR1_ADDR) PIR1;
21 __sfr __at (PIR2_ADDR) PIR2;
22 __sfr __at (TMR1L_ADDR) TMR1L;
23 __sfr __at (TMR1H_ADDR) TMR1H;
24 __sfr __at (T1CON_ADDR) T1CON;
25 __sfr __at (TMR2_ADDR) TMR2;
26 __sfr __at (T2CON_ADDR) T2CON;
27 __sfr __at (SSPBUF_ADDR) SSPBUF;
28 __sfr __at (SSPCON_ADDR) SSPCON;
29 __sfr __at (CCPR1L_ADDR) CCPR1L;
30 __sfr __at (CCPR1H_ADDR) CCPR1H;
31 __sfr __at (CCP1CON_ADDR) CCP1CON;
32 __sfr __at (RCSTA_ADDR) RCSTA;
33 __sfr __at (TXREG_ADDR) TXREG;
34 __sfr __at (RCREG_ADDR) RCREG;
35 __sfr __at (CCPR2L_ADDR) CCPR2L;
36 __sfr __at (CCPR2H_ADDR) CCPR2H;
37 __sfr __at (CCP2CON_ADDR) CCP2CON;
38 __sfr __at (ADRESH_ADDR) ADRESH;
39 __sfr __at (ADCON0_ADDR) ADCON0;
40 __sfr __at (OPTION_REG_ADDR) OPTION_REG;
41 __sfr __at (TRISA_ADDR) TRISA;
42 __sfr __at (TRISB_ADDR) TRISB;
43 __sfr __at (TRISC_ADDR) TRISC;
44 __sfr __at (TRISD_ADDR) TRISD;
45 __sfr __at (TRISE_ADDR) TRISE;
46 __sfr __at (PIE1_ADDR) PIE1;
47 __sfr __at (PIE2_ADDR) PIE2;
48 __sfr __at (PCON_ADDR) PCON;
49 __sfr __at (OSCCON_ADDR) OSCCON;
50 __sfr __at (OSCTUNE_ADDR) OSCTUNE;
51 __sfr __at (ANSEL_ADDR) ANSEL;
52 __sfr __at (PR2_ADDR) PR2;
53 __sfr __at (SSPADD_ADDR) SSPADD;
54 __sfr __at (SSPSTAT_ADDR) SSPSTAT;
55 __sfr __at (WPUB_ADDR) WPUB;
56 __sfr __at (WPU_ADDR) WPU;
57 __sfr __at (IOCB_ADDR) IOCB;
58 __sfr __at (IOC_ADDR) IOC;
59 __sfr __at (CMCON1_ADDR) CMCON1;
60 __sfr __at (TXSTA_ADDR) TXSTA;
61 __sfr __at (SPBRG_ADDR) SPBRG;
62 __sfr __at (CMCON0_ADDR) CMCON0;
63 __sfr __at (VRCON_ADDR) VRCON;
64 __sfr __at (ADRESL_ADDR) ADRESL;
65 __sfr __at (ADCON1_ADDR) ADCON1;
66 __sfr __at (WDTCON_ADDR) WDTCON;
67 __sfr __at (LCDCON_ADDR) LCDCON;
68 __sfr __at (LCDPS_ADDR) LCDPS;
69 __sfr __at (LVDCON_ADDR) LVDCON;
70 __sfr __at (EEDATL_ADDR) EEDATL;
71 __sfr __at (EEADRL_ADDR) EEADRL;
72 __sfr __at (EEDATH_ADDR) EEDATH;
73 __sfr __at (EEADRH_ADDR) EEADRH;
74 __sfr __at (LCDDATA0_ADDR) LCDDATA0;
75 __sfr __at (LCDDATA1_ADDR) LCDDATA1;
76 __sfr __at (LCDDATA2_ADDR) LCDDATA2;
77 __sfr __at (LCDDATA3_ADDR) LCDDATA3;
78 __sfr __at (LCDDATA4_ADDR) LCDDATA4;
79 __sfr __at (LCDDATA5_ADDR) LCDDATA5;
80 __sfr __at (LCDDATA6_ADDR) LCDDATA6;
81 __sfr __at (LCDDATA7_ADDR) LCDDATA7;
82 __sfr __at (LCDDATA8_ADDR) LCDDATA8;
83 __sfr __at (LCDDATA9_ADDR) LCDDATA9;
84 __sfr __at (LCDDATA10_ADDR) LCDDATA10;
85 __sfr __at (LCDDATA11_ADDR) LCDDATA11;
86 __sfr __at (LCDSE0_ADDR) LCDSE0;
87 __sfr __at (LCDSE1_ADDR) LCDSE1;
88 __sfr __at (LCDSE2_ADDR) LCDSE2;
89 __sfr __at (EECON1_ADDR) EECON1;
90 __sfr __at (EECON2_ADDR) EECON2;
93 // bitfield definitions
95 volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
96 volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
97 volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
98 volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
99 volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
100 volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits;
101 volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits;
102 volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits;
103 volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits;
104 volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
105 volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
106 volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
107 volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits;
108 volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits;
109 volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits;
110 volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits;
111 volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits;
112 volatile __LCDDATA11_bits_t __at(LCDDATA11_ADDR) LCDDATA11_bits;
113 volatile __LCDDATA2_bits_t __at(LCDDATA2_ADDR) LCDDATA2_bits;
114 volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits;
115 volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits;
116 volatile __LCDDATA5_bits_t __at(LCDDATA5_ADDR) LCDDATA5_bits;
117 volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits;
118 volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits;
119 volatile __LCDDATA8_bits_t __at(LCDDATA8_ADDR) LCDDATA8_bits;
120 volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits;
121 volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits;
122 volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits;
123 volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits;
124 volatile __LCDSE2_bits_t __at(LCDSE2_ADDR) LCDSE2_bits;
125 volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits;
126 volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
127 volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits;
128 volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits;
129 volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
130 volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
131 volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
132 volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
133 volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
134 volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
135 volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
136 volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
137 volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
138 volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
139 volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
140 volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
141 volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
142 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
143 volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
144 volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
145 volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
146 volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
147 volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
148 volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
149 volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
150 volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
151 volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
152 volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits;
153 volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits;
154 volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits;
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