1 /* Register definitions for pic16f690.
2 * This file was automatically generated by:
4 * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
8 __sfr __at (INDF_ADDR) INDF;
9 __sfr __at (TMR0_ADDR) TMR0;
10 __sfr __at (PCL_ADDR) PCL;
11 __sfr __at (STATUS_ADDR) STATUS;
12 __sfr __at (FSR_ADDR) FSR;
13 __sfr __at (PORTA_ADDR) PORTA;
14 __sfr __at (PORTB_ADDR) PORTB;
15 __sfr __at (PORTC_ADDR) PORTC;
16 __sfr __at (PCLATH_ADDR) PCLATH;
17 __sfr __at (INTCON_ADDR) INTCON;
18 __sfr __at (PIR1_ADDR) PIR1;
19 __sfr __at (PIR2_ADDR) PIR2;
20 __sfr __at (TMR1L_ADDR) TMR1L;
21 __sfr __at (TMR1H_ADDR) TMR1H;
22 __sfr __at (T1CON_ADDR) T1CON;
23 __sfr __at (TMR2_ADDR) TMR2;
24 __sfr __at (T2CON_ADDR) T2CON;
25 __sfr __at (SSPBUF_ADDR) SSPBUF;
26 __sfr __at (SSPCON_ADDR) SSPCON;
27 __sfr __at (CCPR1L_ADDR) CCPR1L;
28 __sfr __at (CCPR1H_ADDR) CCPR1H;
29 __sfr __at (CCP1CON_ADDR) CCP1CON;
30 __sfr __at (RCSTA_ADDR) RCSTA;
31 __sfr __at (TXREG_ADDR) TXREG;
32 __sfr __at (RCREG_ADDR) RCREG;
33 __sfr __at (PWM1CON_ADDR) PWM1CON;
34 __sfr __at (ECCPAS_ADDR) ECCPAS;
35 __sfr __at (ADRESH_ADDR) ADRESH;
36 __sfr __at (ADCON0_ADDR) ADCON0;
37 __sfr __at (OPTION_REG_ADDR) OPTION_REG;
38 __sfr __at (TRISA_ADDR) TRISA;
39 __sfr __at (TRISB_ADDR) TRISB;
40 __sfr __at (TRISC_ADDR) TRISC;
41 __sfr __at (PIE1_ADDR) PIE1;
42 __sfr __at (PIE2_ADDR) PIE2;
43 __sfr __at (PCON_ADDR) PCON;
44 __sfr __at (OSCCON_ADDR) OSCCON;
45 __sfr __at (OSCTUNE_ADDR) OSCTUNE;
46 __sfr __at (PR2_ADDR) PR2;
47 __sfr __at (SSPADD_ADDR) SSPADD;
48 __sfr __at (MSK_ADDR) MSK;
49 __sfr __at (SSPMSK_ADDR) SSPMSK;
50 __sfr __at (SSPSTAT_ADDR) SSPSTAT;
51 __sfr __at (WPU_ADDR) WPU;
52 __sfr __at (WPUA_ADDR) WPUA;
53 __sfr __at (IOC_ADDR) IOC;
54 __sfr __at (IOCA_ADDR) IOCA;
55 __sfr __at (WDTCON_ADDR) WDTCON;
56 __sfr __at (TXSTA_ADDR) TXSTA;
57 __sfr __at (SPBRG_ADDR) SPBRG;
58 __sfr __at (SPBRGH_ADDR) SPBRGH;
59 __sfr __at (BAUDCTL_ADDR) BAUDCTL;
60 __sfr __at (ADRESL_ADDR) ADRESL;
61 __sfr __at (ADCON1_ADDR) ADCON1;
62 __sfr __at (EEDAT_ADDR) EEDAT;
63 __sfr __at (EEDATA_ADDR) EEDATA;
64 __sfr __at (EEADR_ADDR) EEADR;
65 __sfr __at (EEDATH_ADDR) EEDATH;
66 __sfr __at (EEADRH_ADDR) EEADRH;
67 __sfr __at (WPUB_ADDR) WPUB;
68 __sfr __at (IOCB_ADDR) IOCB;
69 __sfr __at (VRCON_ADDR) VRCON;
70 __sfr __at (CM1CON0_ADDR) CM1CON0;
71 __sfr __at (CM2CON0_ADDR) CM2CON0;
72 __sfr __at (CM2CON1_ADDR) CM2CON1;
73 __sfr __at (ANSEL_ADDR) ANSEL;
74 __sfr __at (ANSELH_ADDR) ANSELH;
75 __sfr __at (EECON1_ADDR) EECON1;
76 __sfr __at (EECON2_ADDR) EECON2;
77 __sfr __at (PSTRCON_ADDR) PSTRCON;
78 __sfr __at (SRCON_ADDR) SRCON;
81 // bitfield definitions
83 volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
84 volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
85 volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
86 volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits;
87 volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits;
88 volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
89 volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits;
90 volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits;
91 volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits;
92 volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits;
93 volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
94 volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
95 volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
96 volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits;
97 volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits;
98 volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
99 volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits;
100 volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits;
101 volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
102 volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
103 volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
104 volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
105 volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
106 volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
107 volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
108 volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
109 volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits;
110 volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits;
111 volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
112 volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits;
113 volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits;
114 volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits;
115 volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
116 volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
117 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
118 volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
119 volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
120 volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
121 volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
122 volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
123 volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
124 volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
125 volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits;
126 volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits;
127 volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits;
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