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10 <H2>ASxxxx Cross Assembler Documentation</H2>
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22 SDCC ASLINK Relocating Linker
42 The ASxxxx assemblers were written following the style of
43 several cross assemblers found in the Digital Equipment Corpora-
44 tion Users Society (DECUS) distribution of the C programming
45 language. The DECUS code was provided with no documentation as
46 to the input syntax or the output format. Study of the code
47 revealed that the unknown author of the code had attempted to
48 formulate an assembler with attributes similiar to those of the
49 PDP-11 MACRO assembler (without macro's). The incomplete code
50 from the DECUS C distribution has been largely rewritten, only
51 the program structure, and C source file organization remains
52 relatively unchanged. However, I wish to thank the author for
53 his contribution to this set of assemblers.
55 The ASLINK program was written as a companion to the ASxxxx
56 assemblers, its design and implementation was not derived from
59 I would greatly appreciate receiving the details of any
60 changes, additions, or errors pertaining to these programs and
61 will attempt to incorporate any fixes or generally useful
62 changes in a future update to these programs.
73 http://shop-pdp.kent.edu/ashtml/asxxxx.htm
75 baldwin@shop-pdp.kent.edu
81 E N D U S E R L I C E N S E A G R E E M E N T
87 This program is free software; you can redistribute it and/or
88 modify it under the terms of the GNU General Public License as
89 published by the Free Software Foundation; either version 3, or
90 (at your option) any later version.
92 This program is distributed in the hope that it will be
93 useful, but WITHOUT ANY WARRANTY; without even the implied
94 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
95 See the GNU General Public License for more details.
97 You should have received a copy of the GNU General Public
98 License along with this program. If not, see
99 <http://www.gnu.org/licenses/>.
111 C O N T R I B U T O R S
116 Thanks to Marko Makela for his contribution of the AS6500
123 Internet: Marko.Makela@Helsinki.Fi
124 EARN/BitNet: msmakela@finuh
130 Thanks to John Hartman for his contribution of the AS8051
131 cross assembler and updates to the ASxxxx and ASLINK internals.
134 jhartman@compuserve.com
135 http://ourworld.compuserve.com/homepages/jhartman/
141 Thanks to G. Osborn for his contributions to LKS19.C and
152 ASxxxx Cross Assemblers, Version 2.00, August 1998
154 Submitted by Alan R. Baldwin,
155 Kent State University, Kent, Ohio
157 Operating System: TSX+, RT-11, MS/DOS, PDOS
158 or other supporting K&R C.
164 The ASxxxx assemblers are a series of microprocessor assem-
165 blers written in the C programming language. This collection
166 contains cross assemblers for the 6800(6802/6808), 6801(hd6303),
167 6804, 6805, 68HC08, 6809, 68HC11, 68HC12, 68HC16, 8051,
168 8085(8080), z80(hd64180), H8/3xx, and 6500 series microproces-
169 sors. Each assembler has a device specific section which
170 includes: (1) device description, byte order, and file exten-
171 sion information, (2) a table of assembler general directives,
172 special directives, assembler mnemonics and associated operation
173 codes, (3) machine specific code for processing the device
174 mnemonics, addressing modes, and special directives.
176 The assemblers have a common device independent section which
177 handles the details of file input/output, symbol table genera-
178 tion, program/data areas, expression analysis, and assembler
179 directive processing.
181 The assemblers provide the following features: (1) alpha-
182 betized, formatted symbol table listings, (2) relocatable object
183 modules, (3) global symbols for linking object modules, (4) con-
184 ditional assembly directives, (5) reusable local symbols, and
185 (6) include-file processing.
187 The companion program ASLINK is a relocating linker perform-
188 ing the following functions: (1) bind multiple object modules
189 into a single memory image, (2) resolve inter-module symbol
190 references, (3) resolve undefined symbols from specified
191 librarys of object modules, (4) process absolute, relative, con-
192 catenated, and overlay attributes in data and program sections,
193 (5) perform byte and word program-counter relative (pc or pcr)
194 addressing calculations, (6) define absolute symbol values at
195 link time, (7) define absolute area base address values at link
196 time, (8) produce Intel Hex or Motorola S19 output file, (9)
197 produce a map of the linked memory image, and (10) update the
198 ASxxxx assembler listing files with the absolute linked ad-
201 The assemblers and linker have been tested using DECUS C
202 under TSX+ and RT-11, PDOS C V5.4b, and Symantec C/C++ V6.1/V7.2
203 under DOS/Windows 3.x/95. Complete source code and documenta-
204 tion for the assemblers and linker is included with the distri-
205 bution. Additionally, test code for each assembler and several
206 microprocessor monitors ( ASSIST05 for the 6805, MONDEB and
207 ASSIST09 for the 6809, and BUFFALO 2.5 for the 6811) are in-
208 cluded as working examples of use of these assemblers.
211 CHAPTER 1 THE ASSEMBLER 1-1
212 1.1 THE ASXXXX ASSEMBLERS 1-1
213 1.1.1 Assembly Pass 1 1-2
214 1.1.2 Assembly Pass 2 1-2
215 1.1.3 Assembly Pass 3 1-2
216 1.2 SOURCE PROGRAM FORMAT 1-3
217 1.2.1 Statement Format 1-3
218 1.2.1.1 Label Field 1-3
219 1.2.1.2 Operator Field 1-5
220 1.2.1.3 Operand Field 1-5
221 1.2.1.4 Comment Field 1-6
222 1.3 SYMBOLS AND EXPRESSIONS 1-6
223 1.3.1 Character Set 1-6
224 1.3.2 User-Defined Symbols 1-10
225 1.3.3 Local Symbols 1-11
226 1.3.4 Current Location Counter 1-12
229 1.3.7 Expressions 1-15
230 1.4 GENERAL ASSEMBLER DIRECTIVES 1-16
231 1.4.1 .module Directive 1-16
232 1.4.2 .title Directive 1-17
233 1.4.3 .sbttl Directive 1-17
234 1.4.4 .page Directive 1-17
235 1.4.5 .byte and .db Directives 1-17
236 1.4.6 .word and .dw Directives 1-18
237 1.4.7 .blkb, .blkw, and .ds Directives 1-18
238 1.4.8 .ascii Directive 1-18
239 1.4.9 .ascis Directive 1-19
240 1.4.10 .asciz Directive 1-19
241 1.4.11 .radix Directive 1-20
242 1.4.12 .even Directive 1-20
243 1.4.13 .odd Directive 1-20
244 1.4.14 .area Directive 1-21
245 1.4.15 .org Directive 1-22
246 1.4.16 .globl Directive 1-23
247 1.4.17 .if, .else, and .endif Directives 1-23
248 1.4.18 .include Directive 1-24
249 1.4.19 .setdp Directive 1-25
250 1.5 INVOKING ASXXXX 1-27
252 1.7 LISTING FILE 1-29
253 1.8 SYMBOL TABLE FILE 1-30
256 CHAPTER 2 THE LINKER 2-1
257 2.1 ASLINK RELOCATING LINKER 2-1
258 2.2 INVOKING ASLINK 2-2
259 2.3 LIBRARY PATH(S) AND FILE(S) 2-3
260 2.4 ASLINK PROCESSING 2-4
261 2.5 LINKER INPUT FORMAT 2-6
262 2.5.1 Object Module Format 2-6
263 2.5.2 Header Line 2-6
264 2.5.3 Module Line 2-7
265 2.5.4 Symbol Line 2-7
276 2.6 LINKER ERROR MESSAGES 2-9
277 2.7 INTEL HEX OUTPUT FORMAT 2-11
278 2.8 MOTORLA S1-S9 OUTPUT FORMAT 2-12
280 CHAPTER 3 BUILDING ASXXXX AND ASLINK 3-1
281 3.1 BUILDING AN ASSEMBLER 3-1
282 3.2 BUILDING ASLINK 3-2
284 APPENDIX A AS6800 ASSEMBLER A-1
285 A.1 6800 REGISTER SET A-1
286 A.2 6800 INSTRUCTION SET A-1
287 A.2.1 Inherent Instructions A-2
288 A.2.2 Branch Instructions A-2
289 A.2.3 Single Operand Instructions A-3
290 A.2.4 Double Operand Instructions A-4
291 A.2.5 Jump and Jump to Subroutine Instructions A-4
292 A.2.6 Long Register Instructions A-5
294 APPENDIX B AS6801 ASSEMBLER B-1
295 B.1 .hd6303 DIRECTIVE B-1
296 B.2 6801 REGISTER SET B-1
297 B.3 6801 INSTRUCTION SET B-1
298 B.3.1 Inherent Instructions B-2
299 B.3.2 Branch Instructions B-2
300 B.3.3 Single Operand Instructions B-3
301 B.3.4 Double Operand Instructions B-4
302 B.3.5 Jump and Jump to Subroutine Instructions B-5
303 B.3.6 Long Register Instructions B-5
304 B.3.7 6303 Specific Instructions B-5
306 APPENDIX C AS6804 ASSEMBLER C-1
307 C.1 6804 REGISTER SET C-1
308 C.2 6804 INSTRUCTION SET C-1
309 C.2.1 Inherent Instructions C-2
310 C.2.2 Branch Instructions C-2
311 C.2.3 Single Operand Instructions C-2
312 C.2.4 Jump and Jump to Subroutine Instructions C-2
313 C.2.5 Bit Test Instructions C-2
314 C.2.6 Load Immediate data Instruction C-3
315 C.2.7 6804 Derived Instructions C-3
317 APPENDIX D AS6805 ASSEMBLER D-1
318 D.1 6805 REGISTER SET D-1
319 D.2 6805 INSTRUCTION SET D-1
320 D.2.1 Control Instructions D-2
321 D.2.2 Bit Manipulation Instructions D-2
322 D.2.3 Branch Instructions D-2
323 D.2.4 Read-Modify-Write Instructions D-3
324 D.2.5 Register\Memory Instructions D-3
331 D.2.6 Jump and Jump to Subroutine Instructions D-4
333 APPENDIX E AS6808 ASSEMBLER E-1
334 E.1 68HC08 REGISTER SET E-1
335 E.2 68HC08 INSTRUCTION SET E-1
336 E.2.1 Control Instructions E-2
337 E.2.2 Bit Manipulation Instructions E-2
338 E.2.3 Branch Instructions E-3
339 E.2.4 Complex Branch Instructions E-3
340 E.2.5 Read-Modify-Write Instructions E-4
341 E.2.6 Register\Memory Instructions E-5
342 E.2.7 Double Operand Move Instruction E-5
343 E.2.8 16-Bit <H:X> Index Register Instructions E-5
344 E.2.9 Jump and Jump to Subroutine Instructions E-5
346 APPENDIX F AS6809 ASSEMBLER F-1
347 F.1 6809 REGISTER SET F-1
348 F.2 6809 INSTRUCTION SET F-1
349 F.2.1 Inherent Instructions F-3
350 F.2.2 Short Branch Instructions F-3
351 F.2.3 Long Branch Instructions F-3
352 F.2.4 Single Operand Instructions F-4
353 F.2.5 Double Operand Instructions F-5
354 F.2.6 D-register Instructions F-5
355 F.2.7 Index/Stack Register Instructions F-5
356 F.2.8 Jump and Jump to Subroutine Instructions F-6
357 F.2.9 Register - Register Instructions F-6
358 F.2.10 Condition Code Register Instructions F-6
359 F.2.11 6800 Compatibility Instructions F-6
361 APPENDIX G AS6811 ASSEMBLER G-1
362 G.1 68HC11 REGISTER SET G-1
363 G.2 68HC11 INSTRUCTION SET G-1
364 G.2.1 Inherent Instructions G-2
365 G.2.2 Branch Instructions G-2
366 G.2.3 Single Operand Instructions G-3
367 G.2.4 Double Operand Instructions G-4
368 G.2.5 Bit Manupulation Instructions G-4
369 G.2.6 Jump and Jump to Subroutine Instructions G-5
370 G.2.7 Long Register Instructions G-5
372 APPENDIX H AS6812 ASSEMBLER H-1
373 H.1 68HC12 REGISTER SET H-1
374 H.2 68HC12 INSTRUCTION SET H-1
375 H.2.1 Inherent Instructions H-3
376 H.2.2 Short Branch Instructions H-3
377 H.2.3 Long Branch Instructions H-3
378 H.2.4 Branch on Decrement, Test, or Increment H-4
379 H.2.5 Bit Clear and Set Instructions H-4
380 H.2.6 Branch on Bit Clear or Set H-4
381 H.2.7 Single Operand Instructions H-5
382 H.2.8 Double Operand Instructions H-6
389 H.2.9 Move Instructions H-6
390 H.2.10 D-register Instructions H-6
391 H.2.11 Index/Stack Register Instructions H-7
392 H.2.12 Jump and Jump/Call to Subroutine
394 H.2.13 Other Special Instructions H-7
395 H.2.14 Register - Register Instructions H-7
396 H.2.15 Condition Code Register Instructions H-7
397 H.2.16 M68HC11 Compatibility Mode Instructions H-8
399 APPENDIX I AS6816 ASSEMBLER I-1
400 I.1 68HC16 REGISTER SET I-1
401 I.2 68HC16 INSTRUCTION SET I-1
402 I.2.1 Inherent Instructions I-2
403 I.2.2 Push/Pull Multiple Register Instructions I-3
404 I.2.3 Short Branch Instructions I-3
405 I.2.4 Long Branch Instructions I-3
406 I.2.5 Bit Manipulation Instructions I-3
407 I.2.6 Single Operand Instructions I-4
408 I.2.7 Double Operand Instructions I-5
409 I.2.8 Index/Stack Register Instructions I-5
410 I.2.9 Jump and Jump to Subroutine Instructions I-6
411 I.2.10 Condition Code Register Instructions I-6
412 I.2.11 Multiply and Accumulate Instructions I-6
414 APPENDIX J ASH8 ASSEMBLER J-1
415 J.1 H8/3XX REGISTER SET J-1
416 J.2 H8/3XX INSTRUCTION SET J-1
417 J.2.1 Inherent Instructions J-2
418 J.2.2 Branch Instructions J-2
419 J.2.3 Single Operand Instructions J-3
420 J.2.4 Double Operand Instructions J-4
421 J.2.5 Mov Instructions J-5
422 J.2.6 Bit Manipulation Instructions J-6
423 J.2.7 Extended Bit Manipulation Instructions J-7
424 J.2.8 Condition Code Instructions J-7
425 J.2.9 Other Instructions J-8
426 J.2.10 Jump and Jump to Subroutine Instructions J-8
428 APPENDIX K AS8051 ASSEMBLER K-1
429 K.1 ACKNOWLEDGMENT K-1
430 K.2 8051 REGISTER SET K-1
431 K.3 8051 INSTRUCTION SET K-2
432 K.3.1 Inherent Instructions K-2
433 K.3.2 Move Instructions K-3
434 K.3.3 Single Operand Instructions K-3
435 K.3.4 Two Operand Instructions K-4
436 K.3.5 Call and Return Instructions K-4
437 K.3.6 Jump Instructions K-4
438 K.3.7 Predefined Symbols: SFR Map K-5
439 K.3.8 Predefined Symbols: SFR Bit Addresses K-6
440 K.3.9 Predefined Symbols: Control Bits K-7
447 APPENDIX L AS8085 ASSEMBLER L-1
448 L.1 8085 REGISTER SET L-1
449 L.2 8085 INSTRUCTION SET L-1
450 L.2.1 Inherent Instructions L-2
451 L.2.2 Register/Memory/Immediate Instructions L-2
452 L.2.3 Call and Return Instructions L-2
453 L.2.4 Jump Instructions L-2
454 L.2.5 Input/Output/Reset Instructions L-3
455 L.2.6 Move Instructions L-3
456 L.2.7 Other Instructions L-3
458 APPENDIX M ASZ80 ASSEMBLER M-1
459 M.1 .hd64 DIRECTIVE M-1
460 M.2 Z80 REGISTER SET AND CONDITIONS M-1
461 M.3 Z80 INSTRUCTION SET M-2
462 M.3.1 Inherent Instructions M-3
463 M.3.2 Implicit Operand Instructions M-3
464 M.3.3 Load Instruction M-4
465 M.3.4 Call/Return Instructions M-4
466 M.3.5 Jump and Jump to Subroutine Instructions M-4
467 M.3.6 Bit Manipulation Instructions M-5
468 M.3.7 Interrupt Mode and Reset Instructions M-5
469 M.3.8 Input and Output Instructions M-5
470 M.3.9 Register Pair Instructions M-5
471 M.3.10 HD64180 Specific Instructions M-6
473 APPENDIX N AS6500 ASSEMBLER N-1
474 N.1 ACKNOWLEDGMENT N-1
475 N.2 6500 REGISTER SET N-2
476 N.3 6500 INSTRUCTION SET N-2
477 N.3.1 Processor Specific Directives N-3
478 N.3.2 65xx Core Inherent Instructions N-3
479 N.3.3 65xx Core Branch Instructions N-3
480 N.3.4 65xx Core Single Operand Instructions N-3
481 N.3.5 65xx Core Double Operand Instructions N-4
482 N.3.6 65xx Core Jump and Jump to Subroutine
484 N.3.7 65xx Core Miscellaneous X and Y Register
486 N.3.8 65F11 and 65F12 Specific Instructions N-5
487 N.3.9 65C00/21 and 65C29 Specific Instructions N-5
488 N.3.10 65C02, 65C102, and 65C112 Specific
512 1.1 THE ASXXXX ASSEMBLERS
515 The ASxxxx assemblers are a series of microprocessor assem-
516 blers written in the C programming language. Each assembler has
517 a device specific section which includes:
519 1. device description, byte order, and file extension in-
522 2. a table of the assembler general directives, special
523 device directives, assembler mnemonics and associated
526 3. machine specific code for processing the device mnemon-
527 ics, addressing modes, and special directives
529 The device specific information is detailed in the appendices.
531 The assemblers have a common device independent section which
532 handles the details of file input/output, symbol table genera-
533 tion, program/data areas, expression analysis, and assembler
534 directive processing.
536 The assemblers provide the following features:
538 1. Command string control of assembly functions
540 2. Alphabetized, formatted symbol table listing
542 3. Relocatable object modules
544 4. Global symbols for linking object modules
546 5. Conditional assembly directives
550 THE ASSEMBLER PAGE 1-2
551 THE ASXXXX ASSEMBLERS
554 6. Program sectioning directives
557 ASxxxx assembles one or more source files into a single relo-
558 catable ascii object file. The output of the ASxxxx assemblers
559 consists of an ascii relocatable object file(*.rel), an assembly
560 listing file(*.lst), and a symbol file(*.sym).
563 1.1.1 Assembly Pass 1
566 During pass 1, ASxxxx opens all source files and performs a
567 rudimenatry assembly of each source statement. During this pro-
568 cess all symbol tables are built, program sections defined, and
569 number of bytes for each assembled source line is estimated.
571 At the end of pass 1 all undefined symbols may be made global
572 (external) using the ASxxxx switch -g, otherwise undefined sym-
573 bols will be flagged as errors during succeeding passes.
576 1.1.2 Assembly Pass 2
579 During pass 2 the ASxxxx assembler resolves forward refer-
580 ences and determines the number of bytes for each assembled
581 line. The number of bytes used by a particular assembler in-
582 struction may depend upon the addressing mode, whether the in-
583 struction allows multiple forms based upon the relative distance
584 to the addressed location, or other factors. Pass 2 resolves
585 these cases and determines the address of all symbols.
588 1.1.3 Assembly Pass 3
591 Pass 3 by the assembler generates the listing file, the relo-
592 catable output file, and the symbol tables. Also during pass 3
593 the errors will be reported.
595 The relocatable object file is an ascii file containing sym-
596 bol references and definitions, program area definitions, and
597 the relocatable assembled code, the linker ASLINK will use this
598 information to generate an absolute load file (Motorola or Intel
604 THE ASSEMBLER PAGE 1-3
605 SOURCE PROGRAM FORMAT
608 1.2 SOURCE PROGRAM FORMAT
612 1.2.1 Statement Format
615 A source program is composed of assembly-language statements.
616 Each statement must be completed on one line. A line may con-
617 tain a maximum of 128 characters, longer lines are truncated and
620 An ASxxxx assembler statement may have as many as four
621 fields. These fields are identified by their order within the
622 statement and/or by separating characters between fields. The
623 general format of the ASxxxx statement is:
625 [label:] Operator Operand [;Comment(s)]
627 The label and comment fields are optional. The operator and
628 operand fields are interdependent. The operator field may be an
629 assembler directive or an assembly mnemonic. The operand field
630 may be optional or required as defined in the context of the
633 ASxxxx interprets and processes source statements one at a
634 time. Each statement causes a particular operation to be per-
638 1.2.1.1 Label Field -
640 A label is a user-defined symbol which is assigned the value
641 of the current location counter and entered into the user de-
642 fined symbol table. The current location counter is used by
643 ASxxxx to assign memory addresses to the source program state-
644 ments as they are encountered during the assembly process. Thus
645 a label is a means of symbolically referring to a specific
648 When a program section is absolute, the value of the current
649 location counter is absolute; its value references an absolute
650 memory address. Similarly, when a program section is relocat-
651 able, the value of the current location counter is relocatable.
652 A relocation bias calculated at link time is added to the ap-
653 parent value of the current location counter to establish its
654 effective absolute address at execution time. (The user can
655 also force the linker to relocate sections defined as absolute.
656 This may be required under special circumstances.)
658 If present, a label must be the first field in a source
659 statement and must be terminated by a colon (:). For example,
662 THE ASSEMBLER PAGE 1-4
663 SOURCE PROGRAM FORMAT
666 if the value of the current location counter is absolute
667 01F0(H), the statement:
671 assigns the value 01F0(H) to the label abcd. If the location
672 counter value were relocatable, the final value of abcd would be
673 01F0(H)+K, where K represents the relocation bias of the program
674 section, as calculated by the linker at link time.
676 More than one label may appear within a single label field.
677 Each label so specified is assigned the same address value. For
678 example, if the value of the current location counter is
679 1FF0(H), the multiple labels in the following statement are each
680 assigned the value 1FF0(H):
684 Multiple labels may also appear on successive lines. For ex-
685 ample, the statements
691 likewise cause the same value to be assigned to all three la-
694 A double colon (::) defines the label as a global symbol.
695 For example, the statement
699 establishes the label abcd as a global symbol. The distinguish-
700 ing attribute of a global symbol is that it can be referenced
701 from within an object module other than the module in which the
702 symbol is defined. References to this label in other modules
703 are resolved when the modules are linked as a composite execut-
706 The legal characters for defining labels are:
715 A label may be any length, however only the first 79
716 characters are significant and, therefore must be unique among
717 all labels in the source program (not necessarily among
720 THE ASSEMBLER PAGE 1-5
721 SOURCE PROGRAM FORMAT
724 separately compiled modules). An error code(s) (m or p) will be
725 generated in the assembly listing if the first 79 characters in
726 two or more labels are the same. The m code is caused by the
727 redeclaration of the symbol or its reference by another state-
728 ment. The p code is generated because the symbols location is
729 changing on each pass through the source file.
731 The label must not start with the characters 0-9, as this
732 designates a local symbol with special attributes described in a
735 The label must not start with the sequence $$, as this
736 represents the temporary radix 16 for constants.
739 1.2.1.2 Operator Field -
741 The operator field specifies the action to be performed. It
742 may consist of an instruction mnemonic (op code) or an assembler
745 When the operator is an instruction mnemonic, a machine in-
746 struction is generated and the assembler evaluates the addresses
747 of the operands which follow. When the operator is a directive
748 ASxxxx performs certain control actions or processing operations
749 during assembly of the source program.
751 Leading and trailing spaces or tabs in the operator field
752 have no significance; such characters serve only to separate
753 the operator field from the preceeding and following fields.
755 An operator is terminated by a space, tab or end of line.
758 1.2.1.3 Operand Field -
760 When the operator is an instruction mnemonic (op code), the
761 operand field contains program variables that are to be
762 evaluated/manipulated by the operator.
764 Operands may be expressions or symbols, depending on the
765 operator. Multiple expressions used in the operand fields may
766 be separated by a comma. An operand should be preceeded by an
767 operator field; if it is not, the statement will give an error
768 (q or o). All operands following instruction mnemonics are
769 treated as expressions.
771 The operand field is terminated by a semicolon when the field
772 is followed by a comment. For example, in the following
775 label: lda abcd,x ;Comment field
778 THE ASSEMBLER PAGE 1-6
779 SOURCE PROGRAM FORMAT
783 the tab between lda and abcd terminates the operator field and
784 defines the beginning of the operand field; a comma separates
785 the operands abcd and x; and a semicolon terminates the operand
786 field and defines the beginning of the comment field. When no
787 comment field follows, the operand field is terminated by the
788 end of the source line.
791 1.2.1.4 Comment Field -
793 The comment field begins with a semicolon and extends through
794 the end of the line. This field is optional and may contain any
795 7-bit ascii character except null.
797 Comments do not affect assembly processing or program execu-
801 1.3 SYMBOLS AND EXPRESSIONS
804 This section describes the generic components of the ASxxxx
805 assemblers: the character set, the conventions observed in con-
806 structing symbols, and the use of numbers, operators, and ex-
813 The following characters are legal in ASxxxx source programs:
815 1. The letters A through Z. Both upper- and lower-case
816 letters are acceptable. The assemblers, by default,
817 are not case sensitive, i.e. ABCD and abcd are the
818 same symbols. (The assemblers can be made case sensi-
819 tive by using the -z command line option.)
821 2. The digits 0 through 9
823 3. The characters . (period), $ (dollar sign), and _ (un-
826 4. The special characters listed in Tables 1 through 6.
829 Tables 1 through 6 describe the various ASxxxx label and
830 field terminators, assignment operators, operand separators, as-
831 sembly, unary, binary, and radix operators.
834 THE ASSEMBLER PAGE 1-7
835 SYMBOLS AND EXPRESSIONS
838 Table 1 Label Terminators and Assignment Operators
839 ----------------------------------------------------------------
841 : Colon Label terminator.
843 :: Double colon Label Terminator; defines the
844 label as a global label.
846 = Equal sign Direct assignment operator.
848 == Double equal Direct assignment operator;
849 sign defines the symbol as a global
852 ----------------------------------------------------------------
858 Table 2 Field Terminators and Operand Separators
859 ----------------------------------------------------------------
861 Tab Item or field terminator.
863 Space Item or field terminator.
865 , Comma Operand field separator.
867 ; Semicolon Comment field indicator.
869 ----------------------------------------------------------------
875 Table 3 Assembler Operators
876 ----------------------------------------------------------------
878 # Number sign Immediate expression indicator.
880 . Period Current location counter.
882 ( Left parenthesis Expression delimiter.
884 ) Right parenthesis Expression delimeter.
886 ----------------------------------------------------------------
889 THE ASSEMBLER PAGE 1-8
890 SYMBOLS AND EXPRESSIONS
898 Table 4 Unary Operators
899 ----------------------------------------------------------------
901 < Left bracket <FEDC Produces the lower byte
902 value of the expression.
905 > Right bracket >FEDC Produces the upper byte
906 value of the expression.
909 + Plus sign +A Positive value of A
911 - Minus sign -A Produces the negative
912 (2's complement) of A.
914 ~ Tilde ~A Produces the 1's comple-
917 ' Single quote 'D Produces the value of
920 " Double quote "AB Produces the double byte
923 \ Backslash '\n Unix style characters
925 or '\001 or octal byte values.
927 ----------------------------------------------------------------
935 THE ASSEMBLER PAGE 1-9
936 SYMBOLS AND EXPRESSIONS
939 Table 5 Binary Operators
940 ----------------------------------------------------------------
942 << Double 0800 << 4 Produces the 4 bit
943 Left bracket left-shifted value of
946 >> Double 0800 >> 4 Produces the 4 bit
947 Right bracket right-shifted value of
950 + Plus sign A + B Arithmetic Addition
953 - Minus sign A - B Arithmetic Subtraction
956 * Asterisk A * B Arithmetic Multiplica-
957 tion operator. (signed
960 / Slash A / B Arithmetic Division
964 & Ampersand A & B Logical AND operator.
966 | Bar A | B Logical OR operator.
968 % Percent sign A % B Modulus operator.
971 ^ Up arrow or A ^ B EXCLUSIVE OR operator.
974 ----------------------------------------------------------------
982 THE ASSEMBLER PAGE 1-10
983 SYMBOLS AND EXPRESSIONS
986 Table 6 Temporary Radix Operators
987 ----------------------------------------------------------------
989 $%, 0b, 0B Binary radix operator.
991 $&, 0o, 0O, 0q, 0Q Octal radix operator.
993 $#, 0d, 0D Decimal radix operator.
995 $$, 0h, 0H, 0x, 0X Hexidecimal radix operator.
998 Potential ambiguities arising from the use of 0b and 0d
999 as temporary radix operators may be circumvented by pre-
1000 ceding all non-prefixed hexidecimal numbers with 00.
1001 Leading 0's are required in any case where the first
1002 hexidecimal digit is abcdef as the assembler will treat
1003 the letter sequence as a label.
1005 ----------------------------------------------------------------
1013 1.3.2 User-Defined Symbols
1016 User-defined symbols are those symbols that are equated to a
1017 specific value through a direct assignment statement or appear
1018 as labels. These symbols are added to the User Symbol Table as
1019 they are encountered during assembly.
1021 The following rules govern the creation of user-defined symbols:
1023 1. Symbols can be composed of alphanumeric characters,
1024 dollar signs ($), periods (.), and underscores (_)
1027 2. The first character of a symbol must not be a number
1028 (except in the case of local symbols).
1030 3. The first 79 characters of a symbol must be unique. A
1031 symbol can be written with more than 79 legal
1032 characters, but the 80th and subsequent characters are
1035 4. Spaces and Tabs must not be embedded within a symbol.
1040 THE ASSEMBLER PAGE 1-11
1041 SYMBOLS AND EXPRESSIONS
1047 Local symbols are specially formatted symbols used as labels
1048 within a block of coding that has been delimited as a local sym-
1049 bol block. Local symbols are of the form n$, where n is a
1050 decimal integer from 0 to 255, inclusive. Examples of local
1058 The range of a local symbol block consists of those state-
1059 ments between two normally constructed symbolic labels. Note
1060 that a statement of the form:
1064 is a direct assignment statement but does not create a label and
1065 thus does not delimit the range of a local symbol block.
1067 Note that the range of a local symbol block may extend across
1070 Local symbols provide a convenient means of generating labels
1071 for branch instructions and other such references within local
1072 symbol blocks. Using local symbols reduces the possibility of
1073 symbols with multiple definitions appearing within a user pro-
1074 gram. In addition, the use of local symbols differentiates
1075 entry-point labels from local labels, since local labels cannot
1076 be referenced from outside their respective local symbol blocks.
1077 Thus, local symbols of the same name can appear in other local
1078 symbol blocks without conflict. Local symbols require less sym-
1079 bol table space than normal symbols. Their use is recommended.
1081 The use of the same local symbol within a local symbol block
1082 will generate one or both of the m or p errors.
1085 THE ASSEMBLER PAGE 1-12
1086 SYMBOLS AND EXPRESSIONS
1089 Example of local symbols:
1091 a: ldx #atable ;get table address
1092 lda #0d48 ;table length
1097 b: ldx #btable ;get table address
1098 lda #0d48 ;table length
1104 1.3.4 Current Location Counter
1107 The period (.) is the symbol for the current location coun-
1108 ter. When used in the operand field of an instruction, the
1109 period represents the address of the first byte of the
1112 AS: ldx #. ;The period (.) refers to
1113 ;the address of the ldx
1116 When used in the operand field of an ASxxxx directive, it
1117 represents the address of the current byte or word:
1121 .word 0xFFFE,.+4,QK ;The operand .+4 in the .word
1122 ;directive represents a value
1123 ;stored in the second of the
1124 ;three words during assembly.
1126 If we assume the current value of the program counter is
1127 0H0200, then during assembly, ASxxxx reserves three words of
1128 storage starting at location 0H0200. The first value, a hex-
1129 idecimal constant FFFE, will be stored at location 0H0200. The
1130 second value represented by .+4 will be stored at location
1131 0H0202, its value will be 0H0206 ( = 0H0202 + 4). The third
1132 value defined by the symbol QK will be placed at location
1135 At the beginning of each assembly pass, ASxxxx resets the lo-
1136 cation counter. Normally, consecutive memory locations are as-
1137 signed to each byte of object code generated. However, the
1138 value of the location counter can be changed through a direct
1139 assignment statement of the following form:
1143 THE ASSEMBLER PAGE 1-13
1144 SYMBOLS AND EXPRESSIONS
1150 The new location counter can only be specified relative to
1151 the current location counter. Neglecting to specify the current
1152 program counter along with the expression on the right side of
1153 the assignment operator will generate the (.) error. (Absolute
1154 program areas may use the .org directive to specify the absolute
1155 location of the current program counter.)
1157 The following coding illustrates the use of the current location
1160 .area CODE1 (ABS) ;program area CODE1
1163 .org 0H100 ;set location to
1166 num1: ldx #.+0H10 ;The label num1 has
1171 .org 0H130 ;location counter
1174 num2: ldy #. ;The label num2 has
1180 .area CODE2 (REL) ;program area CODE2
1183 . = . + 0H20 ;Set location counter
1184 ;to relocatable 0H20 of
1185 ;the program section.
1187 num3: .word 0 ;The label num3 has
1189 ;of relocatable 0H20.
1191 . = . + 0H40 ;will reserve 0H40
1192 ;bytes of storage as will
1196 The .blkb and .blkw directives are the preferred methods of
1201 THE ASSEMBLER PAGE 1-14
1202 SYMBOLS AND EXPRESSIONS
1208 ASxxxx assumes that all numbers in the source program are to
1209 be interpreted in decimal radix unless otherwise specified. The
1210 .radix directive may be used to specify the default as octal,
1211 decimal, or hexidecimal. Individual numbers can be designated
1212 as binary, octal, decimal, or hexidecimal through the temporary
1213 radix prefixes shown in table 6.
1215 Negative numbers must be preceeded by a minus sign; ASxxxx
1216 translates such numbers into two's complement form. Positive
1217 numbers may (but need not) be preceeded by a plus sign.
1219 Numbers are always considered to be absolute values, therefor
1220 they are never relocatable.
1226 A term is a component of an expression and may be one of the
1233 1. A period (.) specified in an expression causes the
1234 current location counter to be used.
1235 2. A User-defined symbol.
1236 3. An undefined symbol is assigned a value of zero and
1237 inserted in the User-Defined symbol table as an un-
1240 3. A single quote followed by a single ascii character, or
1241 a double quote followed by two ascii characters.
1243 4. An expression enclosed in parenthesis. Any expression
1244 so enclosed is evaluated and reduced to a single term
1245 before the remainder of the expression in which it ap-
1246 pears is evaluated. Parenthesis, for example, may be
1247 used to alter the left-to-right evaluation of expres-
1248 sions, (as in A*B+C versus A*(B+C)), or to apply a un-
1249 ary operator to an entire expression (as in -(A+B)).
1251 5. A unary operator followed by a symbol or number.
1257 THE ASSEMBLER PAGE 1-15
1258 SYMBOLS AND EXPRESSIONS
1264 Expressions are combinations of terms joined together by
1265 binary operators. Expressions reduce to a 16-bit value. The
1266 evaluation of an expression includes the determination of its
1267 attributes. A resultant expression value may be one of three
1268 types (as described later in this section): relocatable, ab-
1269 solute, and external.
1271 Expressions are evaluate with an operand hierarchy as follows:
1273 * / % multiplication,
1280 << >> left shift and
1283 ^ exclusive or fourth.
1285 & logical and fifth.
1289 except that unary operators take precedence over binary
1293 A missing or illegal operator terminates the expression
1294 analysis, causing error codes (o) and/or (q) to be generated
1295 depending upon the context of the expression itself.
1297 At assembly time the value of an external (global) expression
1298 is equal to the value of the absolute part of that expression.
1299 For example, the expression external+4, where 'external' is an
1300 external symbol, has the value of 4. This expression, however,
1301 when evaluated at link time takes on the resolved value of the
1302 symbol 'external', plus 4.
1304 Expressions, when evaluated by ASxxxx, are one of three
1305 types: relocatable, absolute, or external. The following dis-
1306 tinctions are important:
1308 1. An expression is relocatable if its value is fixed re-
1309 lative to the base address of the program area in which
1310 it appears; it will have an offset value added at link
1311 time. Terms that contain labels defined in relocatable
1312 program areas will have a relocatable value;
1315 THE ASSEMBLER PAGE 1-16
1316 SYMBOLS AND EXPRESSIONS
1319 similarly, a period (.) in a relocatable program area,
1320 representing the value of the current program location
1321 counter, will also have a relocatable value.
1323 2. An expression is absolute if its value is fixed. An
1324 expression whose terms are numbers and ascii characters
1325 will reduce to an absolute value. A relocatable ex-
1326 pression or term minus a relocatable term, where both
1327 elements being evaluated belong to the same program
1328 area, is an absolute expression. This is because every
1329 term in a program area has the same relocation bias.
1330 When one term is subtracted from the other the reloca-
1333 3. An expression is external (or global) if it contains a
1334 single global reference (plus or minus an absolute ex-
1335 pression value) that is not defined within the current
1336 program. Thus, an external expression is only par-
1337 tially defined following assembly and must be resolved
1342 1.4 GENERAL ASSEMBLER DIRECTIVES
1345 An ASxxxx directive is placed in the operator field of the
1346 source line. Only one directive is allowed per source line.
1347 Each directive may have a blank operand field or one or more
1348 operands. Legal operands differ with each directive.
1351 1.4.1 .module Directive
1357 The .module directive causes the string to be included in the
1358 assemblers output file as an identifier for this particular ob-
1359 ject module. The string may be from 1 to 79 characters in
1360 length. Only one identifier is allowed per assembled module.
1361 The main use of this directive is to allow the linker to report
1362 a modules' use of undefined symbols. At link time all undefined
1363 symbols are reported and the modules referencing them are
1369 THE ASSEMBLER PAGE 1-17
1370 GENERAL ASSEMBLER DIRECTIVES
1373 1.4.2 .title Directive
1379 The .title directive provides a character string to be placed
1380 on the second line of each page during listing.
1383 1.4.3 .sbttl Directive
1389 The .sbttl directive provides a character string to be placed
1390 on the third line of each page during listing.
1393 1.4.4 .page Directive
1399 The .page directive causes a page ejection with a new heading
1400 to be printed. The new page occurs after the next line of the
1401 source program is processed, this allows an immediately follow-
1402 ing .sbttl directive to appear on the new page. The .page
1403 source line will not appear in the file listing. Paging may be
1404 disabled by invoking the -p directive.
1407 1.4.5 .byte and .db Directives
1411 .byte exp ;Stores the binary value
1412 .db exp ;of the expression in the
1415 .byte exp1,exp2,expn ;Stores the binary values
1416 .db exp1,exp2,expn ;of the list of expressions
1417 ;in successive bytes.
1419 where: exp, represent expressions that will be
1420 exp1, truncated to 8-bits of data.
1421 . Each expression will be calculated
1422 . as a 16-bit word expression,
1423 . the high-order byte will be truncated.
1424 . Multiple expressions must be
1427 THE ASSEMBLER PAGE 1-18
1428 GENERAL ASSEMBLER DIRECTIVES
1431 expn separated by commas.
1433 The .byte or .db directives are used to generate successive
1434 bytes of binary data in the object module.
1437 1.4.6 .word and .dw Directives
1441 .word exp ;Stores the binary value
1442 .dw exp ;of the expression in
1445 .word exp1,exp2,expn ;Stores the binary values
1446 .dw exp1,exp2,expn ;of the list of expressions
1447 ;in successive words.
1449 where: exp, represent expressions that will occupy two
1450 exp1, bytes of data. Each expression will be
1451 . calculated as a 16-bit word expression.
1452 . Multiple expressions must be
1453 expn separated by commas.
1455 The .word or .dw directives are used to generate successive
1456 words of binary data in the object module.
1459 1.4.7 .blkb, .blkw, and .ds Directives
1463 .blkb N ;reserve N bytes of space
1464 .blkw N ;reserve N words of space
1465 .ds N ;reserve N bytes of space
1467 The .blkb and .ds directives reserve byte blocks in the ob-
1468 ject module; the .blkw directive reserves word blocks.
1471 1.4.8 .ascii Directive
1477 where: string is a string of printable ascii characters.
1479 / / represent the delimiting characters. These
1480 delimiters may be any paired printing
1481 characters, as long as the characters are not
1482 contained within the string itself. If the
1485 THE ASSEMBLER PAGE 1-19
1486 GENERAL ASSEMBLER DIRECTIVES
1489 delimiting characters do not match, the .ascii
1490 directive will give the (q) error.
1492 The .ascii directive places one binary byte of data for each
1493 character in the string into the object module.
1496 1.4.9 .ascis Directive
1502 where: string is a string of printable ascii characters.
1504 / / represent the delimiting characters. These
1505 delimiters may be any paired printing
1506 characters, as long as the characters are not
1507 contained within the string itself. If the
1508 delimiting characters do not match, the .ascis
1509 directive will give the (q) error.
1511 The .ascis directive places one binary byte of data for each
1512 character in the string into the object module. The last
1513 character in the string will have the high order bit set.
1516 1.4.10 .asciz Directive
1522 where: string is a string of printable ascii characters.
1524 / / represent the delimiting characters. These
1525 delimiters may be any paired printing
1526 characters, as long as the characters are not
1527 contained within the string itself. If the
1528 delimiting characters do not match, the .asciz
1529 directive will give the (q) error.
1531 The .asciz directive places one binary byte of data for each
1532 character in the string into the object module. Following all
1533 the character data a zero byte is inserted to terminate the
1539 THE ASSEMBLER PAGE 1-20
1540 GENERAL ASSEMBLER DIRECTIVES
1543 1.4.11 .radix Directive
1549 where: character represents a single character specifying the
1550 default radix to be used for succeeding numbers.
1551 The character may be any one of the following:
1565 1.4.12 .even Directive
1571 The .even directive ensures that the current location counter
1572 contains an even boundary value by adding 1 if the current loca-
1576 1.4.13 .odd Directive
1582 The .odd directive ensures that the current location counter
1583 contains an odd boundary value by adding one if the current lo-
1589 THE ASSEMBLER PAGE 1-21
1590 GENERAL ASSEMBLER DIRECTIVES
1593 1.4.14 .area Directive
1597 .area name [(options)]
1599 where: name represents the symbolic name of the program sec-
1600 tion. This name may be the same as any
1601 user-defined symbol as the area names are in-
1602 dependent of all symbols and labels.
1604 options specify the type of program or data area:
1612 The .area directive provides a means of defining and separat-
1613 ing multiple programming and data sections. The name is the
1614 area label used by the assembler and the linker to collect code
1615 from various separately assembled modules into one section. The
1616 name may be from 1 to 79 characters in length.
1618 The options are specified within parenthesis and separated by
1619 commas as shown in the following example:
1621 .area TEST (REL,CON) ;This section is relocatable
1622 ;and concatenated with other
1623 ;sections of this program area.
1625 .area DATA (REL,OVR) ;This section is relocatable
1626 ;and overlays other sections
1627 ;of this program area.
1629 .area SYS (ABS,OVR) ;This section is defined as
1630 ;absolute and overlays other
1631 ;sections of this program area.
1633 .area PAGE (PAG) ;This is a paged section. The
1634 ;section must be on a 256 byte
1635 ;boundary and its length is
1636 ;checked by the linker to be
1637 ;no larger than 256 bytes.
1638 ;This is useful for direct page
1643 THE ASSEMBLER PAGE 1-22
1644 GENERAL ASSEMBLER DIRECTIVES
1647 The default area type is REL|CON; i.e. a relocatable sec-
1648 tion which is concatenated with other sections of code with the
1649 same area name. The ABS option indicates an absolute area. The
1650 OVR and CON options indicate if program sections of the same
1651 name will overlay each other (start at the same location) or be
1652 concatenated with each other (appended to each other).
1654 Warning: ABS used to automatically invoke OVR and CON was not
1655 allowed with ABS. This behaviour has been changed. Absolute
1656 sections need an explicit OVR flag to be overlayed with other
1657 sections of this program area. Overlapping absolute areas will
1658 generate a warning unless OVR is specified.
1660 Multiple invocations of the .area directive with the same
1661 name must specify the same options or leave the options field
1662 blank, this defaults to the previously specified options for
1665 The ASxxxx assemblers automatically provide two program
1668 '. .ABS.' This dummy section contains all absolute
1669 symbols and their values.
1671 '_CODE' This is the default program/data area.
1672 This program area is of type (REL,CON).
1674 The ASxxxx assemblers also automatically generate two symbols
1675 for each program area:
1677 's_<area>' This is the starting address of the pro-
1680 indent -16 'l_<area>' This is the
1681 length of the program area.
1683 The .area names and options are never case sensitive.
1686 1.4.15 .org Directive
1692 where: exp is an absolute expression that becomes the cur-
1693 rent location counter.
1695 The .org directive is valid only in an absolute program section
1696 and will give a (q) error if used in a relocatable program area.
1697 The .org directive specifies that the current location counter
1698 is to become the specified absolute value.
1703 THE ASSEMBLER PAGE 1-23
1704 GENERAL ASSEMBLER DIRECTIVES
1707 1.4.16 .globl Directive
1711 .globl sym1,sym2,...,symn
1713 where: sym1, represent legal symbolic names. When
1714 sym2,... When multiple symbols are specified,
1715 symn they are separated by commas.
1717 A .globl directive may also have a label field and/or a com-
1720 The .globl directive is provided to define (and thus provide
1721 linkage to) symbols not otherwise defined as global symbols
1722 within a module. In defining global symbols the directive
1723 .globl J is similar to:
1725 J == expression or J::
1727 Because object modules are linked by global symbols, these
1728 symbols are vital to a program. All internal symbols appearing
1729 within a given program must be defined at the end of pass 1 or
1730 they will be considered undefined. The assembly directive (-g)
1731 can be be invoked to make all undefined symbols global at the
1735 1.4.17 .if, .else, and .endif Directives
1741 . ;} range of true condition
1745 . ;} range of false condition
1749 The conditional assembly directives allow you to include or
1750 exclude blocks of source code during the assembly process, based
1751 on the evaluation of the condition test.
1753 The range of true condition will be processed if the expres-
1754 sion 'expr' is not zero (i.e. true) and the range of false con-
1755 dition will be processed if the expression 'expr' is zero (i.e
1756 false). The range of true condition is optional as is the .else
1757 directive and the range of false condition. The following are
1758 all valid .if/.else/.endif constructions:
1761 THE ASSEMBLER PAGE 1-24
1762 GENERAL ASSEMBLER DIRECTIVES
1766 .if A-4 ;evaluate A-4
1767 .byte 1,2 ;insert bytes if A-4 is
1770 .if K+3 ;evaluate K+3
1772 .byte 3,4 ;insert bytes if K+3
1775 .if J&3 ;evaluate J masked by 3
1776 .byte 12 ;insert this byte if J&3
1778 .byte 13 ;insert this byte if J&3
1782 The .if/.else/.endif directives may be nested upto 10 levels.
1784 The .page directive is processed within a false condition
1785 range to allow extended textual information to be incorporated
1786 in the source program with out the need to use the comment
1792 This text will be bypassed during assembly
1793 but appear in the listing file.
1801 1.4.18 .include Directive
1807 where: string represents a delimited string that is the file
1808 specification of an ASxxxx source file.
1810 The .include directive is used to insert a source file within
1811 the source file currently being assembled. When this directive
1812 is encountered, an implicit .page directive is issued. When the
1813 end of the specified source file is reached, an implicit .page
1814 directive is issued and input continues from the previous source
1815 file. The maximum nesting level of source files specified by a
1816 .include directive is five.
1819 THE ASSEMBLER PAGE 1-25
1820 GENERAL ASSEMBLER DIRECTIVES
1823 The total number of separately specified .include files is
1824 unlimited as each .include file is opened and then closed during
1825 each pass made by the assembler.
1828 1.4.19 .setdp Directive
1832 .setdp [base [,area]]
1834 The set direct page directive has a common format in all the
1835 AS68xx assemblers. The .setdp directive is used to inform the
1836 assembler of the current direct page region and the offset ad-
1837 dress within the selected area. The normal invocation methods
1847 for all the 68xx microprocessors (the 6804 has only the paged
1848 ram area). The commands specify that the direct page is in area
1849 DIRECT and its offset address is 0 (the only valid value for all
1850 but the 6809 microprocessor). Be sure to place the DIRECT area
1851 at address 0 during linking. When the base address and area are
1852 not specified, then zero and the current area are the defaults.
1853 If a .setdp directive is not issued the assembler defaults the
1854 direct page to the area "_CODE" at offset 0.
1856 The assembler verifies that any local variable used in a
1857 direct variable reference is located in this area. Local vari-
1858 able and constant value direct access addresses are checked to
1859 be within the address range from 0 to 255.
1861 External direct references are assumed by the assembler to be
1862 in the correct area and have valid offsets. The linker will
1863 check all direct page relocations to verify that they are within
1866 The 6809 microprocessor allows the selection of the direct
1867 page to be on any 256 byte boundary by loading the appropriate
1868 value into the dp register. Typically one would like to select
1869 the page boundary at link time, one method follows:
1872 THE ASSEMBLER PAGE 1-26
1873 GENERAL ASSEMBLER DIRECTIVES
1876 .area DIRECT (PAG) ; define the direct page
1883 ldd #DIRECT ; load the direct page register
1884 tfr a,dp ; for access to the direct page
1886 At link time specify the base and global equates to locate the
1892 Both the area address and offset value must be specified (area
1893 and variable names are independent). The linker will verify
1894 that the relocated direct page accesses are within the direct
1896 The preceeding sequence could be repeated for multiple paged
1897 areas, however an alternate method is to define a non-paged area
1898 and use the .setdp directive to specify the offset value:
1900 .area DIRECT ; define non-paged area
1906 .setdp 0,DIRECT ; direct page area
1907 ldd #DIRECT ; load the direct page register
1908 tfr a,dp ; for access to the direct page
1911 .setdp 0x100,DIRECT ; direct page area
1912 ldd #DIRECT+0x100 ; load the direct page register
1913 tfr a,dp ; for access to the direct page
1915 The linker will verify that subsequent direct page references
1916 are in the specified area and offset address range. It is the
1917 programmers responsibility to load the dp register with the cor-
1918 rect page segment corresponding to the .setdp base address
1921 For those cases where a single piece of code must access a
1922 defined data structure within a direct page and there are many
1923 pages, define a dumby direct page linked at address 0. This
1924 dumby page is used only to define the variable labels. Then
1925 load the dp register with the real base address but donot use a
1926 .setdp directive. This method is equivalent to indexed
1929 THE ASSEMBLER PAGE 1-27
1930 GENERAL ASSEMBLER DIRECTIVES
1933 addressing, where the dp register is the index register and the
1934 direct addressing is the offset.
1940 The ASxxxx assemblers are command line oriented. The PC as-
1941 semblers are started with the appropriate option(s) and file(s)
1942 to assemble following the assembler name:
1944 as-z80 [-dqxjgaloscpff] file1 [file2 file3 ... file6]
1950 x hex listing (default)
1952 The listing radix affects the
1953 .lst, .rel, and .sym files.
1955 j add line number and debug information to file
1956 g undefined symbols made global
1957 a all user symbols made global
1959 l create list output file1.lst
1960 o create object output file1.rel
1961 s create symbol output file1.sym
1963 c generate sdcdb debug information
1965 p disable listing pagination
1967 relocatable reference flagging:
1969 f by ` in the listing file
1970 ff by mode in the listing file
1972 asx8051 specific command line option:
1973 -I<dir> Add the named directory to the include file
1974 search path. This option may be used more than once.
1975 Directories are searched in the order given.
1977 The file name for the .lst, .rel, and .sym files is the first
1978 file name specified in the command line. All output files are
1979 ascii text files which may be edited, copied, etc. The output
1980 files are the concatenation of all the input files, if files are
1981 to be assembled independently invoke the assembler for each
1984 The .rel file contains a radix directive so that the linker
1985 will use the proper conversion for this file. Linked files may
1986 have different radices.
1988 ASXXXX assembles supported by and distributed with SDCC are:
1989 asx8051 (Intel 8051)
1990 as-z80 (Zilog Z80 / Hitachi HD64180)
1991 as-gbz80 (GameBoy Z80-like CPU)
1992 as-hc08 (Motorola 68HC08)
1995 THE ASSEMBLER PAGE 1-28
1999 If the list (l) option is specified without the symbol table
2000 (s) option, the symbol table is placed at the end of the listing
2007 The ASxxxx assemblers provide limited diagnostic error codes
2008 during the assembly process, these errors will be noted in the
2009 listing file and printed on the stderr device.
2011 The assembler reports the errors on the stderr device as
2013 ?ASxxxx-Error-<*> in line nnn of filename
2015 where * is the error code, nnn is the line number, and filename
2016 is the source/include file.
2020 (.) This error is caused by an absolute direct assign-
2021 ment of the current location counter
2022 . = expression (incorrect)
2023 rather than the correct
2026 (a) Indicates a machine specific addressing or address-
2029 (b) Indicates a direct page boundary error.
2031 (d) Indicates a direct page addressing error.
2033 (i) Caused by an .include file error or an .if/.endif
2036 (m) Multiple definitions of the same label, multiple
2037 .module directives, or multiple conflicting attri-
2038 butes in an .area directive.
2040 (o) Directive or mnemonic error or the use of the .org
2041 directive in a relocatable area.
2043 (p) Phase error: label location changing between passes
2044 2 and 3. Normally caused by having more than one
2045 level of forward referencing.
2047 (q) Questionable syntax: missing or improper operators,
2048 terminators, or delimiters.
2050 (r) Relocation error: logic operation attempted on a
2053 THE ASSEMBLER PAGE 1-29
2057 relocatable term, addition of two relocatable terms,
2058 subtraction of two relocatable terms not within the
2059 same programming area or external symbols.
2061 (u) Undefined symbol encountered during assembly.
2067 The (-l) option produces an ascii output listing file. Each
2068 page of output contains a four line header:
2071 1. The ASxxxx program name and page number
2073 2. Title from a .title directive (if any)
2075 3. Subtitle from a .sbttl directive (if any)
2081 Each succeeding line contains five fields:
2084 1. Error field (first three characters of line)
2086 2. Current location counter
2088 3. Generated code in byte format
2090 4. Source text line number
2095 The error field may contain upto 2 error flags indicating any
2096 errors encountered while assembling this line of source code.
2098 The current location counter field displays the 16-bit pro-
2099 gram position. This field will be in the selected radix.
2101 The generated code follows the program location. The listing
2102 radix determines the number of bytes that will be displayed in
2103 this field. Hexidecimal listing allows six bytes of data within
2104 the field, decimal and octal allow four bytes within the field.
2105 If more than one field of data is generated from the assembly of
2106 a single line of source code, then the data field is repeated on
2111 THE ASSEMBLER PAGE 1-30
2115 The source text line number is printed in decimal and is fol-
2116 lowed by the source text.
2118 Two special cases will disable the listing of a line of
2121 1. Source line with a .page directive is never listed.
2123 2. Source line with a .include file directive is not
2124 listed unless the .include file cannot be opened.
2127 Two data field options are available to flag those bytes
2128 which will be relocated by the linker. If the -f option is
2129 specified then each byte to be relocated will be preceeded by
2130 the '`' character. If the -ff option is specified then each
2131 byte to be relocated will be preceeded by one of the following
2134 1. * paged relocation
2136 2. u low byte of unsigned word or unsigned byte
2138 3. v high byte of unsigned word
2140 4. p PCR low byte of word relocation or PCR byte
2142 5. q PCR high byte of word relocation
2144 6. r low byte relocation or byte relocation
2146 7. s high byte relocation
2150 1.8 SYMBOL TABLE FILE
2153 The symbol table has two parts:
2155 1. The alphabetically sorted list of symbols and/or labels
2156 defined or referenced in the source program.
2158 2. A list of the program areas defined during assembly of
2162 The sorted list of symbols and/or labels contains the follow-
2165 1. Program area number (none if absolute value or exter-
2169 THE ASSEMBLER PAGE 1-31
2173 2. The symbol or label
2175 3. Directly assigned symbol is denoted with an (=) sign
2177 4. The value of a symbol, location of a label relative to
2178 the program area base address (=0), or a **** indicat-
2179 ing the symbol or label is undefined.
2181 5. The characters: G - global, R - relocatable, and X -
2185 The list of program areas provides the correspondence between
2186 the program area numbers and the defined program areas, the size
2187 of the program areas, and the area flags (attributes).
2193 The object file is an ascii file containing the information
2194 needed by the linker to bind multiple object modules into a com-
2195 plete loadable memory image. The object module contains the
2196 following designators:
2203 H Most significant byte first
2204 L Least significant byte first
2211 R Relocation information
2212 P Paging information
2214 Refer to the linker for a detailed description of each of the
2215 designators and the format of the information contained in the
2239 2.1 ASLINK RELOCATING LINKER
2242 ASLINK is the companion linker for the ASxxxx assemblers.
2244 The program ASLINK is a general relocating linker performing
2245 the following functions:
2247 1. Bind multiple object modules into a single memory image
2249 2. Resolve inter-module symbol references
2251 3. Combine code belonging to the same area from multiple
2252 object files into a single contiguous memory region
2254 4. Search and import object module libraries for undefined
2257 5. Perform byte and word program counter relative
2258 (pc or pcr) addressing calculations
2260 6. Define absolute symbol values at link time
2262 7. Define absolute area base address values at link time
2264 8. Produce Intel Hex or Motorola S19 output file
2266 9. Produce a map of the linked memory image
2268 10. Produce an updated listing file with the relocated ad-
2282 The linker may run in the command line mode or command file
2283 modes. The allowed startup linker commands are:
2285 -c/-f command line / command file modes
2287 -p/-n enable/disable echo file.lnk input to stdout
2289 If command line mode is selected, all linker commands come
2290 from stdin, if the command file mode is selected the commands
2291 are input from the specified file (extension must be .lnk).
2293 Most sytems require the initial options to be entered on the
2298 Some systems may request the arguments after the linker is
2299 started at a system specific prompt:
2304 After invoking the linker the valid options are:
2306 1. -i/-s Intel Hex (file.ihx) or Motorola S19 (file.s19)
2309 2. -m Generate a map file (file.map). This file con-
2310 tains a list of the symbols (by area) with absolute ad-
2311 dresses, sizes of linked areas, and other linking
2314 3. -xdq Specifies the number radix for the map file
2315 (Hexidecimal, Decimal, or Octal).
2317 4. -u Generate an updated listing file (file.rst)
2318 derived from the relocated addresses and data from the
2321 5. fileN Files to be linked. Files may be on the same
2322 line as the above options or on a separate line(s) one
2323 file per line or multiple files separated by spaces or
2326 6. -b area = expression (one definition per line)
2327 This specifies an area base address where the expres-
2328 sion may contain constants and/or defined symbols from
2331 7. -g symbol = expression (one definition per line)
2332 This specifies the value for the symbol where the ex-
2333 pression may contain constants and/or defined symbols
2334 from the linked files.
2336 8. -k library directory path
2337 (one definition per line) This specifies one possible
2345 path to an object library. More than one path is al-
2348 9. -l library file specification
2349 (one definition per line) This specifies a possible
2350 library file. More than one file is allowed.
2352 10. -e or null line, terminates input to the linker.
2354 ASLINK linkers supported by and distributed with SDCC are:
2356 link-z90 (Zilog Z80 / Hitachi HD64180)
2357 link-gbz80 (GameBoy Z80-like CPU)
2358 link-hc08 (Motorola 68HC08)
2360 aslink (Intel 8051) specific options:
2363 -j Produce NoICE debug as file[NOI]
2364 -z Produce SDCdb debug as file[cdb]
2365 -u Update listing file(s) with link data as file(s)[.RST]
2367 -a [iram-size] Check for internal RAM overflow
2368 -v [xram-size] Check for external RAM overflow
2369 -w [code-size] Check for code overflow
2370 -y Generate memory usage summary file[mem]
2371 -Y Pack internal ram
2372 -A [stack-size] Allocate space for stack
2375 link-z80 (Zilog Z80 / Hitachi HD64180) specific options:
2378 -j no$gmb symbol file generated as file[SYM]
2380 -z Produce SDCdb debug as file[cdb]
2381 -Z Gameboy image as file[GB]
2383 -u Update listing file(s) with link data as file(s)[.RST]
2386 link-gbz80 (GameBoy Z80-like CPU) specific options:
2389 -yo Number of rom banks (default: 2)
2390 -ya Number of ram banks (default: 0)
2391 -yt MBC type (default: no MBC)
2392 -yn Name of program (default: name of output file)
2393 -yp# Patch one byte in the output GB file (# is: addr=byte)
2395 -j no$gmb symbol file generated as file[SYM]
2397 -Z Gameboy image as file[GB]
2399 -u Update listing file(s) with link data as file(s)[.RST]
2402 link-hc08 (Motorola 68HC08) specific options:
2404 -t ELF executable as file[elf]
2405 -j Produce NoICE debug as file[NOI]
2406 -z Produce SDCdb debug as file[cdb]
2407 -u Update listing file(s) with link data as file(s)[.RST]
2409 -a [iram-size] Check for internal RAM overflow
2410 -v [xram-size] Check for external RAM overflow
2411 -w [code-size] Check for code overflow
2415 2.3 LIBRARY PATH(S) AND FILE(S)
2418 The process of resolving undefined symbols after scanning the
2419 input object files includes the scanning of object module
2420 libraries. The linker will search through all combinations of
2421 the library path specifications (input by the -k option) and the
2422 library file specifications (input by the -l option) that lead
2423 to an existing library file. Each library file contains a list
2424 (one file per line) of modules included in this particular
2425 library. Each existing object module is scanned for a match to
2426 the undefined symbol. The first module containing the symbol is
2427 then linked with the previous modules to resolve the symbol de-
2428 finition. The library object modules are rescanned until no
2429 more symbols can be resolved. The scanning algorithm allows
2430 resolution of back references. No errors are reported for non
2431 existant library files or object modules.
2433 The library file specification may be formed in one of two
2436 1. If the library file contained an absolute path/file
2437 specification then this is the object module's
2441 2. If the library file contains a relative path/file
2442 specification then the concatenation of the path and
2446 LIBRARY PATH(S) AND FILE(S)
2449 this file specification becomes the object module's
2454 As an example, assume there exists a library file termio.lib
2455 in the syslib directory specifying the following object modules:
2457 \6809\io_disk first object module
2458 d:\special\io_comm second object module
2460 and the following parameters were specified to the linker:
2462 -k c:\iosystem\ the first path
2463 -k c:\syslib\ the second path
2465 -l termio the first library file
2466 -l io the second library file (no such file)
2468 The linker will attempt to use the following object modules to
2469 resolve any undefined symbols:
2471 c:\syslib\6809\io_disk.rel (concatenated path/file)
2472 d:\special\io_comm.rel (absolute path/file)
2474 all other path(s)/file(s) don't exist. (No errors are reported
2475 for non existant path(s)/file(s).)
2478 2.4 ASLINK PROCESSING
2481 The linker processes the files in the order they are
2482 presented. The first pass through the input files is used to
2483 define all program areas, the section area sizes, and symbols
2484 defined or referenced. Undefined symbols will initiate a search
2485 of any specified library file(s) and the importing of the module
2486 containing the symbol definition. After the first pass the -b
2487 (area base address) definitions, if any, are processed and the
2490 The area linking proceeds by first examining the area types
2491 ABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separate
2492 object modules are always overlayed and have been assembled at a
2493 specific address, these are not normally relocated (if a -b com-
2494 mand is used on an absolute area the area will be relocated).
2495 Relative areas (normally defined as REL|CON) have a base address
2496 of 0x0000 as read from the object files, the -b command speci-
2497 fies the beginning address of the area. All subsequent relative
2498 areas will be concatenated with proceeding relative areas.
2499 Where specific ordering is desired, the first linker input file
2500 should have the area definitions in the desired order. At the
2507 completion of the area linking all area addresses and lengths
2508 have been determined. The areas of type PAG are verified to be
2509 on a 256 byte boundary and that the length does not exceed 256
2510 bytes. Any errors are noted on stderr and in the map file.
2512 Next the global symbol definitions (-g option), if any, are
2513 processed. The symbol definitions have been delayed until this
2514 point because the absolute addresses of all internal symbols are
2515 known and can be used in the expression calculations.
2517 Before continuing with the linking process the symbol table
2518 is scanned to determine if any symbols have been referenced but
2519 not defined. Undefined symbols are listed on the stderr device.
2520 if a .module directive was included in the assembled file the
2521 module making the reference to this undefined variable will be
2524 Constants defined as global in more than one module will be
2525 flagged as multiple definitions if their values are not identi-
2528 After the preceeding processes are complete the linker may
2529 output a map file (-m option). This file provides the following
2532 1. Global symbol values and label absolute addresses
2534 2. Defined areas and there lengths
2536 3. Remaining undefined symbols
2538 4. List of modules linked
2540 5. List of library modules linked
2542 6. List of -b and -g definitions
2547 The final step of the linking process is performed during the
2548 second pass of the input files. As the xxx.rel files are read
2549 the code is relocated by substituting the physical addresses for
2550 the referenced symbols and areas and may be output in Intel or
2551 Motorola formats. The number of files linked and symbols de-
2552 fined/referenced is limited by the processor space available to
2553 build the area/symbol lists. If the -u option is specified then
2554 the listing files (file.lst) associated with the relocation
2555 files (file.rel) are scanned and used to create a new file
2556 (file.rst) which has all addresses and data relocated to their
2565 2.5 LINKER INPUT FORMAT
2568 The linkers' input object file is an ascii file containing
2569 the information needed by the linker to bind multiple object
2570 modules into a complete loadable memory image.
2572 The object module contains the following designators:
2579 H Most significant byte first
2580 L Least significant byte first
2587 R Relocation information
2588 P Paging information
2591 2.5.1 Object Module Format
2594 The first line of an object module contains the [XDQ][HL]
2595 format specifier (i.e. XH indicates a hexidecimal file with
2596 most significant byte first) for the following designators.
2601 H aa areas gg global symbols
2603 The header line specifies the number of areas(aa) and the
2604 number of global symbols(gg) defined or referenced in this ob-
2605 ject module segment.
2618 The module line specifies the module name from which this
2619 header segment was assembled. The module line will not appear
2620 if the .module directive was not used in the source program.
2631 The symbol line defines (Def) or references (Ref) the symbol
2632 'string' with the value nnnn. The defined value is relative to
2633 the current area base address. References to constants and ex-
2634 ternal global symbols will always appear before the first area
2635 definition. References to external symbols will have a value of
2641 A label size ss flags ff
2643 The area line defines the area label, the size (ss) of the
2644 area in bytes, and the area flags (ff). The area flags specify
2645 the ABS, REL, CON, OVR, and PAG parameters:
2647 OVR/CON (0x04/0x00 i.e. bit position 2)
2649 ABS/REL (0x08/0x00 i.e. bit position 3)
2651 PAG (0x10 i.e. bit position 4)
2656 T xx xx nn nn nn nn nn ...
2658 The T line contains the assembled code output by the assem-
2659 bler with xx xx being the offset address from the current area
2660 base address and nn being the assembled instructions and data in
2672 R 0 0 nn nn n1 n2 xx xx ...
2674 The R line provides the relocation information to the linker.
2675 The nn nn value is the current area index, i.e. which area the
2676 current values were assembled. Relocation information is en-
2677 coded in groups of 4 bytes:
2679 1. n1 is the relocation mode and object format, for the
2680 adhoc extension modes refer to asxxxx.h or aslink.h
2681 1. bit 0 word(0x00)/byte(0x01)
2682 2. bit 1 relocatable area(0x00)/symbol(0x02)
2683 3. bit 2 normal(0x00)/PC relative(0x04) relocation
2684 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for
2686 5. bit 4 signed(0x00)/unsigned(0x10) byte data
2687 6. bit 5 normal(0x00)/page '0'(0x20) reference
2688 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference
2689 8. bit 7 LSB byte(0x00)/MSB byte(0x80) with 2-byte
2692 2. n2 is a byte index into the corresponding (i.e. pre-
2693 ceeding) T line data (i.e. a pointer to the data to be
2694 updated by the relocation). The T line data may be
2695 1-byte or 2-byte byte data format or 2-byte word
2698 3. xx xx is the area/symbol index for the area/symbol be-
2699 ing referenced. the corresponding area/symbol is found
2700 in the header area/symbol lists.
2703 The groups of 4 bytes are repeated for each item requiring relo-
2704 cation in the preceeding T line.
2709 P 0 0 nn nn n1 n2 xx xx
2711 The P line provides the paging information to the linker as
2712 specified by a .setdp directive. The format of the relocation
2713 information is identical to that of the R line. The correspond-
2714 ing T line has the following information:
2717 Where aa aa is the area reference number which specifies the
2718 selected page area and bb bb is the base address of the page.
2719 bb bb will require relocation processing if the 'n1 n2 xx xx' is
2720 specified in the P line. The linker will verify that the base
2727 address is on a 256 byte boundary and that the page length of an
2728 area defined with the PAG type is not larger than 256 bytes.
2730 The linker defaults any direct page references to the first
2731 area defined in the input REL file. All ASxxxx assemblers will
2732 specify the _CODE area first, making this the default page area.
2735 2.6 LINKER ERROR MESSAGES
2738 The linker provides detailed error messages allowing the pro-
2739 grammer to quickly find the errant code. As the linker com-
2740 pletes pass 1 over the input file(s) it reports any page
2741 boundary or page length errors as follows:
2743 ?ASlink-Warning-Paged Area PAGE0 Boundary Error
2747 ?ASlink-Warning-Paged Area PAGE0 Length Error
2749 where PAGE0 is the paged area.
2751 During Pass two the linker reads the T, R, and P lines per-
2752 forming the necessary relocations and outputting the absolute
2753 code. Various errors may be reported during this process
2754 The P line processing can produce only one possible error:
2756 ?ASlink-Warning-Page Definition Boundary Error
2757 file module pgarea pgoffset
2758 PgDef t6809l t6809l PAGE0 0001
2760 The error message specifies the file and module where the .setdp
2761 direct was issued and indicates the page area and the page
2762 offset value determined after relocation.
2765 The R line processing produces various errors:
2767 ?ASlink-Warning-Byte PCR relocation error for symbol bra2
2768 file module area offset
2769 Refby t6809l t6809l TEST 00FE
2770 Defin tconst tconst . .ABS. 0080
2772 ?ASlink-Warning-Unsigned Byte error for symbol two56
2773 file module area offset
2774 Refby t6800l t6800l DIRECT 0015
2775 Defin tconst tconst . .ABS. 0100
2778 THE LINKER PAGE 2-10
2779 LINKER ERROR MESSAGES
2782 ?ASlink-Warning-Page0 relocation error for symbol ltwo56
2783 file module area offset
2784 Refby t6800l t6800l DIRECT 000D
2785 Defin tconst tconst DIRECT 0100
2787 ?ASlink-Warning-Page Mode relocation error for symbol two56
2788 file module area offset
2789 Refby t6809l t6809l DIRECT 0005
2790 Defin tconst tconst . .ABS. 0100
2792 ?ASlink-Warning-Page Mode relocation error
2793 file module area offset
2794 Refby t Pagetest PROGRAM 0006
2795 Defin t Pagetest DIRECT 0100
2797 These error messages specify the file, module, area, and offset
2798 within the area of the code referencing (Refby) and defining
2799 (Defin) the symbol. If the symbol is defined in the same module
2800 as the reference the linker is unable to report the symbol name.
2801 The assembler listing file(s) should be examined at the offset
2802 from the specified area to located the offending code.
2806 1. The byte PCR error is caused by exceeding the pc rela-
2807 tive byte branch range.
2809 2. The Unsigned byte error indicates an indexing value was
2810 negative or larger than 255.
2812 3. The Page0 error is generated if the direct page vari-
2813 able is not in the page0 range of 0 to 255.
2815 4. The page mode error is generated if the direct variable
2816 is not within the current direct page (6809).
2820 THE LINKER Page 2-11
2821 INTEL HEX OUTPUT FORMAT
2824 2.7 INTEL HEX OUTPUT FORMAT
2826 Record Mark Field - This field signifies the start of a
2827 record, and consists of an ascii colon
2830 Record Length Field - This field consists of two ascii
2831 characters which indicate the number of
2832 data bytes in this record. The
2833 characters are the result of converting
2834 the number of bytes in binary to two
2835 ascii characters, high digit first. An
2836 End of File record contains two ascii
2837 zeros in this field.
2839 Load Address Field - This field consists of the four ascii
2840 characters which result from converting
2841 the the binary value of the address in
2842 which to begin loading this record. The
2843 order is as follows:
2845 High digit of high byte of address.
2846 Low digit of high byte of address.
2847 High digit of low byte of address.
2848 Low digit of low byte of address.
2850 In an End of File record this field con-
2851 sists of either four ascii zeros or the
2852 program entry address. Currently the
2853 entry address option is not supported.
2855 Record Type Field - This field identifies the record type,
2856 which is either 0 for data records or 1
2857 for an End of File record. It consists
2858 of two ascii characters, with the high
2859 digit of the record type first, followed
2860 by the low digit of the record type.
2862 Data Field - This field consists of the actual data,
2863 converted to two ascii characters, high
2864 digit first. There are no data bytes in
2865 the End of File record.
2867 Checksum Field - The checksum field is the 8 bit binary
2868 sum of the record length field, the load
2869 address field, the record type field,
2870 and the data field. This sum is then
2871 negated (2's complement) and converted
2872 to two ascii characters, high digit
2876 THE LINKER Page 2-12
2877 MOTOROLA S1-S9 OUTPUT FORMAT
2880 2.8 MOTORLA S1-S9 OUTPUT FORMAT
2882 Record Type Field - This field signifies the start of a
2883 record and identifies the the record
2886 Ascii S1 - Data Record
2887 Ascii S9 - End of File Record
2889 Record Length Field - This field specifies the record length
2890 which includes the address, data, and
2891 checksum fields. The 8 bit record
2892 length value is converted to two ascii
2893 characters, high digit first.
2895 Load Address Field - This field consists of the four ascii
2896 characters which result from converting
2897 the the binary value of the address in
2898 which to begin loading this record. The
2899 order is as follows:
2901 High digit of high byte of address.
2902 Low digit of high byte of address.
2903 High digit of low byte of address.
2904 Low digit of low byte of address.
2906 In an End of File record this field con-
2907 sists of either four ascii zeros or the
2908 program entry address. Currently the
2909 entry address option is not supported.
2911 Data Field - This field consists of the actual data,
2912 converted to two ascii characters, high
2913 digit first. There are no data bytes in
2914 the End of File record.
2916 Checksum Field - The checksum field is the 8 bit binary
2917 sum of the record length field, the load
2918 address field, and the data field. This
2919 sum is then complemented (1's comple-
2920 ment) and converted to two ascii
2921 characters, high digit first.
2938 BUILDING ASXXXX AND ASLINK
2943 The assemblers and linker have been successfully compiled us-
2944 ing the DECUS C (PDP-11) compiler (patch level 9) with
2945 RT-11/TSX+, Eyring Research Institute, Inc. PDOS (680x0) C
2946 V5.4b compiler, and Symantec C/C++ V6.1/V7.2.
2948 The device specific header file (i.e. m6800.h, m6801.h,
2949 etc.) contains the DECUS C 'BUILD' directives for generating a
2950 command file to compile, assemble, and link the necessary files
2951 to prepare an executable image for a particular assembler.
2954 3.1 BUILDING AN ASSEMBLER
2957 The building of a typical assembler (6809 for example) re-
2958 quires the following files:
2976 The first five files are the 6809 processor dependent sec-
2977 tions which contain the following:
2982 BUILDING ASXXXX AND ASLINK PAGE 3-2
2983 BUILDING AN ASSEMBLER
2986 1. m6809.h - header file containing the machine specific
2987 definitions of constants, variables, structures, and
2990 2. m09ext - device description, byte order, and file ex-
2993 3. m09pst - a table of the assembler general directives,
2994 special device directives, and assembler mnemonics with
2995 associated operation codes
2997 4. m09mch / m09adr - machine specific code for processing
2998 the device mnemonics, addressing modes, and special
3002 The remaining nine files provide the device independent sec-
3003 tions which handle the details of file input/output, symbol
3004 table generation, program/data areas, expression analysis, and
3005 assembler directive processing.
3011 The building of the linker requires the following files:
3049 A.1 6800 REGISTER SET
3051 The following is a list of the 6800 registers used by AS6800:
3053 a,b - 8-bit accumulators
3057 A.2 6800 INSTRUCTION SET
3060 The following tables list all 6800/6802/6808 mnemonics recog-
3061 nized by the AS6800 assembler. The designation [] refers to a
3062 required addressing mode argument. The following list specifies
3063 the format for each addressing mode supported by AS6800:
3065 #data immediate data
3068 *dir direct page addressing
3069 (see .setdp directive)
3070 0 <= dir <= 255
3072 ,x register indirect addressing
3075 offset,x register indirect addressing
3076 0 <= offset <= 255
3078 ext extended addressing
3082 The terms data, dir, offset, ext, and label may all be expres-
3087 AS6800 ASSEMBLER PAGE A-2
3088 6800 INSTRUCTION SET
3091 Note that not all addressing modes are valid with every in-
3092 struction, refer to the 6800 technical data for valid modes.
3095 A.2.1 Inherent Instructions
3117 A.2.2 Branch Instructions
3130 AS6800 ASSEMBLER PAGE A-3
3131 6800 INSTRUCTION SET
3134 A.2.3 Single Operand Instructions
3185 AS6800 ASSEMBLER PAGE A-4
3186 6800 INSTRUCTION SET
3189 A.2.4 Double Operand Instructions
3225 A.2.5 Jump and Jump to Subroutine Instructions
3232 AS6800 ASSEMBLER PAGE A-5
3233 6800 INSTRUCTION SET
3236 A.2.6 Long Register Instructions
3263 B.1 .hd6303 DIRECTIVE
3269 The .hd6303 directive enables processing of the HD6303 specific
3270 mnemonics not included in the 6801 instruction set. HD6303
3271 mnemonics encountered without the .hd6303 directive will be
3272 flagged with an 'o' error.
3275 B.2 6801 REGISTER SET
3277 The following is a list of the 6801 registers used by AS6801:
3279 a,b - 8-bit accumulators
3280 d - 16-bit accumulator <a:b>
3284 B.3 6801 INSTRUCTION SET
3287 The following tables list all 6801/6303 mnemonics recognized
3288 by the AS6801 assembler. The designation [] refers to a re-
3289 quired addressing mode argument. The following list specifies
3290 the format for each addressing mode supported by AS6801:
3292 #data immediate data
3295 *dir direct page addressing
3296 (see .setdp directive)
3297 0 <= dir <= 255
3301 AS6801 ASSEMBLER PAGE B-2
3302 6801 INSTRUCTION SET
3305 ,x register indirect addressing
3308 offset,x register indirect addressing
3309 0 <= offset <= 255
3311 ext extended addressing
3315 The terms data, dir, offset, ext, and label may all be expres-
3318 Note that not all addressing modes are valid with every in-
3319 struction, refer to the 6801/6303 technical data for valid
3323 B.3.1 Inherent Instructions
3341 B.3.2 Branch Instructions
3355 AS6801 ASSEMBLER PAGE B-3
3356 6801 INSTRUCTION SET
3359 B.3.3 Single Operand Instructions
3413 AS6801 ASSEMBLER PAGE B-4
3414 6801 INSTRUCTION SET
3426 B.3.4 Double Operand Instructions
3431 adda [] addb [] addd []
3432 add a [] add b [] add d []
3455 suba [] subb [] subd []
3456 sub a [] sub b [] sub d []
3461 AS6801 ASSEMBLER PAGE B-5
3462 6801 INSTRUCTION SET
3465 B.3.5 Jump and Jump to Subroutine Instructions
3470 B.3.6 Long Register Instructions
3478 B.3.7 6303 Specific Instructions
3480 aim #data, [] eim #data, []
3481 oim #data, [] tim #data, []
3505 Requires the .setdp directive to specify the ram area.
3508 C.1 6804 REGISTER SET
3510 The following is a list of the 6804 registers used by AS6804:
3512 x,y - index registers
3515 C.2 6804 INSTRUCTION SET
3518 The following tables list all 6804 mnemonics recognized by
3519 the AS6804 assembler. The designation [] refers to a required
3520 addressing mode argument. The following list specifies the
3521 format for each addressing mode supported by AS6804:
3523 #data immediate data
3526 ,x register indirect addressing
3528 dir direct addressing
3529 (see .setdp directive)
3530 0 <= dir <= 255
3532 ext extended addressing
3536 The terms data, dir, and ext may be expressions. The label for
3537 the short branchs beq, bne, bcc, and bcs must not be external.
3539 Note that not all addressing modes are valid with every in-
3540 struction, refer to the 6804 technical data for valid modes.
3543 AS6804 ASSEMBLER PAGE C-2
3544 6804 INSTRUCTION SET
3547 C.2.1 Inherent Instructions
3558 C.2.2 Branch Instructions
3564 C.2.3 Single Operand Instructions
3576 C.2.4 Jump and Jump to Subroutine Instructions
3582 C.2.5 Bit Test Instructions
3584 brclr #data,[],label
3585 brset #data,[],label
3593 AS6804 ASSEMBLER PAGE C-3
3594 6804 INSTRUCTION SET
3597 C.2.6 Load Immediate data Instruction
3602 C.2.7 6804 Derived Instructions
3649 D.1 6805 REGISTER SET
3651 The following is a list of the 6805 registers used by AS6805:
3653 a - 8-bit accumulator
3657 D.2 6805 INSTRUCTION SET
3660 The following tables list all 6805 mnemonics recognized by
3661 the AS6805 assembler. The designation [] refers to a required
3662 addressing mode argument. The following list specifies the
3663 format for each addressing mode supported by AS6805:
3665 #data immediate data
3668 *dir direct page addressing
3669 (see .setdp directive)
3670 0 <= dir <= 255
3672 ,x register indirect addressing
3675 offset,x register indirect addressing
3676 0 <= offset <= 255 --- byte mode
3677 256 <= offset <= 65535 --- word mode
3678 (an externally defined offset uses the
3681 ext extended addressing
3687 AS6805 ASSEMBLER PAGE D-2
3688 6805 INSTRUCTION SET
3691 The terms data, dir, offset, and ext may all be expressions.
3693 Note that not all addressing modes are valid with every in-
3694 struction, refer to the 6805 technical data for valid modes.
3697 D.2.1 Control Instructions
3708 D.2.2 Bit Manipulation Instructions
3710 brset #data,*dir,label
3711 brclr #data,*dir,label
3717 D.2.3 Branch Instructions
3723 bhcc label bhcs label
3730 AS6805 ASSEMBLER PAGE D-3
3731 6805 INSTRUCTION SET
3734 D.2.4 Read-Modify-Write Instructions
3770 D.2.5 Register\Memory Instructions
3781 AS6805 ASSEMBLER PAGE D-4
3782 6805 INSTRUCTION SET
3785 D.2.6 Jump and Jump to Subroutine Instructions
3810 E.1 68HC08 REGISTER SET
3812 The following is a list of the 68HC08 registers used by
3815 a - 8-bit accumulator
3816 x - index register <H:X>
3820 E.2 68HC08 INSTRUCTION SET
3823 The following tables list all 68HC08 mnemonics recognized by
3824 the AS6808 assembler. The designation [] refers to a required
3825 addressing mode argument. The following list specifies the
3826 format for each addressing mode supported by AS6808:
3828 #data immediate data
3831 *dir direct page addressing
3832 (see .setdp directive)
3833 0 <= dir <= 255
3835 ,x register indexed addressing
3838 offset,x register indexed addressing
3839 0 <= offset <= 255 --- byte mode
3840 256 <= offset <= 65535 --- word mode
3841 (an externally defined offset uses the
3844 ,x+ register indexed addressing
3845 zero offset with post increment
3848 AS6808 ASSEMBLER PAGE E-2
3849 68HC08 INSTRUCTION SET
3853 offset,x+ register indexed addressing
3854 unsigned byte offset with post increment
3856 offset,s stack pointer indexed addressing
3857 0 <= offset <= 255 --- byte mode
3858 256 <= offset <= 65535 --- word mode
3859 (an externally defined offset uses the
3862 ext extended addressing
3866 The terms data, dir, offset, and ext may all be expressions.
3868 Note that not all addressing modes are valid with every in-
3869 struction, refer to the 68HC08 technical data for valid modes.
3872 E.2.1 Control Instructions
3883 E.2.2 Bit Manipulation Instructions
3885 brset #data,*dir,label
3886 brclr #data,*dir,label
3892 AS6808 ASSEMBLER PAGE E-3
3893 68HC08 INSTRUCTION SET
3896 E.2.3 Branch Instructions
3902 bhcc label bhcs label
3911 E.2.4 Complex Branch Instructions
3921 AS6808 ASSEMBLER PAGE E-4
3922 68HC08 INSTRUCTION SET
3925 E.2.5 Read-Modify-Write Instructions
3968 AS6808 ASSEMBLER PAGE E-5
3969 68HC08 INSTRUCTION SET
3972 E.2.6 Register\Memory Instructions
3983 E.2.7 Double Operand Move Instruction
3988 E.2.8 16-Bit <H:X> Index Register Instructions
3995 E.2.9 Jump and Jump to Subroutine Instructions
4020 F.1 6809 REGISTER SET
4022 The following is a list of the 6809 registers used by AS6809:
4024 a,b - 8-bit accumulators
4025 d - 16-bit accumulator <a:b>
4026 x,y - index registers
4027 s,u - stack pointers
4028 pc - program counter
4033 F.2 6809 INSTRUCTION SET
4036 The following tables list all 6809 mnemonics recognized by
4037 the AS6809 assembler. The designation [] refers to a required
4038 addressing mode argument. The following list specifies the
4039 format for each addressing mode supported by AS6809:
4041 #data immediate data
4044 *dir direct page addressing
4045 (see .setdp directive)
4046 0 <= dir <= 255
4051 cc,a,b,d,dp,x,y,s,u,pc
4053 ,-x ,--x register indexed
4058 AS6809 ASSEMBLER PAGE F-2
4059 6809 INSTRUCTION SET
4062 ,x+ ,x++ register indexed
4065 ,x register indexed addressing
4068 offset,x register indexed addressing
4069 -16 <= offset <= 15 --- 5-bit
4070 -128 <= offset <= -17 --- 8-bit
4071 16 <= offset <= 127 --- 8-bit
4072 -32768 <= offset <= -129 --- 16-bit
4073 128 <= offset <= 32767 --- 16-bit
4074 (external definition of offset
4077 a,x accumulator offset indexed addressing
4079 ext extended addressing
4081 ext,pc pc addressing ( pc <- pc + ext )
4083 ext,pcr pc relative addressing
4085 [,--x] register indexed indirect
4088 [,x++] register indexed indirect
4091 [,x] register indexed indirect addressing
4094 [offset,x] register indexed indirect addressing
4095 -128 <= offset <= 127 --- 8-bit
4096 -32768 <= offset <= -129 --- 16-bit
4097 128 <= offset <= 32767 --- 16-bit
4098 (external definition of offset
4101 [a,x] accumulator offset indexed
4104 [ext] extended indirect addressing
4106 [ext,pc] pc indirect addressing
4107 ( [pc <- pc + ext] )
4109 [ext,pcr] pc relative indirect addressing
4111 The terms data, dir, label, offset, and ext may all be expres-
4116 AS6809 ASSEMBLER PAGE F-3
4117 6809 INSTRUCTION SET
4120 Note that not all addressing modes are valid with every in-
4121 struction, refer to the 6809 technical data for valid modes.
4124 F.2.1 Inherent Instructions
4134 F.2.2 Short Branch Instructions
4139 bhis label bhs label
4141 blos label bls label
4149 F.2.3 Long Branch Instructions
4151 lbcc label lbcs label
4152 lbeq label lbge label
4153 lbgt label lbhi label
4154 lbhis label lbhs label
4155 lble label lblo label
4156 lblos label lbls label
4157 lblt label lbmi label
4158 lbne label lbpl label
4159 lbra label lbrn label
4160 lbvc label lbvs label
4164 AS6809 ASSEMBLER PAGE F-4
4165 6809 INSTRUCTION SET
4168 F.2.4 Single Operand Instructions
4207 AS6809 ASSEMBLER PAGE F-5
4208 6809 INSTRUCTION SET
4211 F.2.5 Double Operand Instructions
4236 F.2.6 D-register Instructions
4243 F.2.7 Index/Stack Register Instructions
4261 AS6809 ASSEMBLER PAGE F-6
4262 6809 INSTRUCTION SET
4265 F.2.8 Jump and Jump to Subroutine Instructions
4270 F.2.9 Register - Register Instructions
4275 F.2.10 Condition Code Register Instructions
4277 andcc #data orcc #data
4281 F.2.11 6800 Compatibility Instructions
4321 G.1 68HC11 REGISTER SET
4323 The following is a list of the 68HC11 registers used by AS6811:
4325 a,b - 8-bit accumulators
4326 d - 16-bit accumulator <a:b>
4327 x,y - index registers
4330 G.2 68HC11 INSTRUCTION SET
4333 The following tables list all 68HC11 mnemonics recognized by
4334 the AS6811 assembler. The designation [] refers to a required
4335 addressing mode argument. The following list specifies the
4336 format for each addressing mode supported by AS6811:
4338 #data immediate data
4341 *dir direct page addressing
4342 (see .setdp directive)
4343 0 <= dir <= 255
4345 ,x register indirect addressing
4348 offset,x register indirect addressing
4349 0 <= offset <= 255
4351 ext extended addressing
4355 The terms data, dir, offset, and ext may all be expressions.
4359 AS6811 ASSEMBLER PAGE G-2
4360 68HC11 INSTRUCTION SET
4363 Note that not all addressing modes are valid with every in-
4364 struction, refer to the 68HC11 technical data for valid modes.
4367 G.2.1 Inherent Instructions
4399 G.2.2 Branch Instructions
4413 AS6811 ASSEMBLER PAGE G-3
4414 68HC11 INSTRUCTION SET
4417 G.2.3 Single Operand Instructions
4468 AS6811 ASSEMBLER PAGE G-4
4469 68HC11 INSTRUCTION SET
4472 G.2.4 Double Operand Instructions
4477 adda [] addb [] addd []
4478 add a [] add b [] add d []
4504 suba [] subb [] subd []
4505 sub a [] sub b [] sub d []
4508 G.2.5 Bit Manupulation Instructions
4513 brclr [],#data,label
4514 brset [],#data,label
4519 AS6811 ASSEMBLER PAGE G-5
4520 68HC11 INSTRUCTION SET
4523 G.2.6 Jump and Jump to Subroutine Instructions
4528 G.2.7 Long Register Instructions
4559 H.1 68HC12 REGISTER SET
4561 The following is a list of the 68HC12 registers used by AS6812:
4563 a,b - 8-bit accumulators
4564 d - 16-bit accumulator <a:b>
4565 x,y - index registers
4566 sp,s - stack pointer
4567 pc - program counter
4568 ccr,cc - condition code register
4571 H.2 68HC12 INSTRUCTION SET
4574 The following tables list all 68HC12 mnemonics recognized by
4575 the AS6812 assembler. The designation [] refers to a required
4576 addressing mode argument. The following list specifies the
4577 format for each addressing mode supported by AS6812:
4579 #data immediate data
4582 ext extended addressing
4584 pg memory page number
4586 *dir direct page addressing
4587 (see .setdp directive)
4588 0 <= dir <= 255
4597 AS6812 ASSEMBLER PAGE H-2
4598 68HC12 INSTRUCTION SET
4601 -x x- register indexed, pre or
4602 ,-x ,x- post autodecrement by 1
4604 n,-x n,x- register indexed, pre or
4605 post autodecrement by 1 - 8
4607 +x x+ register indexed, pre or
4608 ,+x ,x+ post autoincrement by 1
4610 n,+x n,x+ register indexed, pre or
4611 post autoincrement by 1 - 8
4613 offset,x register indexed addressing
4614 -16 <= offset <= 15 --- 5-bit
4615 -256 <= offset <= -17 --- 9-bit
4616 16 <= offset <= 255 --- 9-bit
4617 -32768 <= offset <= -257 --- 16-bit
4618 256 <= offset <= 32767 --- 16-bit
4619 (external definition of offset
4622 [offset,x] register indexed indirect addressing
4623 -32768 <= offset <= 32767 --- 16-bit
4625 [,x] register indexed indirect addressing
4628 a,x accumulator offset indexed addressing
4630 [d,x] d accumulator offset indexed
4633 The terms data, dir, label, offset, and ext may all be expres-
4636 Note that not all addressing modes are valid with every in-
4637 struction, refer to the 68HC12 technical data for valid modes.
4640 AS6812 ASSEMBLER PAGE H-3
4641 68HC12 INSTRUCTION SET
4644 H.2.1 Inherent Instructions
4663 H.2.2 Short Branch Instructions
4668 bhis label bhs label
4670 blos label bls label
4678 H.2.3 Long Branch Instructions
4680 lbcc label lbcs label
4681 lbeq label lbge label
4682 lbgt label lbhi label
4683 lbhis label lbhs label
4684 lble label lblo label
4685 lblos label lbls label
4686 lblt label lbmi label
4687 lbne label lbpl label
4688 lbra label lbrn label
4689 lbvc label lbvs label
4692 AS6812 ASSEMBLER PAGE H-4
4693 68HC12 INSTRUCTION SET
4696 H.2.4 Branch on Decrement, Test, or Increment
4698 dbeq r,label dbne r,label
4699 ibeq r,label ibne r,label
4700 tbeq r,label tbne r,label
4703 H.2.5 Bit Clear and Set Instructions
4709 H.2.6 Branch on Bit Clear or Set
4711 brclr [],#data,label
4712 brset [],#data,label
4715 AS6812 ASSEMBLER PAGE H-5
4716 68HC12 INSTRUCTION SET
4719 H.2.7 Single Operand Instructions
4758 AS6812 ASSEMBLER PAGE H-6
4759 68HC12 INSTRUCTION SET
4762 H.2.8 Double Operand Instructions
4776 ldaa [] <=> lda []
4778 ldab [] <=> ldb []
4780 oraa [] <=> ora []
4782 orab [] <=> orb []
4786 staa [] <=> sta []
4788 stab [] <=> stb []
4793 H.2.9 Move Instructions
4795 movb [],[] movw [],[]
4798 H.2.10 D-register Instructions
4801 cpd [] <=> cmpd []
4805 AS6812 ASSEMBLER PAGE H-7
4806 68HC12 INSTRUCTION SET
4809 H.2.11 Index/Stack Register Instructions
4811 cps [] <=> cmps []
4812 cpx [] <=> cmpx []
4813 cpy [] <=> cmpy []
4825 H.2.12 Jump and Jump/Call to Subroutine Instructions
4831 H.2.13 Other Special Instructions
4842 H.2.14 Register - Register Instructions
4848 H.2.15 Condition Code Register Instructions
4850 andcc #data orcc #data
4853 AS6812 ASSEMBLER PAGE H-8
4854 68HC12 INSTRUCTION SET
4857 H.2.16 M68HC11 Compatibility Mode Instructions
4887 I.1 68HC16 REGISTER SET
4889 The following is a list of the 68HC16 registers used by AS6816:
4891 a,b - 8-bit accumulators
4892 d - 16-bit accumulator <a:b>
4893 e - 16-bit accumulator
4894 x,y,z - index registers
4895 k - address extension register
4897 ccr - condition code
4900 I.2 68HC16 INSTRUCTION SET
4903 The following tables list all 68HC16 mnemonics recognized by
4904 the AS6816 assembler. The designation [] refers to a required
4905 addressing mode argument. The following list specifies the
4906 format for each addressing mode supported by AS6816:
4908 #data immediate data
4911 #xo,#yo local immediate data (mac / rmac)
4918 ,x zero offset register indexed addressing
4922 offset,x register indexed addressing
4925 AS6816 ASSEMBLER PAGE I-2
4926 68HC16 INSTRUCTION SET
4929 0 <= offset <= 255 --- 8-bit
4930 -32768 <= offset <= -1 --- 16-bit
4931 256 <= offset <= 32767 --- 16-bit
4932 (external definition of offset
4935 offset,x8 unsigned 8-bit offset indexed addressing
4936 offset,x16 signed 16-bit offset indexed addressing
4938 e,x accumulator offset indexed addressing
4940 ext extended addressing
4942 bank 64K bank number (jmp / jsr)
4944 The terms data, label, offset, bank, and ext may all be expres-
4947 Note that not all addressing modes are valid with every in-
4948 struction, refer to the 6816 technical data for valid modes.
4951 I.2.1 Inherent Instructions
4957 ediv edivs emul emuls
4958 fdiv fmuls idiv ldhi
4960 pshb pshmac pula pulb
4977 AS6816 ASSEMBLER PAGE I-3
4978 68HC16 INSTRUCTION SET
4981 I.2.2 Push/Pull Multiple Register Instructions
4983 pshm r,... pulm r,...
4986 I.2.3 Short Branch Instructions
4991 bhis label bhs label
4993 blos label bls label
5001 I.2.4 Long Branch Instructions
5003 lbcc label lbcs label
5004 lbeq label lbge label
5005 lbgt label lbhi label
5006 lbhis label lbhs label
5007 lble label lblo label
5008 lblos label lbls label
5009 lblt label lbmi label
5010 lbne label lbpl label
5011 lbra label lbrn label
5012 lbvc label lbvs label
5016 I.2.5 Bit Manipulation Instructions
5021 brclr [],#data,label
5022 brset [],#data,label
5025 AS6816 ASSEMBLER PAGE I-4
5026 68HC16 INSTRUCTION SET
5029 I.2.6 Single Operand Instructions
5082 AS6816 ASSEMBLER PAGE I-5
5083 68HC16 INSTRUCTION SET
5086 I.2.7 Double Operand Instructions
5121 I.2.8 Index/Stack Register Instructions
5133 AS6816 ASSEMBLER PAGE I-6
5134 68HC16 INSTRUCTION SET
5137 I.2.9 Jump and Jump to Subroutine Instructions
5139 jmp bank,[] jsr bank,[]
5142 I.2.10 Condition Code Register Instructions
5144 andp #data orp #data
5147 I.2.11 Multiply and Accumulate Instructions
5149 mac #data rmac #data
5150 mac #xo,#yo rmac #xo,#yo
5173 J.1 H8/3XX REGISTER SET
5175 The following is a list of the H8 registers used by ASH8:
5177 r0 - r7,sp 16-bit accumulators
5178 r0L - r7L,spL 8-bit accumulators
5179 r0H - r7H,spH 8-bit accumulators
5180 spL,spH,sp stack pointers
5184 J.2 H8/3XX INSTRUCTION SET
5187 The following tables list all H8/3xx mnemonics recognized by
5188 the ASH8 assembler. The designation [] refers to a required ad-
5189 dressing mode argument. The following list specifies the format
5190 for each addressing mode supported by ASH8:
5192 #xx:3 immediate data (3 bit)
5193 #xx:8 immediate data (8 bit)
5194 #xx:16 immediate data (16 bit)
5196 *dir direct page addressing
5197 (see .setdp directive)
5198 0xFF00 <= dir <= 0xFFFF
5203 rn registers (16 bit)
5206 rnB registers (8 bit)
5207 r0H-r7H,r0L-r7L,spH,spL
5211 ASH8 ASSEMBLER PAGE J-2
5212 H8/3XX INSTRUCTION SET
5215 ccr condition code register
5217 @rn register indirect
5219 @-rn register indirect (auto pre-decrement)
5221 @rn+ register indirect (auto post-increment)
5223 @[offset,rn] register indirect, 16-bit displacement
5225 @@offset memory indirect, (8-bit address)
5227 ext extended addressing (16-bit)
5229 The terms data, dir, label, offset, and ext may all be expres-
5232 Note that not all addressing modes are valid with every in-
5233 struction, refer to the H8/3xx technical data for valid modes.
5236 J.2.1 Inherent Instructions
5245 J.2.2 Branch Instructions
5250 bhi label bhis label
5252 blo label blos label
5261 ASH8 ASSEMBLER PAGE J-3
5262 H8/3XX INSTRUCTION SET
5265 J.2.3 Single Operand Instructions
5294 rotxl.b rnB rotxr.b rnB
5296 rotl.b rnB rotr.b rnB
5298 shal.b rnB shar.b rnB
5300 shll.b rnB shlr.b rnB
5305 ASH8 ASSEMBLER PAGE J-4
5306 H8/3XX INSTRUCTION SET
5309 J.2.4 Double Operand Instructions
5313 add rnB,rnB add #xx:8,rnB
5315 adds #1,rn adds #2,rn
5316 addx rnB,rnB addx #xx:8,rnB
5318 cmp rnB,rnB cmp #xx:8,rnB
5323 subs #1,rn subs #2,rn
5324 subx rnB,rnB subx #xx:8,rnB
5326 and rnB,rnB and #xx:8,rnB
5329 or rnB,rnB or #xx:8,rnB
5332 xor rnB,rnB xor #xx:8,rnB
5338 add.b rnB,rnB add.b #xx:8,rnB
5341 cmp.b rnB,rnB cmp.b #xx:8,rnB
5347 addx.b rnB,rnB addx.b #xx:8,rnB
5349 and.b rnB,rnB and.b #xx:8,rnB
5352 or.b rnB,rnB or.b #xx:8,rnB
5355 subx.b rnB,rnB subx.b #xx:8,rnB
5357 xor.b rnB,rnB xor.b #xx:8,rnB
5361 ASH8 ASSEMBLER PAGE J-5
5362 H8/3XX INSTRUCTION SET
5365 J.2.5 Mov Instructions
5369 mov rnB,rnB mov rn,rn
5370 mov #xx:8,rnB mov #xx:16,rn
5371 mov @rn,rnB mov @rn,rn
5372 mov @[offset,rn],rnB mov @[offset,rn],rn
5373 mov @rn+,rnB mov @rn+,rn
5378 mov @label,rnB mov @label,rn
5379 mov label,rnB mov label,rn
5380 mov rnB,@rn mov rn,@rn
5381 mov rnB,@[offset,rn] mov rn,@[offset,rn]
5382 mov rnB,@-rn mov rn,@-rn
5387 mov rnB,@label mov rn,@label
5388 mov rnB,label mov rn,label
5393 mov.b rnB,rnB mov.w rn,rn
5394 mov.b #xx:8,rnB mov.w #xx:16,rn
5395 mov.b @rn,rnB mov.w @rn,rn
5396 mov.b @[offset,rn],rnB mov.w @[offset,rn],rn
5397 mov.b @rn+,rnB mov.w @rn+,rn
5402 mov.b @label,rnB mov.w @label,rn
5403 mov.b label,rnB mov.w label,rn
5404 mov.b rnB,@rn mov.w rn,@rn
5405 mov.b rnB,@[offset,rn] mov.w rn,@[offset,rn]
5406 mov.b rnB,@-rn mov.w rn,@-rn
5411 mov.b rnB,@label mov.w rn,@label
5412 mov.b rnB,label mov.w rn,label
5415 ASH8 ASSEMBLER PAGE J-6
5416 H8/3XX INSTRUCTION SET
5419 J.2.6 Bit Manipulation Instructions
5421 bld #xx:3,rnB bld #xx:3,@rn
5422 bld #xx:3,@dir bld #xx:3,dir
5423 bld #xx:3,*@dir bld #xx:3,*dir
5425 bild #xx:3,rnB bild #xx:3,@rn
5426 bild #xx:3,@dir bild #xx:3,dir
5427 bild #xx:3,*@dir bild #xx:3,*dir
5429 bst #xx:3,rnB bst #xx:3,@rn
5430 bst #xx:3,@dir bst #xx:3,dir
5431 bst #xx:3,*@dir bst #xx:3,*dir
5433 bist #xx:3,rnB bist #xx:3,@rn
5434 bist #xx:3,@dir bist #xx:3,dir
5435 bist #xx:3,*@dir bist #xx:3,*dir
5437 band #xx:3,rnB band #xx:3,@rn
5438 band #xx:3,@dir band #xx:3,dir
5439 band #xx:3,*@dir band #xx:3,*dir
5441 biand #xx:3,rnB biand #xx:3,@rn
5442 biand #xx:3,@dir biand #xx:3,dir
5443 biand #xx:3,*@dir biand #xx:3,*dir
5445 bor #xx:3,rnB bor #xx:3,@rn
5446 bor #xx:3,@dir bor #xx:3,dir
5447 bor #xx:3,*@dir bor #xx:3,*dir
5449 bior #xx:3,rnB bior #xx:3,@rn
5450 bior #xx:3,@dir bior #xx:3,dir
5451 bior #xx:3,*@dir bior #xx:3,*dir
5453 bxor #xx:3,rnB bxor #xx:3,@rn
5454 bxor #xx:3,@dir bxor #xx:3,dir
5455 bxor #xx:3,*@dir bxor #xx:3,*dir
5457 bixor #xx:3,rnB bixor #xx:3,@rn
5458 bixor #xx:3,@dir bixor #xx:3,dir
5459 bixor #xx:3,*@dir bixor #xx:3,*dir
5462 ASH8 ASSEMBLER PAGE J-7
5463 H8/3XX INSTRUCTION SET
5466 J.2.7 Extended Bit Manipulation Instructions
5468 bset #xx:3,rnB bset #xx:3,@rn
5469 bset #xx:3,@dir bset #xx:3,dir
5470 bset #xx:3,*@dir bset #xx:3,*dir
5471 bset rnB,rnB bset rnB,@rn
5472 bset rnB,@dir bset rnB,dir
5473 bset rnB,*@dir bset rnB,*dir
5475 bclr #xx:3,rnB bclr #xx:3,@rn
5476 bclr #xx:3,@dir bclr #xx:3,dir
5477 bclr #xx:3,*@dir bclr #xx:3,*dir
5478 bclr rnB,rnB bclr rnB,@rn
5479 bclr rnB,@dir bclr rnB,dir
5480 bclr rnB,*@dir bclr rnB,*dir
5482 bnot #xx:3,rnB bnot #xx:3,@rn
5483 bnot #xx:3,@dir bnot #xx:3,dir
5484 bnot #xx:3,*@dir bnot #xx:3,*dir
5485 bnot rnB,rnB bnot rnB,@rn
5486 bnot rnB,@dir bnot rnB,dir
5487 bnot rnB,*@dir bnot rnB,*dir
5489 btst #xx:3,rnB btst #xx:3,@rn
5490 btst #xx:3,@dir btst #xx:3,dir
5491 btst #xx:3,*@dir btst #xx:3,*dir
5492 btst rnB,rnB btst rnB,@rn
5493 btst rnB,@dir btst rnB,dir
5494 btst rnB,*@dir btst rnB,*dir
5497 J.2.8 Condition Code Instructions
5499 andc #xx:8,ccr andc #xx:8
5500 and #xx:8,ccr and.b #xx:8,ccr
5502 ldc #xx:8,ccr ldc #xx:8
5505 orc #xx:8,ccr orc #xx:8
5506 or #xx:8,ccr or.b #xx:8,ccr
5508 xorc #xx:8,ccr xorc #xx:8
5509 xor #xx:8,ccr xor.b #xx:8,ccr
5514 ASH8 ASSEMBLER PAGE J-8
5515 H8/3XX INSTRUCTION SET
5518 J.2.9 Other Instructions
5520 divxu rnB,rn divxu.b rnB,rn
5522 mulxu rnB,rn mulxu.b rnB,rn
5524 movfpe @label,rnB movfpe label,rnB
5525 movfpe.b @label,rnB movfpe.b label,rnB
5527 movtpe @label,rnB movtpe label,rnB
5528 movtpe.b @label,rnB movtpe.b label,rnB
5531 J.2.10 Jump and Jump to Subroutine Instructions
5534 jmp @label jmp label
5537 jsr @label jsr label
5563 Thanks to John Hartman for his contribution of the AS8051
5567 jhartman@compuserve.com
5570 K.2 8051 REGISTER SET
5572 The following is a list of the 8051 registers used by AS8051:
5574 a,b - 8-bit accumulators
5575 r0,r1,r2,r3 - 8-bit registers
5579 pc - program counter
5581 c - carry (bit in status word)
5584 AS8051 ASSEMBLER PAGE K-2
5588 K.3 8051 INSTRUCTION SET
5591 The following tables list all 8051 mnemonics recognized by
5592 the AS8051 assembler. The following list specifies the format
5593 for each addressing mode supported by AS8051:
5595 #data immediate data
5598 r,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7
5600 @r indirect on register r0 or r1
5601 @dptr indirect on data pointer
5602 @a+dptr indirect on accumulator
5604 @a+pc indirect on accumulator
5605 plus program counter
5607 addr direct memory address
5611 label call or jump label
5613 The terms data, addr, bitaddr, and label may all be expressions.
5615 Note that not all addressing modes are valid with every in-
5616 struction. Refer to the 8051 technical data for valid modes.
5619 K.3.1 Inherent Instructions
5624 AS8051 ASSEMBLER PAGE K-3
5625 8051 INSTRUCTION SET
5628 K.3.2 Move Instructions
5630 mov a,#data mov a,addr
5633 mov r,#data mov r,addr
5636 mov addr,a mov addr,#data
5637 mov addr,r mov addr,@r
5638 mov addr1,addr2 mov bitaddr,c
5640 mov @r,#data mov @r,addr
5646 movc a,@a+dptr movc a,@a+pc
5647 movx a,@dptr movx a,@r
5648 movx @dptr,a movx @r,a
5651 K.3.3 Single Operand Instructions
5674 AS8051 ASSEMBLER PAGE K-4
5675 8051 INSTRUCTION SET
5678 K.3.4 Two Operand Instructions
5680 add a,#data add a,addr
5682 addc a,#data addc a,addr
5684 subb a,#data subb a,addr
5686 orl a,#data orl a,addr
5688 orl addr,a orl addr,#data
5689 orl c,bitaddr orl c,/bitaddr
5690 anl a,#data anl a,addr
5692 anl addr,a anl addr,#data
5693 anl c,bitaddr anl c,/bitaddr
5694 xrl a,#data xrl a,addr
5696 xrl addr,a xrl addr,#data
5697 xrl c,bitaddr xrl c,/bitaddr
5702 K.3.5 Call and Return Instructions
5704 acall label lcall label
5711 K.3.6 Jump Instructions
5714 cjne a,#data,label cjne a,addr,label
5715 cjne r,#data,label cjne @r,#data,label
5716 djnz r,label djnz addr,label
5718 jb bitadr,label jnb bitadr,label
5722 ljmp label sjmp label
5725 AS8051 ASSEMBLER PAGE K-5
5726 8051 INSTRUCTION SET
5729 K.3.7 Predefined Symbols: SFR Map
5731 --------- 4 Bytes ----------
5746 C8 [ T2CON RCAP2L RCAP2H ] CB
5762 88 TCON TMOD TL0 TL1 8B
5766 [...] Indicates Resident in 8052, not 8051
5769 AS8051 ASSEMBLER PAGE K-6
5770 8051 INSTRUCTION SET
5773 K.3.8 Predefined Symbols: SFR Bit Addresses
5775 ---------- 4 BITS ----------
5779 F4 B.4 B.5 B.6 B.7 F7
5780 F0 B.0 B.1 B.2 B.3 F3
5783 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
5784 E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
5787 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
5788 D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
5789 CC [ T2CON.4 T2CON.5 T2CON.6 T2CON.7 ] CF
5790 C8 [ T2CON.0 T2CON.1 T2CON.2 T2CON.3 ] CB
5793 BC IP.4 IP.5 IP.6 IP.7 BF
5794 B8 IP.0 IP.1 IP.2 IP.3 BB
5795 B4 P3.4 P3.5 P3.6 P3.7 B7
5796 B0 P3.0 P3.1 P3.2 P3.3 B3
5797 AC IE.4 IE.5 EI.6 IE.7 AF
5798 A8 IE.0 IE.1 IE.2 IE.3 AB
5799 A4 P2.4 P2.5 P2.6 P2.7 A7
5800 A0 P2.0 P2.1 P2.2 P2.3 A3
5801 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
5802 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
5803 94 P1.4 P1.5 P1.6 P1.7 97
5804 90 P1.0 P1.1 P1.2 P1.3 93
5805 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
5806 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
5807 84 P0.4 P0.5 P0.6 P0.7 87
5808 80 P0.0 P0.1 P0.2 P0.3 83
5810 [...] Indicates Resident in 8052, not 8051
5813 AS8051 ASSEMBLER PAGE K-7
5814 8051 INSTRUCTION SET
5817 K.3.9 Predefined Symbols: Control Bits
5819 ---------- 4 BITS ----------
5833 CC [ TLCK RCLK EXF2 TF2 ] CF
5834 C8 [ CPRL2 CT2 TR2 EXEN2 ] CB
5838 B8 PX0 PT0 PX1 PT1 BB
5840 B0 RXD TXD INT0 INT1 B3
5842 A8 EX0 ET0 EX1 ET1 AB
5845 9C REN SM2 SM1 SM0 9F
5849 8C TR0 TF0 TR1 TF1 8F
5850 88 IT0 IE0 IT1 IE1 8B
5854 [...] Indicates Resident in 8052, not 8051
5877 L.1 8085 REGISTER SET
5879 The following is a list of the 8080/8085 registers used by
5882 a,b,c,d,e,h,l - 8-bit accumulators
5883 m - memory through (hl)
5888 L.2 8085 INSTRUCTION SET
5891 The following tables list all 8080/8085 mnemonics recognized
5892 by the AS8085 assembler. The following list specifies the
5893 format for each addressing mode supported by AS8085:
5895 #data immediate data
5898 r,r1,r2 register or register pair
5902 m memory address using (hl)
5904 addr direct memory addressing
5906 label call or jump label
5908 The terms data, m, addr, and label may be expressions.
5910 Note that not all addressing modes are valid with every in-
5911 struction, refer to the 8080/8085 technical data for valid
5915 AS8085 ASSEMBLER PAGE L-2
5916 8085 INSTRUCTION SET
5919 L.2.1 Inherent Instructions
5933 L.2.2 Register/Memory/Immediate Instructions
5935 adc r adc m aci #data
5936 add r add m adi #data
5937 ana r ana m ani #data
5938 cmp r cmp m cpi #data
5939 ora r ora m ori #data
5940 sbb r sbb m sbi #data
5941 sub r sub m sui #data
5942 xra r xra m xri #data
5945 L.2.3 Call and Return Instructions
5958 L.2.4 Jump Instructions
5971 AS8085 ASSEMBLER PAGE L-3
5972 8085 INSTRUCTION SET
5975 L.2.5 Input/Output/Reset Instructions
5982 L.2.6 Move Instructions
5992 L.2.7 Other Instructions
6034 The .hd64 directive enables processing of the HD64180 specific
6035 mnemonics not included in the Z80 instruction set. HD64180
6036 mnemonics encountered without the .hd64 directive will be
6037 flagged with an 'o' error.
6040 M.2 Z80 REGISTER SET AND CONDITIONS
6043 The following is a complete list of register designations and
6044 condition mnemonics:
6046 byte registers - a,b,c,d,e,h,l,i,r
6047 register pairs - af,af',bc,de,hl
6048 word registers - pc,sp,ix,iy
6052 NC - carry bit clear
6062 ASZ80 ASSEMBLER PAGE M-2
6066 M.3 Z80 INSTRUCTION SET
6069 The following tables list all Z80/HD64180 mnemonics recog-
6070 nized by the ASZ80 assembler. The designation [] refers to a
6071 required addressing mode argument. The following list specifies
6072 the format for each addressing mode supported by ASZ80:
6074 #data immediate data
6085 (hl) implied addressing or
6086 register indirect addressing
6088 (label) direct addressing
6090 offset(ix) indexed addressing with
6093 label call/jmp/jr label
6095 The terms data, dir, offset, and ext may all be expressions.
6096 The terms dir and offset are not allowed to be external refer-
6099 Note that not all addressing modes are valid with every in-
6100 struction, refer to the Z80/HD64180 technical data for valid
6104 ASZ80 ASSEMBLER PAGE M-3
6108 M.3.1 Inherent Instructions
6123 M.3.2 Implicit Operand Instructions
6144 ASZ80 ASSEMBLER PAGE M-4
6148 M.3.3 Load Instruction
6153 ld (label),a ld a,(label)
6154 ld (label),rp ld rp,(label)
6158 ld sp,iy ld rp,#data
6164 M.3.4 Call/Return Instructions
6168 call NC,label ret NC
6169 call NZ,label ret NZ
6171 call PE,label ret PE
6172 call PO,label ret PO
6177 M.3.5 Jump and Jump to Subroutine Instructions
6179 jp C,label jp M,label
6180 jp NC,label jp NZ,label
6181 jp P,label jp PE,label
6182 jp PO,label jp Z,label
6189 jr C,label jr NC,label
6190 jr NZ,label jr Z,label
6194 ASZ80 ASSEMBLER PAGE M-5
6198 M.3.6 Bit Manipulation Instructions
6205 M.3.7 Interrupt Mode and Reset Instructions
6213 M.3.8 Input and Output Instructions
6219 out (n),a out (c),rg
6224 M.3.9 Register Pair Instructions
6231 ex (sp),hl ex (sp),ix
6239 ASZ80 ASSEMBLER PAGE M-6
6243 M.3.10 HD64180 Specific Instructions
6283 Thanks to Marko Makela for his contribution of the AS6500
6290 Internet: Marko.Makela@Helsinki.Fi
6291 EARN/BitNet: msmakela@finuh
6293 Several additions and modifications were made to his code to
6294 support the following families of 6500 processors:
6296 (1) 650X and 651X processor family
6297 (2) 65F11 and 65F12 processor family
6298 (3) 65C00/21 and 65C29 processor family
6299 (4) 65C02, 65C102, and 65C112 processor family
6301 The instruction syntax of this cross assembler contains two
6302 peculiarities: (1) the addressing indirection is denoted by the
6303 square brackets [] and (2) the `bbrx' and `bbsx' instructions
6304 are written `bbr0 memory,label'.
6309 AS6500 ASSEMBLER PAGE N-2
6313 N.2 6500 REGISTER SET
6315 The following is a list of the 6500 registers used by AS6500:
6317 a - 8-bit accumulator
6318 x,y - index registers
6321 N.3 6500 INSTRUCTION SET
6324 The following tables list all 6500 family mnemonics recog-
6325 nized by the AS6500 assembler. The designation [] refers to a
6326 required addressing mode argument. The following list specifies
6327 the format for each addressing mode supported by AS6500:
6329 #data immediate data
6332 *dir direct page addressing
6333 (see .setdp directive)
6334 0 <= dir <= 255
6336 offset,x indexed addressing
6337 offset,y indexed addressing
6338 address = (offset + (x or y))
6340 [offset,x] pre-indexed indirect addressing
6341 0 <= offset <= 255
6342 address = contents of location
6343 (offset + (x or y)) mod 256
6345 [offset],y post-indexed indirect addressing
6346 address = contents of location at offset
6347 plus the value of the y register
6349 [address] indirect addressing
6351 ext extended addressing
6355 address,label direct page memory location
6357 bbrx and bbsx instruction addressing
6359 The terms data, dir, offset, address, ext, and label may all be
6362 Note that not all addressing modes are valid with every in-
6363 struction, refer to the 65xx technical data for valid modes.
6366 AS6500 ASSEMBLER PAGE N-3
6367 6500 INSTRUCTION SET
6370 N.3.1 Processor Specific Directives
6373 The AS6500 cross assembler has four (4) processor specific
6374 assembler directives which define the target 65xx processor
6377 .r6500 Core 650X and 651X family (default)
6378 .r65f11 Core plus 65F11 and 65F12
6379 .r65c00 Core plus 65C00/21 and 65C29
6380 .r65c02 Core plus 65C02, 65C102, and 65C112
6383 N.3.2 65xx Core Inherent Instructions
6400 N.3.3 65xx Core Branch Instructions
6409 N.3.4 65xx Core Single Operand Instructions
6419 AS6500 ASSEMBLER PAGE N-4
6420 6500 INSTRUCTION SET
6423 N.3.5 65xx Core Double Operand Instructions
6436 N.3.6 65xx Core Jump and Jump to Subroutine Instructions
6441 N.3.7 65xx Core Miscellaneous X and Y Register Instructions
6451 AS6500 ASSEMBLER PAGE N-5
6452 6500 INSTRUCTION SET
6455 N.3.8 65F11 and 65F12 Specific Instructions
6457 bbr0 [],label bbr1 [],label
6458 bbr2 [],label bbr3 [],label
6459 bbr4 [],label bbr5 [],label
6460 bbr6 [],label bbr7 [],label
6462 bbs0 [],label bbs1 [],label
6463 bbs2 [],label bbs3 [],label
6464 bbs4 [],label bbs5 [],label
6465 bbs6 [],label bbs7 [],label
6478 N.3.9 65C00/21 and 65C29 Specific Instructions
6480 bbr0 [],label bbr1 [],label
6481 bbr2 [],label bbr3 [],label
6482 bbr4 [],label bbr5 [],label
6483 bbr6 [],label bbr7 [],label
6485 bbs0 [],label bbs1 [],label
6486 bbs2 [],label bbs3 [],label
6487 bbs4 [],label bbs5 [],label
6488 bbs6 [],label bbs7 [],label
6506 AS6500 ASSEMBLER PAGE N-6
6507 6500 INSTRUCTION SET
6510 N.3.10 65C02, 65C102, and 65C112 Specific Instructions
6512 bbr0 [],label bbr1 [],label
6513 bbr2 [],label bbr3 [],label
6514 bbr4 [],label bbr5 [],label
6515 bbr6 [],label bbr7 [],label
6517 bbs0 [],label bbs1 [],label
6518 bbs2 [],label bbs3 [],label
6519 bbs4 [],label bbs5 [],label
6520 bbs6 [],label bbs7 [],label
6541 Additional addressing modes for the following core instruc-
6542 tions are also available with the 65C02, 65C102, and 65C112 pro-
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