26 SDCC ASxxxx Assemblers
32 SDCC ASLINK Relocating Linker
35 CHAPTER 1 THE ASSEMBLER 1-1
36 1.1 THE ASXXXX ASSEMBLERS 1-1
37 1.1.1 Assembly Pass 1 1-2
38 1.1.2 Assembly Pass 2 1-2
39 1.1.3 Assembly Pass 3 1-2
40 1.2 SOURCE PROGRAM FORMAT 1-3
41 1.2.1 Statement Format 1-3
42 1.2.1.1 Label Field 1-3
43 1.2.1.2 Operator Field 1-5
44 1.2.1.3 Operand Field 1-5
45 1.2.1.4 Comment Field 1-6
46 1.3 SYMBOLS AND EXPRESSIONS 1-6
47 1.3.1 Character Set 1-6
48 1.3.2 User-Defined Symbols 1-10
49 1.3.3 Local Symbols 1-11
50 1.3.4 Current Location Counter 1-12
53 1.3.7 Expressions 1-15
54 1.4 GENERAL ASSEMBLER DIRECTIVES 1-16
55 1.4.1 .module Directive 1-16
56 1.4.2 .title Directive 1-17
57 1.4.3 .sbttl Directive 1-17
58 1.4.4 .page Directive 1-17
59 1.4.5 .byte and .db Directives 1-17
60 1.4.6 .word and .dw Directives 1-18
61 1.4.7 .blkb, .blkw, and .ds Directives 1-18
62 1.4.8 .ascii Directive 1-18
63 1.4.9 .ascis Directive 1-19
64 1.4.10 .asciz Directive 1-19
65 1.4.11 .radix Directive 1-20
66 1.4.12 .even Directive 1-20
67 1.4.13 .odd Directive 1-20
68 1.4.14 .area Directive 1-21
69 1.4.15 .org Directive 1-22
70 1.4.16 .globl Directive 1-23
71 1.4.17 .if, .else, and .endif Directives 1-23
72 1.4.18 .include Directive 1-24
73 1.4.19 .setdp Directive 1-25
74 1.5 INVOKING ASXXXX 1-27
77 1.8 SYMBOL TABLE FILE 1-30
80 CHAPTER 2 THE LINKER 2-1
81 2.1 ASLINK RELOCATING LINKER 2-1
82 2.2 INVOKING ASLINK 2-2
83 2.3 LIBRARY PATH(S) AND FILE(S) 2-3
84 2.4 ASLINK PROCESSING 2-4
85 2.5 LINKER INPUT FORMAT 2-5
86 2.5.1 Object Module Format 2-6
100 2.6 LINKER ERROR MESSAGES 2-8
101 2.7 INTEL HEX OUTPUT FORMAT 2-11
102 2.8 MOTORLA S1-S9 OUTPUT FORMAT 2-12
104 CHAPTER 3 BUILDING ASXXXX AND ASLINK 3-1
105 3.1 BUILDING AN ASSEMBLER 3-1
106 3.2 BUILDING ASLINK 3-2
108 APPENDIX A AS6800 ASSEMBLER A-1
109 A.1 6800 REGISTER SET A-1
110 A.2 6800 INSTRUCTION SET A-1
111 A.2.1 Inherent Instructions A-2
112 A.2.2 Branch Instructions A-2
113 A.2.3 Single Operand Instructions A-3
114 A.2.4 Double Operand Instructions A-4
115 A.2.5 Jump and Jump to Subroutine Instructions A-4
116 A.2.6 Long Register Instructions A-5
118 APPENDIX B AS6801 ASSEMBLER B-1
119 B.1 .hd6303 DIRECTIVE B-1
120 B.2 6801 REGISTER SET B-1
121 B.3 6801 INSTRUCTION SET B-1
122 B.3.1 Inherent Instructions B-2
123 B.3.2 Branch Instructions B-2
124 B.3.3 Single Operand Instructions B-3
125 B.3.4 Double Operand Instructions B-4
126 B.3.5 Jump and Jump to Subroutine Instructions B-5
127 B.3.6 Long Register Instructions B-5
128 B.3.7 6303 Specific Instructions B-5
130 APPENDIX C AS6804 ASSEMBLER C-1
131 C.1 6804 REGISTER SET C-1
132 C.2 6804 INSTRUCTION SET C-1
133 C.2.1 Inherent Instructions C-2
134 C.2.2 Branch Instructions C-2
135 C.2.3 Single Operand Instructions C-2
136 C.2.4 Jump and Jump to Subroutine Instructions C-2
137 C.2.5 Bit Test Instructions C-2
138 C.2.6 Load Immediate data Instruction C-3
139 C.2.7 6804 Derived Instructions C-3
141 APPENDIX D AS6805 ASSEMBLER D-1
142 D.1 6805 REGISTER SET D-1
143 D.2 6805 INSTRUCTION SET D-1
144 D.2.1 Control Instructions D-2
145 D.2.2 Bit Manipulation Instructions D-2
146 D.2.3 Branch Instructions D-2
147 D.2.4 Read-Modify-Write Instructions D-3
148 D.2.5 Register\Memory Instructions D-3
155 D.2.6 Jump and Jump to Subroutine Instructions D-4
157 APPENDIX E AS68HC08 ASSEMBLER E-1
158 E.1 68HC08 REGISTER SET E-1
159 E.2 68HC08 INSTRUCTION SET E-1
160 E.2.1 Control Instructions E-2
161 E.2.2 Bit Manipulation Instructions E-2
162 E.2.3 Branch Instructions E-3
163 E.2.4 Complex Branch Instructions E-3
164 E.2.5 Read-Modify-Write Instructions E-4
165 E.2.6 Register\Memory Instructions E-5
166 E.2.7 Double Operand Move Instruction E-5
167 E.2.8 16-Bit <H:X> Index Register Instructions E-5
168 E.2.9 Jump and Jump to Subroutine Instructions E-5
170 APPENDIX F AS6809 ASSEMBLER F-1
171 F.1 6809 REGISTER SET F-1
172 F.2 6809 INSTRUCTION SET F-1
173 F.2.1 Inherent Instructions F-3
174 F.2.2 Short Branch Instructions F-3
175 F.2.3 Long Branch Instructions F-3
176 F.2.4 Single Operand Instructions F-4
177 F.2.5 Double Operand Instructions F-5
178 F.2.6 D-register Instructions F-5
179 F.2.7 Index/Stack Register Instructions F-5
180 F.2.8 Jump and Jump to Subroutine Instructions F-6
181 F.2.9 Register - Register Instructions F-6
182 F.2.10 Condition Code Register Instructions F-6
183 F.2.11 6800 Compatibility Instructions F-6
185 APPENDIX G AS6811 ASSEMBLER G-1
186 G.1 6811 REGISTER SET G-1
187 G.2 6811 INSTRUCTION SET G-1
188 G.2.1 Inherent Instructions G-2
189 G.2.2 Branch Instructions G-2
190 G.2.3 Single Operand Instructions G-3
191 G.2.4 Double Operand Instructions G-4
192 G.2.5 Bit Manupulation Instructions G-4
193 G.2.6 Jump and Jump to Subroutine Instructions G-5
194 G.2.7 Long Register Instructions G-5
196 APPENDIX H AS6816 ASSEMBLER H-1
197 H.1 6816 REGISTER SET H-1
198 H.2 6816 INSTRUCTION SET H-1
199 H.2.1 Inherent Instructions H-2
200 H.2.2 Push/Pull Multiple Register Instructions H-3
201 H.2.3 Short Branch Instructions H-3
202 H.2.4 Long Branch Instructions H-3
203 H.2.5 Bit Manipulation Instructions H-3
204 H.2.6 Single Operand Instructions H-4
205 H.2.7 Double Operand Instructions H-5
206 H.2.8 Index/Stack Register Instructions H-5
213 H.2.9 Jump and Jump to Subroutine Instructions H-6
214 H.2.10 Condition Code Register Instructions H-6
215 H.2.11 Multiply and Accumulate Instructions H-6
217 APPENDIX I ASH8 ASSEMBLER I-1
218 I.1 H8/3XX REGISTER SET I-1
219 I.2 H8/3XX INSTRUCTION SET I-1
220 I.2.1 Inherent Instructions I-2
221 I.2.2 Branch Instructions I-2
222 I.2.3 Single Operand Instructions I-3
223 I.2.4 Double Operand Instructions I-4
224 I.2.5 Mov Instructions I-5
225 I.2.6 Bit Manipulation Instructions I-6
226 I.2.7 Extended Bit Manipulation Instructions I-7
227 I.2.8 Condition Code Instructions I-7
228 I.2.9 Other Instructions I-8
229 I.2.10 Jump and Jump to Subroutine Instructions I-8
231 APPENDIX J AS8085 ASSEMBLER J-1
232 J.1 8085 REGISTER SET J-1
233 J.2 8085 INSTRUCTION SET J-1
234 J.2.1 Inherent Instructions J-2
235 J.2.2 Register/Memory/Immediate Instructions J-2
236 J.2.3 Call and Return Instructions J-2
237 J.2.4 Jump Instructions J-2
238 J.2.5 Input/Output/Reset Instructions J-3
239 J.2.6 Move Instructions J-3
240 J.2.7 Other Instructions J-3
242 APPENDIX K ASZ80 ASSEMBLER K-1
243 K.1 .hd64 DIRECTIVE K-1
244 K.2 Z80 REGISTER SET AND CONDITIONS K-1
245 K.3 Z80 INSTRUCTION SET K-2
246 K.3.1 Inherent Instructions K-3
247 K.3.2 Implicit Operand Instructions K-3
248 K.3.3 Load Instruction K-4
249 K.3.4 Call/Return Instructions K-4
250 K.3.5 Jump and Jump to Subroutine Instructions K-4
251 K.3.6 Bit Manipulation Instructions K-5
252 K.3.7 Interrupt Mode and Reset Instructions K-5
253 K.3.8 Input and Output Instructions K-5
254 K.3.9 Register Pair Instructions K-5
255 K.3.10 HD64180 Specific Instructions K-6
257 APPENDIX L AS6500 ASSEMBLER L-1
258 L.1 ACKNOWLEDGMENT L-1
259 L.2 6500 REGISTER SET L-2
260 L.3 6500 INSTRUCTION SET L-2
261 L.3.1 Processor Specific Directives L-3
262 L.3.2 65xx Core Inherent Instructions L-3
263 L.3.3 65xx Core Branch Instructions L-3
264 L.3.4 65xx Core Single Operand Instructions L-3
271 L.3.5 65xx Core Double Operand Instructions L-4
272 L.3.6 65xx Core Jump and Jump to Subroutine
274 L.3.7 65xx Core Miscellaneous X and Y Register
276 L.3.8 65F11 and 65F12 Specific Instructions L-5
277 L.3.9 65C00/21 and 65C29 Specific Instructions L-5
278 L.3.10 65C02, 65C102, and 65C112 Specific
286 ASxxxx Cross Assemblers, Version 1.7
291 Kent State University
294 Operating System: TSX+, RT-11, PDOS, MS/DOS, Windows 3.x
295 or other supporting K&R C.
299 The ASxxxx Cross Assembler and Linker package (V1.7 November
300 1995) contains cross assemblers for the 6800(6802/6808),
301 6801(hd6303), 6804, 6805, 68HC08, 6809, 6811, 68HC16,
302 8085(8080), z80(hd64180), H8/3xx, and 6500 series microproces-
303 sors. Complete source code is provided with the assem-
304 bler/linker submission.
310 The ASxxxx Cross Assembler and Linker package is available
311 from Kent State University at shop-pdp.kent.edu by "anonymous"
330 The ASxxxx assemblers were written following the style of
331 several cross assemblers found in the Digital Equipment Corpora-
332 tion Users Society (DECUS) distribution of the C programming
333 language. The DECUS code was provided with no documentation as
334 to the input syntax or the output format. Study of the code
335 revealed that the unknown author of the code had attempted to
336 formulate an assembler with attributes similiar to those of the
337 PDP-11 MACRO assembler (without macro's). The incomplete code
338 from the DECUS C distribution has been largely rewritten, only
339 the program structure, and C source file organization remains
340 relatively unchanged. However, I wish to thank the author for
341 his contribution to this set of assemblers.
343 The ASLINK program was written as a companion to the ASxxxx
344 assemblers, its design and implementation was not derived from
347 I would greatly appreciate receiving the details of any
348 changes, additions, or errors pertaining to these programs and
349 will attempt to incorporate any fixes or generally useful
350 changes in a future update to these programs.
355 Kent State University
360 baldwin@shop-pdp.kent.edu
366 E N D U S E R L I C E N S E A G R E E M E N T
372 This program is free software; you can redistribute it and/or
373 modify it under the terms of the GNU General Public License as
374 published by the Free Software Foundation; either version 3, or
375 (at your option) any later version.
377 This program is distributed in the hope that it will be
378 useful, but WITHOUT ANY WARRANTY; without even the implied
379 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
380 See the GNU General Public License for more details.
382 You should have received a copy of the GNU General Public
383 License along with this program. If not, see
384 <http://www.gnu.org/licenses/>.
407 1.1 THE ASXXXX ASSEMBLERS
410 The ASxxxx assemblers are a series of microprocessor assem-
411 blers written in the C programming language. Each assembler has
412 a device specific section which includes:
414 1. device description, byte order, and file extension in-
417 2. a table of the assembler general directives, special
418 device directives, assembler mnemonics and associated
421 3. machine specific code for processing the device mnemon-
422 ics, addressing modes, and special directives
424 The device specific information is detailed in the appendices.
426 The assemblers have a common device independent section which
427 handles the details of file input/output, symbol table genera-
428 tion, program/data areas, expression analysis, and assembler
429 directive processing.
431 The assemblers provide the following features:
433 1. Command string control of assembly functions
435 2. Alphabetized, formatted symbol table listing
437 3. Relocatable object modules
439 4. Global symbols for linking object modules
441 5. Conditional assembly directives
445 THE ASSEMBLER PAGE 1-2
446 THE ASXXXX ASSEMBLERS
449 6. Program sectioning directives
452 ASxxxx assembles one or more source files into a single relo-
453 catable ascii object file. The output of the ASxxxx assemblers
454 consists of an ascii relocatable object file(*.rel), an assembly
455 listing file(*.lst), and a symbol file(*.sym).
458 1.1.1 Assembly Pass 1
461 During pass 1, ASxxxx opens all source files and performs a
462 rudimenatry assembly of each source statement. During this pro-
463 cess all symbol tables are built, program sections defined, and
464 number of bytes for each assembled source line is estimated.
466 At the end of pass 1 all undefined symbols may be made global
467 (external) using the ASxxxx switch -g, otherwise undefined sym-
468 bols will be flagged as errors during succeeding passes.
471 1.1.2 Assembly Pass 2
474 During pass 2 the ASxxxx assembler resolves forward refer-
475 ences and determines the number of bytes for each assembled
476 line. The number of bytes used by a particular assembler in-
477 struction may depend upon the addressing mode, whether the in-
478 struction allows multiple forms based upon the relative distance
479 to the addressed location, or other factors. Pass 2 resolves
480 these cases and determines the address of all symbols.
483 1.1.3 Assembly Pass 3
486 Pass 3 by the assembler generates the listing file, the relo-
487 catable output file, and the symbol tables. Also during pass 3
488 the errors will be reported.
490 The relocatable object file is an ascii file containing sym-
491 bol references and definitions, program area definitions, and
492 the relocatable assembled code, the linker ASLINK will use this
493 information to generate an absolute load file (Motorola or Intel
499 THE ASSEMBLER PAGE 1-3
500 SOURCE PROGRAM FORMAT
503 1.2 SOURCE PROGRAM FORMAT
507 1.2.1 Statement Format
510 A source program is composed of assembly-language statements.
511 Each statement must be completed on one line. A line may con-
512 tain a maximum of 128 characters, longer lines are truncated and
515 An ASxxxx assembler statement may have as many as four
516 fields. These fields are identified by their order within the
517 statement and/or by separating characters between fields. The
518 general format of the ASxxxx statement is:
520 [label:] Operator Operand [;Comment(s)]
522 The label and comment fields are optional. The operator and
523 operand fields are interdependent. The operator field may be an
524 assembler directive or an assembly mnemonic. The operand field
525 may be optional or required as defined in the context of the
528 ASxxxx interprets and processes source statements one at a
529 time. Each statement causes a particular operation to be per-
533 1.2.1.1 Label Field -
535 A label is a user-defined symbol which is assigned the value
536 of the current location counter and entered into the user de-
537 fined symbol table. The current location counter is used by
538 ASxxxx to assign memory addresses to the source program state-
539 ments as they are encountered during the assembly process. Thus
540 a label is a means of symbolically referring to a specific
543 When a program section is absolute, the value of the current
544 location counter is absolute; its value references an absolute
545 memory address. Similarly, when a program section is relocat-
546 able, the value of the current location counter is relocatable.
547 A relocation bias calculated at link time is added to the ap-
548 parent value of the current location counter to establish its
549 effective absolute address at execution time. (The user can
550 also force the linker to relocate sections defined as absolute.
551 This may be required under special circumstances.)
553 If present, a label must be the first field in a source
554 statement and must be terminated by a colon (:). For example,
557 THE ASSEMBLER PAGE 1-4
558 SOURCE PROGRAM FORMAT
561 if the value of the current location counter is absolute
562 01F0(H), the statement:
566 assigns the value 01F0(H) to the label abcd. If the location
567 counter value were relocatable, the final value of abcd would be
568 01F0(H)+K, where K represents the relocation bias of the program
569 section, as calculated by the linker at link time.
571 More than one label may appear within a single label field.
572 Each label so specified is assigned the same address value. For
573 example, if the value of the current location counter is
574 1FF0(H), the multiple labels in the following statement are each
575 assigned the value 1FF0(H):
579 Multiple labels may also appear on successive lines. For ex-
580 ample, the statements
586 likewise cause the same value to be assigned to all three la-
589 A double colon (::) defines the label as a global symbol.
590 For example, the statement
594 establishes the label abcd as a global symbol. The distinguish-
595 ing attribute of a global symbol is that it can be referenced
596 from within an object module other than the module in which the
597 symbol is defined. References to this label in other modules
598 are resolved when the modules are linked as a composite execut-
601 The legal characters for defining labels are:
610 A label may be any length, however, only the first eight (8)
611 characters are significant and, therefore must be unique among
612 all labels in the source program (not necessarily among
615 THE ASSEMBLER PAGE 1-5
616 SOURCE PROGRAM FORMAT
619 separately compiled modules). An error code(s) (m or p) will be
620 generated in the assembly listing if the first eight characters
621 in two or more labels are the same. The m code is caused by the
622 redeclaration of the symbol or its reference by another state-
623 ment. The p code is generated because the symbols location is
624 changing on each pass through the source file.
626 The label must not start with the characters 0-9, as this
627 designates a local symbol with special attributes described in a
630 The label must not start with the sequence $$, as this
631 represents the temporary radix 16 for constants.
634 1.2.1.2 Operator Field -
636 The operator field specifies the action to be performed. It
637 may consist of an instruction mnemonic (op code) or an assembler
640 When the operator is an instruction mnemonic, a machine in-
641 struction is generated and the assembler evaluates the addresses
642 of the operands which follow. When the operator is a directive
643 ASxxxx performs certain control actions or processing operations
644 during assembly of the source program.
646 Leading and trailing spaces or tabs in the operator field
647 have no significance; such characters serve only to separate
648 the operator field from the preceeding and following fields.
650 An operator is terminated by a space, tab or end of line.
653 1.2.1.3 Operand Field -
655 When the operator is an instruction mnemonic (op code), the
656 operand field contains program variables that are to be
657 evaluated/manipulated by the operator.
659 Operands may be expressions or symbols, depending on the
660 operator. Multiple expressions used in the operand fields may
661 be separated by a comma. An operand should be preceeded by an
662 operator field; if it is not, the statement will give an error
663 (q or o). All operands following instruction mnemonics are
664 treated as expressions.
666 The operand field is terminated by a semicolon when the field
667 is followed by a comment. For example, in the following
670 label: lda abcd,x ;Comment field
673 THE ASSEMBLER PAGE 1-6
674 SOURCE PROGRAM FORMAT
678 the tab between lda and abcd terminates the operator field and
679 defines the beginning of the operand field; a comma separates
680 the operands abcd and x; and a semicolon terminates the operand
681 field and defines the beginning of the comment field. When no
682 comment field follows, the operand field is terminated by the
683 end of the source line.
686 1.2.1.4 Comment Field -
688 The comment field begins with a semicolon and extends through
689 the end of the line. This field is optional and may contain any
690 7-bit ascii character except null.
692 Comments do not affect assembly processing or program execu-
696 1.3 SYMBOLS AND EXPRESSIONS
699 This section describes the generic components of the ASxxxx
700 assemblers: the character set, the conventions observed in con-
701 structing symbols, and the use of numbers, operators, and ex-
708 The following characters are legal in ASxxxx source programs:
710 1. The letters A through Z. Both upper- and lower-case
711 letters are acceptable. The assemblers are case sensi-
712 tive, i.e. ABCD and abcd are different symbols. (The
713 assemblers can be made case insensitive by recompiling
714 with the appropriate switches.)
716 2. The digits 0 through 9
718 3. The characters . (period), $ (dollar sign), and _ (un-
721 4. The special characters listed in Tables 1 through 6.
724 Tables 1 through 6 describe the various ASxxxx label and
725 field terminators, assignment operators, operand separators, as-
726 sembly, unary, binary, and radix operators.
729 THE ASSEMBLER PAGE 1-7
730 SYMBOLS AND EXPRESSIONS
733 Table 1 Label Terminators and Assignment Operators
734 ----------------------------------------------------------------
736 : Colon Label terminator.
738 :: Double colon Label Terminator; defines the
739 label as a global label.
741 = Equal sign Direct assignment operator.
743 == Double equal Direct assignment operator;
744 sign defines the symbol as a global
747 ----------------------------------------------------------------
753 Table 2 Field Terminators and Operand Separators
754 ----------------------------------------------------------------
756 Tab Item or field terminator.
758 Space Item or field terminator.
760 , Comma Operand field separator.
762 ; Semicolon Comment field indicator.
764 ----------------------------------------------------------------
770 Table 3 Assembler Operators
771 ----------------------------------------------------------------
773 # Number sign Immediate expression indicator.
775 . Period Current location counter.
777 ( Left parenthesis Expression delimiter.
779 ) Right parenthesis Expression delimeter.
781 ----------------------------------------------------------------
784 THE ASSEMBLER PAGE 1-8
785 SYMBOLS AND EXPRESSIONS
793 Table 4 Unary Operators
794 ----------------------------------------------------------------
796 < Left bracket <FEDC Produces the lower byte
797 value of the expression.
800 > Right bracket >FEDC Produces the upper byte
801 value of the expression.
804 + Plus sign +A Positive value of A
806 - Minus sign -A Produces the negative
807 (2's complement) of A.
809 ~ Tilde ~A Produces the 1's comple-
812 ' Single quote 'D Produces the value of
815 " Double quote "AB Produces the double byte
818 \ Backslash '\n Unix style characters
820 or '\001 or octal byte values.
822 ----------------------------------------------------------------
830 THE ASSEMBLER PAGE 1-9
831 SYMBOLS AND EXPRESSIONS
834 Table 5 Binary Operators
835 ----------------------------------------------------------------
837 << Double 0800 << 4 Produces the 4 bit
838 Left bracket left-shifted value of
841 >> Double 0800 >> 4 Produces the 4 bit
842 Right bracket right-shifted value of
845 + Plus sign A + B Arithmetic Addition
848 - Minus sign A - B Arithmetic Subtraction
851 * Asterisk A * B Arithmetic Multiplica-
852 tion operator. (signed
855 / Slash A / B Arithmetic Division
859 & Ampersand A & B Logical AND operator.
861 | Bar A | B Logical OR operator.
863 % Percent sign A % B Modulus operator.
866 ^ Up arrow or A ^ B EXCLUSIVE OR operator.
869 ----------------------------------------------------------------
877 THE ASSEMBLER PAGE 1-10
878 SYMBOLS AND EXPRESSIONS
881 Table 6 Temporary Radix Operators
882 ----------------------------------------------------------------
884 $%, 0b, 0B Binary radix operator.
886 $&, 0o, 0O, 0q, 0Q Octal radix operator.
888 $#, 0d, 0D Decimal radix operator.
890 $$, 0h, 0H, 0x, 0X Hexidecimal radix operator.
893 Potential ambiguities arising from the use of 0b and 0d
894 as temporary radix operators may be circumvented by pre-
895 ceding all non-prefixed hexidecimal numbers with 00.
896 Leading 0's are required in any case where the first
897 hexidecimal digit is abcdef as the assembler will treat
898 the letter sequence as a label.
900 ----------------------------------------------------------------
908 1.3.2 User-Defined Symbols
911 User-defined symbols are those symbols that are equated to a
912 specific value through a direct assignment statement or appear
913 as labels. These symbols are added to the User Symbol Table as
914 they are encountered during assembly.
916 The following rules govern the creation of user-defined symbols:
918 1. Symbols can be composed of alphanumeric characters,
919 dollar signs ($), periods (.), and underscores (_)
922 2. The first character of a symbol must not be a number
923 (except in the case of local symbols).
925 3. The first eight characters of a symbol must be unique.
926 A symbol can be written with more than eight legal
927 characters, but the ninth and subsequent characters are
930 4. Spaces and Tabs must not be embedded within a symbol.
935 THE ASSEMBLER PAGE 1-11
936 SYMBOLS AND EXPRESSIONS
942 Local symbols are specially formatted symbols used as labels
943 within a block of coding that has been delimited as a local sym-
944 bol block. Local symbols are of the form n$, where n is a
945 decimal integer from 0 to 255, inclusive. Examples of local
953 The range of a local symbol block consists of those state-
954 ments between two normally constructed symbolic labels. Note
955 that a statement of the form:
959 is a direct assignment statement but does not create a label and
960 thus does not delimit the range of a local symbol block.
962 Note that the range of a local symbol block may extend across
965 Local symbols provide a convenient means of generating labels
966 for branch instructions and other such references within local
967 symbol blocks. Using local symbols reduces the possibility of
968 symbols with multiple definitions appearing within a user pro-
969 gram. In addition, the use of local symbols differentiates
970 entry-point labels from local labels, since local labels cannot
971 be referenced from outside their respective local symbol blocks.
972 Thus, local symbols of the same name can appear in other local
973 symbol blocks without conflict. Local symbols require less sym-
974 bol table space than normal symbols. Their use is recommended.
976 The use of the same local symbol within a local symbol block
977 will generate one or both of the m or p errors.
980 THE ASSEMBLER PAGE 1-12
981 SYMBOLS AND EXPRESSIONS
984 Example of local symbols:
986 a: ldx #atable ;get table address
987 lda #0d48 ;table length
992 b: ldx #btable ;get table address
993 lda #0d48 ;table length
999 1.3.4 Current Location Counter
1002 The period (.) is the symbol for the current location coun-
1003 ter. When used in the operand field of an instruction, the
1004 period represents the address of the first byte of the
1007 AS: ldx #. ;The period (.) refers to
1008 ;the address of the ldx
1011 When used in the operand field of an ASxxxx directive, it
1012 represents the address of the current byte or word:
1016 .word 0xFFFE,.+4,QK ;The operand .+4 in the .word
1017 ;directive represents a value
1018 ;stored in the second of the
1019 ;three words during assembly.
1021 If we assume the current value of the program counter is
1022 0H0200, then during assembly, ASxxxx reserves three words of
1023 storage starting at location 0H0200. The first value, a hex-
1024 idecimal constant FFFE, will be stored at location 0H0200. The
1025 second value represented by .+4 will be stored at location
1026 0H0202, its value will be 0H0206 ( = 0H0202 + 4). The third
1027 value defined by the symbol QK will be placed at location
1030 At the beginning of each assembly pass, ASxxxx resets the lo-
1031 cation counter. Normally, consecutive memory locations are as-
1032 signed to each byte of object code generated. However, the
1033 value of the location counter can be changed through a direct
1034 assignment statement of the following form:
1038 THE ASSEMBLER PAGE 1-13
1039 SYMBOLS AND EXPRESSIONS
1045 The new location counter can only be specified relative to
1046 the current location counter. Neglecting to specify the current
1047 program counter along with the expression on the right side of
1048 the assignment operator will generate the (.) error. (Absolute
1049 program areas may use the .org directive to specify the absolute
1050 location of the current program counter.)
1052 The following coding illustrates the use of the current location
1055 .area CODE1 (ABS) ;program area CODE1
1058 .org 0H100 ;set location to
1061 num1: ldx #.+0H10 ;The label num1 has
1066 .org 0H130 ;location counter
1069 num2: ldy #. ;The label num2 has
1075 .area CODE2 (REL) ;program area CODE2
1078 . = . + 0H20 ;Set location counter
1079 ;to relocatable 0H20 of
1080 ;the program section.
1082 num3: .word 0 ;The label num3 has
1084 ;of relocatable 0H20.
1086 . = . + 0H40 ;will reserve 0H40
1087 ;bytes of storage as will
1091 The .blkb and .blkw directives are the preferred methods of
1096 THE ASSEMBLER PAGE 1-14
1097 SYMBOLS AND EXPRESSIONS
1103 ASxxxx assumes that all numbers in the source program are to
1104 be interpreted in decimal radix unless otherwise specified. The
1105 .radix directive may be used to specify the default as octal,
1106 decimal, or hexidecimal. Individual numbers can be designated
1107 as binary, octal, decimal, or hexidecimal through the temporary
1108 radix prefixes shown in table 6.
1110 Negative numbers must be preceeded by a minus sign; ASxxxx
1111 translates such numbers into two's complement form. Positive
1112 numbers may (but need not) be preceeded by a plus sign.
1114 Numbers are always considered to be absolute values, therefor
1115 they are never relocatable.
1121 A term is a component of an expression and may be one of the
1128 1. A period (.) specified in an expression causes the
1129 current location counter to be used.
1130 2. A User-defined symbol.
1131 3. An undefined symbol is assigned a value of zero and
1132 inserted in the User-Defined symbol table as an un-
1135 3. A single quote followed by a single ascii character, or
1136 a double quote followed by two ascii characters.
1138 4. An expression enclosed in parenthesis. Any expression
1139 so enclosed is evaluated and reduced to a single term
1140 before the remainder of the expression in which it ap-
1141 pears is evaluated. Parenthesis, for example, may be
1142 used to alter the left-to-right evaluation of expres-
1143 sions, (as in A*B+C versus A*(B+C)), or to apply a un-
1144 ary operator to an entire expression (as in -(A+B)).
1146 5. A unary operator followed by a symbol or number.
1152 THE ASSEMBLER PAGE 1-15
1153 SYMBOLS AND EXPRESSIONS
1159 Expressions are combinations of terms joined together by
1160 binary operators. Expressions reduce to a 16-bit value. The
1161 evaluation of an expression includes the determination of its
1162 attributes. A resultant expression value may be one of three
1163 types (as described later in this section): relocatable, ab-
1164 solute, and external.
1166 Expressions are evaluate with an operand hierarchy as follows:
1168 * / % multiplication,
1175 << >> left shift and
1178 ^ exclusive or fourth.
1180 & logical and fifth.
1184 except that unary operators take precedence over binary
1188 A missing or illegal operator terminates the expression
1189 analysis, causing error codes (o) and/or (q) to be generated
1190 depending upon the context of the expression itself.
1192 At assembly time the value of an external (global) expression
1193 is equal to the value of the absolute part of that expression.
1194 For example, the expression external+4, where 'external' is an
1195 external symbol, has the value of 4. This expression, however,
1196 when evaluated at link time takes on the resolved value of the
1197 symbol 'external', plus 4.
1199 Expressions, when evaluated by ASxxxx, are one of three
1200 types: relocatable, absolute, or external. The following dis-
1201 tinctions are important:
1203 1. An expression is relocatable if its value is fixed re-
1204 lative to the base address of the program area in which
1205 it appears; it will have an offset value added at link
1206 time. Terms that contain labels defined in relocatable
1207 program areas will have a relocatable value;
1210 THE ASSEMBLER PAGE 1-16
1211 SYMBOLS AND EXPRESSIONS
1214 similarly, a period (.) in a relocatable program area,
1215 representing the value of the current program location
1216 counter, will also have a relocatable value.
1218 2. An expression is absolute if its value is fixed. An
1219 expression whose terms are numbers and ascii characters
1220 will reduce to an absolute value. A relocatable ex-
1221 pression or term minus a relocatable term, where both
1222 elements being evaluated belong to the same program
1223 area, is an absolute expression. This is because every
1224 term in a program area has the same relocation bias.
1225 When one term is subtracted from the other the reloca-
1228 3. An expression is external (or global) if it contains a
1229 single global reference (plus or minus an absolute ex-
1230 pression value) that is not defined within the current
1231 program. Thus, an external expression is only par-
1232 tially defined following assembly and must be resolved
1237 1.4 GENERAL ASSEMBLER DIRECTIVES
1240 An ASxxxx directive is placed in the operator field of the
1241 source line. Only one directive is allowed per source line.
1242 Each directive may have a blank operand field or one or more
1243 operands. Legal operands differ with each directive.
1246 1.4.1 .module Directive
1252 The .module directive causes the string to be included in the
1253 assemblers output file as an identifier for this particular ob-
1254 ject module. The string may be from 1 to 8 characters in
1255 length. Only one identifier is allowed per assembled module.
1256 The main use of this directive is to allow the linker to report
1257 a modules' use of undefined symbols. At link time all undefined
1258 symbols are reported and the modules referencing them are
1264 THE ASSEMBLER PAGE 1-17
1265 GENERAL ASSEMBLER DIRECTIVES
1268 1.4.2 .title Directive
1274 The .title directive provides a character string to be placed
1275 on the second line of each page during listing.
1278 1.4.3 .sbttl Directive
1284 The .sbttl directive provides a character string to be placed
1285 on the third line of each page during listing.
1288 1.4.4 .page Directive
1294 The .page directive causes a page ejection with a new heading
1295 to be printed. The new page occurs after the next line of the
1296 source program is processed, this allows an immediately follow-
1297 ing .sbttl directive to appear on the new page. The .page
1298 source line will not appear in the file listing. Paging may be
1299 disabled by invoking the -p directive.
1302 1.4.5 .byte and .db Directives
1306 .byte exp ;Stores the binary value
1307 .db exp ;of the expression in the
1310 .byte exp1,exp2,expn ;Stores the binary values
1311 .db exp1,exp2,expn ;of the list of expressions
1312 ;in successive bytes.
1314 where: exp, represent expressions that will be
1315 exp1, truncated to 8-bits of data.
1316 . Each expression will be calculated
1317 . as a 16-bit word expression,
1318 . the high-order byte will be truncated.
1319 . Multiple expressions must be
1322 THE ASSEMBLER PAGE 1-18
1323 GENERAL ASSEMBLER DIRECTIVES
1326 expn separated by commas.
1328 The .byte or .db directives are used to generate successive
1329 bytes of binary data in the object module.
1332 1.4.6 .word and .dw Directives
1336 .word exp ;Stores the binary value
1337 .dw exp ;of the expression in
1340 .word exp1,exp2,expn ;Stores the binary values
1341 .dw exp1,exp2,expn ;of the list of expressions
1342 ;in successive words.
1344 where: exp, represent expressions that will occupy two
1345 exp1, bytes of data. Each expression will be
1346 . calculated as a 16-bit word expression.
1347 . Multiple expressions must be
1348 expn separated by commas.
1350 The .word or .dw directives are used to generate successive
1351 words of binary data in the object module.
1354 1.4.7 .blkb, .blkw, and .ds Directives
1358 .blkb N ;reserve N bytes of space
1359 .blkw N ;reserve N words of space
1360 .ds N ;reserve N bytes of space
1362 The .blkb and .ds directives reserve byte blocks in the ob-
1363 ject module; the .blkw directive reserves word blocks.
1366 1.4.8 .ascii Directive
1372 where: string is a string of printable ascii characters.
1374 / / represent the delimiting characters. These
1375 delimiters may be any paired printing
1376 characters, as long as the characters are not
1377 contained within the string itself. If the
1380 THE ASSEMBLER PAGE 1-19
1381 GENERAL ASSEMBLER DIRECTIVES
1384 delimiting characters do not match, the .ascii
1385 directive will give the (q) error.
1387 The .ascii directive places one binary byte of data for each
1388 character in the string into the object module.
1391 1.4.9 .ascis Directive
1397 where: string is a string of printable ascii characters.
1399 / / represent the delimiting characters. These
1400 delimiters may be any paired printing
1401 characters, as long as the characters are not
1402 contained within the string itself. If the
1403 delimiting characters do not match, the .ascis
1404 directive will give the (q) error.
1406 The .ascis directive places one binary byte of data for each
1407 character in the string into the object module. The last
1408 character in the string will have the high order bit set.
1411 1.4.10 .asciz Directive
1417 where: string is a string of printable ascii characters.
1419 / / represent the delimiting characters. These
1420 delimiters may be any paired printing
1421 characters, as long as the characters are not
1422 contained within the string itself. If the
1423 delimiting characters do not match, the .asciz
1424 directive will give the (q) error.
1426 The .asciz directive places one binary byte of data for each
1427 character in the string into the object module. Following all
1428 the character data a zero byte is inserted to terminate the
1434 THE ASSEMBLER PAGE 1-20
1435 GENERAL ASSEMBLER DIRECTIVES
1438 1.4.11 .radix Directive
1444 where: character represents a single character specifying the
1445 default radix to be used for succeeding numbers.
1446 The character may be any one of the following:
1460 1.4.12 .even Directive
1466 The .even directive ensures that the current location counter
1467 contains an even boundary value by adding 1 if the current loca-
1471 1.4.13 .odd Directive
1477 The .odd directive ensures that the current location counter
1478 contains an odd boundary value by adding one if the current lo-
1484 THE ASSEMBLER PAGE 1-21
1485 GENERAL ASSEMBLER DIRECTIVES
1488 1.4.14 .area Directive
1492 .area name [(options)]
1494 where: name represents the symbolic name of the program sec-
1495 tion. This name may be the same as any
1496 user-defined symbol as the area names are in-
1497 dependent of all symbols and labels.
1499 options specify the type of program or data area:
1500 ABS absolute (automatically invokes OVR)
1507 The .area directive provides a means of defining and separat-
1508 ing multiple programming and data sections. The name is the
1509 area label used by the assembler and the linker to collect code
1510 from various separately assembled modules into one section. The
1511 name may be from 1 to 8 characters in length.
1513 The options are specified within parenthesis and separated by
1514 commas as shown in the following example:
1516 .area TEST (REL,CON) ;This section is relocatable
1517 ;and concatenated with other
1518 ;sections of this program area.
1520 .area DATA (REL,OVR) ;This section is relocatable
1521 ;and overlays other sections
1522 ;of this program area.
1524 .area SYS (ABS,OVR) ;(CON not allowed with ABS)
1525 ;This section is defined as
1526 ;absolute. Absolute sections
1527 ;are always overlayed with
1528 ;other sections of this program
1531 .area PAGE (PAG) ;This is a paged section. The
1532 ;section must be on a 256 byte
1533 ;boundary and its length is
1534 ;checked by the linker to be
1535 ;no larger than 256 bytes.
1536 ;This is useful for direct page
1541 THE ASSEMBLER PAGE 1-22
1542 GENERAL ASSEMBLER DIRECTIVES
1545 The default area type is REL|CON; i.e. a relocatable sec-
1546 tion which is concatenated with other sections of code with the
1547 same area name. The ABS option indicates an absolute area. The
1548 OVR and CON options indicate if program sections of the same
1549 name will overlay each other (start at the same location) or be
1550 concatenated with each other (appended to each other).
1552 Multiple invocations of the .area directive with the same
1553 name must specify the same options or leave the options field
1554 blank, this defaults to the previously specified options for
1556 The ASxxxx assemblers automatically provide two program
1559 '. .ABS.' This dumby section contains all absolute
1560 symbols and their values.
1562 '_CODE' This is the default program/data area.
1563 This program area is of type (REL,CON).
1564 The ASxxxx assemblers also automatically generate two symbols
1565 for each program area:
1567 's_<area>' This is the starting address of the pro-
1570 indent -16 'l_<area>' This is the
1571 length of the program area.
1574 1.4.15 .org Directive
1580 where: exp is an absolute expression that becomes the cur-
1581 rent location counter.
1583 The .org directive is valid only in an absolute program section
1584 and will give a (q) error if used in a relocatable program area.
1585 The .org directive specifies that the current location counter
1586 is to become the specified absolute value.
1591 THE ASSEMBLER PAGE 1-23
1592 GENERAL ASSEMBLER DIRECTIVES
1595 1.4.16 .globl Directive
1599 .globl sym1,sym2,...,symn
1601 where: sym1, represent legal symbolic names. When
1602 sym2,... When multiple symbols are specified,
1603 symn they are separated by commas.
1605 A .globl directive may also have a label field and/or a com-
1608 The .globl directive is provided to define (and thus provide
1609 linkage to) symbols not otherwise defined as global symbols
1610 within a module. In defining global symbols the directive
1611 .globl J is similar to:
1613 J == expression or J::
1615 Because object modules are linked by global symbols, these
1616 symbols are vital to a program. All internal symbols appearing
1617 within a given program must be defined at the end of pass 1 or
1618 they will be considered undefined. The assembly directive (-g)
1619 can be be invoked to make all undefined symbols global at the
1623 1.4.17 .if, .else, and .endif Directives
1629 . ;} range of true condition
1633 . ;} range of false condition
1637 The conditional assembly directives allow you to include or
1638 exclude blocks of source code during the assembly process, based
1639 on the evaluation of the condition test.
1641 The range of true condition will be processed if the expres-
1642 sion 'expr' is not zero (i.e. true) and the range of false con-
1643 dition will be processed if the expression 'expr' is zero (i.e
1644 false). The range of true condition is optional as is the .else
1645 directive and the range of false condition. The following are
1646 all valid .if/.else/.endif constructions:
1649 THE ASSEMBLER PAGE 1-24
1650 GENERAL ASSEMBLER DIRECTIVES
1654 .if A-4 ;evaluate A-4
1655 .byte 1,2 ;insert bytes if A-4 is
1658 .if K+3 ;evaluate K+3
1660 .byte 3,4 ;insert bytes if K+3
1663 .if J&3 ;evaluate J masked by 3
1664 .byte 12 ;insert this byte if J&3
1666 .byte 13 ;insert this byte if J&3
1670 The .if/.else/.endif directives may be nested upto 10 levels.
1672 The .page directive is processed within a false condition
1673 range to allow extended textual information to be incorporated
1674 in the source program with out the need to use the comment
1680 This text will be bypassed during assembly
1681 but appear in the listing file.
1689 1.4.18 .include Directive
1695 where: string represents a delimited string that is the file
1696 specification of an ASxxxx source file.
1698 The .include directive is used to insert a source file within
1699 the source file currently being assembled. When this directive
1700 is encountered, an implicit .page directive is issued. When the
1701 end of the specified source file is reached, an implicit .page
1702 directive is issued and input continues from the previous source
1703 file. The maximum nesting level of source files specified by a
1704 .include directive is five.
1707 THE ASSEMBLER PAGE 1-25
1708 GENERAL ASSEMBLER DIRECTIVES
1711 The total number of separately specified .include files is
1712 unlimited as each .include file is opened and then closed during
1713 each pass made by the assembler.
1716 1.4.19 .setdp Directive
1720 .setdp [base [,area]]
1722 The set direct page directive has a common format in all the
1723 AS68xx assemblers. The .setdp directive is used to inform the
1724 assembler of the current direct page region and the offset ad-
1725 dress within the selected area. The normal invocation methods
1735 for all the 68xx microprocessors (the 6804 has only the paged
1736 ram area). The commands specify that the direct page is in area
1737 DIRECT and its offset address is 0 (the only valid value for all
1738 but the 6809 microprocessor). Be sure to place the DIRECT area
1739 at address 0 during linking. When the base address and area are
1740 not specified, then zero and the current area are the defaults.
1741 If a .setdp directive is not issued the assembler defaults the
1742 direct page to the area "_CODE" at offset 0.
1744 The assembler verifies that any local variable used in a
1745 direct variable reference is located in this area. Local vari-
1746 able and constant value direct access addresses are checked to
1747 be within the address range from 0 to 255.
1749 External direct references are assumed by the assembler to be
1750 in the correct area and have valid offsets. The linker will
1751 check all direct page relocations to verify that they are within
1754 The 6809 microprocessor allows the selection of the direct
1755 page to be on any 256 byte boundary by loading the appropriate
1756 value into the dp register. Typically one would like to select
1757 the page boundary at link time, one method follows:
1760 THE ASSEMBLER PAGE 1-26
1761 GENERAL ASSEMBLER DIRECTIVES
1764 .area DIRECT (PAG) ; define the direct page
1771 ldd #DIRECT ; load the direct page register
1772 tfr a,dp ; for access to the direct page
1774 At link time specify the base and global equates to locate the
1780 Both the area address and offset value must be specified (area
1781 and variable names are independent). The linker will verify
1782 that the relocated direct page accesses are within the direct
1784 The preceeding sequence could be repeated for multiple paged
1785 areas, however an alternate method is to define a non-paged area
1786 and use the .setdp directive to specify the offset value:
1788 .area DIRECT ; define non-paged area
1794 .setdp 0,DIRECT ; direct page area
1795 ldd #DIRECT ; load the direct page register
1796 tfr a,dp ; for access to the direct page
1799 .setdp 0x100,DIRECT ; direct page area
1800 ldd #DIRECT+0x100 ; load the direct page register
1801 tfr a,dp ; for access to the direct page
1803 The linker will verify that subsequent direct page references
1804 are in the specified area and offset address range. It is the
1805 programmers responsibility to load the dp register with the cor-
1806 rect page segment corresponding to the .setdp base address
1809 For those cases where a single piece of code must access a
1810 defined data structure within a direct page and there are many
1811 pages, define a dumby direct page linked at address 0. This
1812 dumby page is used only to define the variable labels. Then
1813 load the dp register with the real base address but donot use a
1814 .setdp directive. This method is equivalent to indexed
1817 THE ASSEMBLER PAGE 1-27
1818 GENERAL ASSEMBLER DIRECTIVES
1821 addressing, where the dp register is the index register and the
1822 direct addressing is the offset.
1828 The ASxxxx assemblers are command line oriented. After the
1829 assembler is started, enter the option(s) and file(s) to assem-
1830 ble following the 'argv:' prompt:
1832 argv: [-dqxjgalcposf] file1 [file2 file3 ... file6]
1838 x hex listing (default)
1840 The listing radix affects the
1841 .lst, .rel, and .sym files.
1843 j add line number and debug information to file
1844 g undefined symbols made global
1845 a all user symbols made global
1847 l create list output file1.lst
1848 o create object output file1.rel
1849 s create symbol output file1.sym
1851 c generate sdcdb debug information
1853 p disable listing pagination
1855 relocatable reference flagging:
1857 f by ` in the listing file
1858 ff by mode in the listing file
1860 asx8051 specific command line option:
1861 -I<dir> Add the named directory to the include file
1862 search path. This option may be used more than once.
1863 Directories are searched in the order given.
1865 The file name for the .lst, .rel, and .sym files is the first
1866 file name specified in the command line. All output files are
1867 ascii text files which may be edited, copied, etc. The output
1868 files are the concatenation of all the input files, if files are
1869 to be assembled independently invoke the assembler for each
1872 The .rel file contains a radix directive so that the linker
1873 will use the proper conversion for this file. Linked files may
1874 have different radices.
1876 If the list (l) option is specified without the symbol table
1877 (s) option, the symbol table is placed at the end of the listing
1880 ASXXXX assembles supported by and distributed with SDCC are:
1881 asx8051 (Intel 8051)
1882 as-z80 (Zilog Z80 / Hitachi HD64180)
1883 as-gbz80 (GameBoy Z80-like CPU)
1884 as-hc08 (Motorola 68HC08)
1887 THE ASSEMBLER PAGE 1-28
1894 The ASxxxx assemblers provide limited diagnostic error codes
1895 during the assembly process, these errors will be noted in the
1896 listing file and printed on the stderr device.
1898 The assembler reports the errors on the stderr device as
1900 ?ASxxxx-Error-<*> in line nnn of filename
1902 where * is the error code, nnn is the line number, and filename
1903 is the source/include file.
1907 (.) This error is caused by an absolute direct assign-
1908 ment of the current location counter
1909 . = expression (incorrect)
1910 rather than the correct
1913 (a) Indicates a machine specific addressing or address-
1916 (b) Indicates a direct page boundary error.
1918 (d) Indicates a direct page addressing error.
1920 (i) Caused by an .include file error or an .if/.endif
1923 (m) Multiple definitions of the same label, multiple
1924 .module directives, or multiple conflicting attri-
1925 butes in an .area directive.
1927 (o) Directive or mnemonic error or the use of the .org
1928 directive in a relocatable area.
1930 (p) Phase error: label location changing between passes
1931 2 and 3. Normally caused by having more than one
1932 level of forward referencing.
1934 (q) Questionable syntax: missing or improper operators,
1935 terminators, or delimiters.
1937 (r) Relocation error: logic operation attempted on a
1938 relocatable term, addition of two relocatable terms,
1939 subtraction of two relocatable terms not within the
1940 same programming area or external symbols.
1942 (u) Undefined symbol encountered during assembly.
1945 THE ASSEMBLER PAGE 1-29
1952 The (-l) option produces an ascii output listing file. Each
1953 page of output contains a four line header:
1956 1. The ASxxxx program name and page number
1958 2. Title from a .title directive (if any)
1960 3. Subtitle from a .sbttl directive (if any)
1966 Each succeeding line contains five fields:
1969 1. Error field (first three characters of line)
1971 2. Current location counter
1973 3. Generated code in byte format
1975 4. Source text line number
1980 The error field may contain upto 2 error flags indicating any
1981 errors encountered while assembling this line of source code.
1983 The current location counter field displays the 16-bit pro-
1984 gram position. This field will be in the selected radix.
1986 The generated code follows the program location. The listing
1987 radix determines the number of bytes that will be displayed in
1988 this field. Hexidecimal listing allows six bytes of data within
1989 the field, decimal and octal allow four bytes within the field.
1990 If more than one field of data is generated from the assembly of
1991 a single line of source code, then the data field is repeated on
1994 The source text line number is printed in decimal and is fol-
1995 lowed by the source text.
1997 Two special cases will disable the listing of a line of
2002 THE ASSEMBLER PAGE 1-30
2006 1. Source line with a .page directive is never listed.
2008 2. Source line with a .include file directive is not
2009 listed unless the .include file cannot be opened.
2012 Two data field options are available to flag those bytes
2013 which will be relocated by the linker. If the -f option is
2014 specified then each byte to be relocated will be preceeded by
2015 the '`' character. If the -ff option is specified then each
2016 byte to be relocated will be preceeded by one of the following
2019 1. * paged relocation
2021 2. u low byte of unsigned word or unsigned byte
2023 3. v high byte of unsigned word
2025 4. p PCR low byte of word relocation or PCR byte
2027 5. q PCR high byte of word relocation
2029 6. r low byte relocation or byte relocation
2031 7. s high byte relocation
2035 1.8 SYMBOL TABLE FILE
2038 The symbol table has two parts:
2040 1. The alphabetically sorted list of symbols and/or labels
2041 defined or referenced in the source program.
2043 2. A list of the program areas defined during assembly of
2047 The sorted list of symbols and/or labels contains the follow-
2050 1. Program area number (none if absolute value or exter-
2053 2. The symbol or label
2055 3. Directly assigned symbol is denoted with an (=) sign
2059 THE ASSEMBLER PAGE 1-31
2063 4. The value of a symbol, location of a label relative to
2064 the program area base address (=0), or a **** indicat-
2065 ing the symbol or label is undefined.
2067 5. The characters: G - global, R - relocatable, and X -
2071 The list of program areas provides the correspondence between
2072 the program area numbers and the defined program areas, the size
2073 of the program areas, and the area flags (attributes).
2079 The object file is an ascii file containing the information
2080 needed by the linker to bind multiple object modules into a com-
2081 plete loadable memory image. The object module contains the
2082 following designators:
2089 H Most significant byte first
2090 L Least significant byte first
2097 R Relocation information
2098 P Paging information
2100 Refer to the linker for a detailed description of each of the
2101 designators and the format of the information contained in the
2125 2.1 ASLINK RELOCATING LINKER
2128 ASLINK is the companion linker for the ASxxxx assemblers.
2130 The program ASLINK is a general relocating linker performing
2131 the following functions:
2133 1. Bind multiple object modules into a single memory image
2135 2. Resolve inter-module symbol references
2137 3. Combine code belonging to the same area from multiple
2138 object files into a single contiguous memory region
2140 4. Search and import object module libraries for undefined
2143 5. Perform byte and word program counter relative
2144 (pc or pcr) addressing calculations
2146 6. Define absolute symbol values at link time
2148 7. Define absolute area base address values at link time
2150 8. Produce Intel Hex or Motorola S19 output file
2152 9. Produce a map of the linked memory image
2154 10. Produce an updated listing file with the relocated ad-
2168 The linker may run in the command line mode or command file
2169 modes. The allowed startup linker commands are:
2171 -c/-f command line / command file modes
2173 -p/-n enable/disable echo file.lnk input to stdout
2175 If command line mode is selected, all linker commands come
2176 from stdin, if the command file mode is selected the commands
2177 are input from the specified file (extension must be .lnk).
2179 The linker is started via
2183 After invoking the linker the valid options are:
2185 1. -i/-s Intel Hex (file.ihx) or Motorola S19 (file.s19)
2188 2. -m Generate a map file (file.map). This file con-
2189 tains a list of the symbols (by area) with absolute ad-
2190 dresses, sizes of linked areas, and other linking
2193 3. -u Generate an updated listing file (file.rst)
2194 derived from the relocated addresses and data from the
2197 4. -xdq Specifies the number radix for the map file
2198 (Hexidecimal, Decimal, or Octal).
2200 5. fileN Files to be linked. Files may be on the same
2201 line as the above options or on a separate line(s) one
2202 file per line or multiple files separated by spaces or
2205 6. -b area = expression (one definition per line)
2206 This specifies an area base address where the expres-
2207 sion may contain constants and/or defined symbols from
2210 7. -g symbol = expression (one definition per line)
2211 This specifies the value for the symbol where the ex-
2212 pression may contain constants and/or defined symbols
2213 from the linked files.
2215 8. -k library directory path
2216 (one definition per line) This specifies one possible
2224 path to an object library. More than one path is al-
2227 9. -l library file specification
2228 (one definition per line) This specifies a possible
2229 library file. More than one file is allowed.
2231 10. -e or null line, terminates input to the linker.
2233 ASLINK linkers supported by and distributed with SDCC are:
2235 link-z90 (Zilog Z80 / Hitachi HD64180)
2236 link-gbz80 (GameBoy Z80-like CPU)
2237 link-hc08 (Motorola 68HC08)
2239 aslink (Intel 8051) specific options:
2242 -j Produce NoICE debug as file[NOI]
2243 -z Produce SDCdb debug as file[cdb]
2244 -u Update listing file(s) with link data as file(s)[.RST]
2246 -a [iram-size] Check for internal RAM overflow
2247 -v [xram-size] Check for external RAM overflow
2248 -w [code-size] Check for code overflow
2249 -y Generate memory usage summary file[mem]
2250 -Y Pack internal ram
2251 -A [stack-size] Allocate space for stack
2254 link-z80 (Zilog Z80 / Hitachi HD64180) specific options:
2257 -j no$gmb symbol file generated as file[SYM]
2259 -z Produce SDCdb debug as file[cdb]
2260 -Z Gameboy image as file[GB]
2262 -u Update listing file(s) with link data as file(s)[.RST]
2265 link-gbz80 (GameBoy Z80-like CPU) specific options:
2268 -yo Number of rom banks (default: 2)
2269 -ya Number of ram banks (default: 0)
2270 -yt MBC type (default: no MBC)
2271 -yn Name of program (default: name of output file)
2272 -yp# Patch one byte in the output GB file (# is: addr=byte)
2274 -j no$gmb symbol file generated as file[SYM]
2276 -Z Gameboy image as file[GB]
2278 -u Update listing file(s) with link data as file(s)[.RST]
2281 link-hc08 (Motorola 68HC08) specific options:
2283 -t ELF executable as file[elf]
2284 -j Produce NoICE debug as file[NOI]
2285 -z Produce SDCdb debug as file[cdb]
2286 -u Update listing file(s) with link data as file(s)[.RST]
2288 -a [iram-size] Check for internal RAM overflow
2289 -v [xram-size] Check for external RAM overflow
2290 -w [code-size] Check for code overflow
2294 2.3 LIBRARY PATH(S) AND FILE(S)
2297 The process of resolving undefined symbols after scanning the
2298 input object files includes the scanning of object module
2299 libraries. The linker will search through all combinations of
2300 the library path specifications (input by the -k option) and the
2301 library file specifications (input by the -l option) that lead
2302 to an existing library file. Each library file contains a list
2303 (one file per line) of modules included in this particular
2304 library. Each existing object module is scanned for a match to
2305 the undefined symbol. The first module containing the symbol is
2306 then linked with the previous modules to resolve the symbol de-
2307 finition. The library object modules are rescanned until no
2308 more symbols can be resolved. The scanning algorithm allows
2309 resolution of back references. No errors are reported for non
2310 existant library files or object modules.
2312 The library file specification may be formed in one of two
2315 1. If the library file contained an absolute path/file
2316 specification then this is the object module's
2320 2. If the library file contains a relative path/file
2321 specification then the concatenation of the path and
2322 this file specification becomes the object module's
2327 As an example, assume there exists a library file termio.lib
2328 in the syslib directory specifying the following object modules:
2330 \6809\io_disk first object module
2331 d:\special\io_comm second object module
2333 and the following parameters were specified to the linker:
2338 LIBRARY PATH(S) AND FILE(S)
2341 -k c:\iosystem\ the first path
2342 -k c:\syslib\ the second path
2344 -l termio the first library file
2345 -l io the second library file (no such file)
2347 The linker will attempt to use the following object modules to
2348 resolve any undefined symbols:
2350 c:\syslib\6809\io_disk.rel (concatenated path/file)
2351 d:\special\io_comm.rel (absolute path/file)
2353 all other path(s)/file(s) don't exist. (No errors are reported
2354 for non existant path(s)/file(s).)
2357 2.4 ASLINK PROCESSING
2360 The linker processes the files in the order they are
2361 presented. The first pass through the input files is used to
2362 define all program areas, the section area sizes, and symbols
2363 defined or referenced. Undefined symbols will initiate a search
2364 of any specified library file(s) and the importing of the module
2365 containing the symbol definition. After the first pass the -b
2366 (area base address) definitions, if any, are processed and the
2369 The area linking proceeds by first examining the area types
2370 ABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separate
2371 object modules are always overlayed and have been assembled at a
2372 specific address, these are not normally relocated (if a -b com-
2373 mand is used on an absolute area the area will be relocated).
2374 Relative areas (normally defined as REL|CON) have a base address
2375 of 0x0000 as read from the object files, the -b command speci-
2376 fies the beginning address of the area. All subsequent relative
2377 areas will be concatenated with proceeding relative areas.
2378 Where specific ordering is desired, the first linker input file
2379 should have the area definitions in the desired order. At the
2380 completion of the area linking all area addresses and lengths
2381 have been determined. The areas of type PAG are verified to be
2382 on a 256 byte boundary and that the length does not exceed 256
2383 bytes. Any errors are noted on stderr and in the map file.
2385 Next the global symbol definitions (-g option), if any, are
2386 processed. The symbol definitions have been delayed until this
2387 point because the absolute addresses of all internal symbols are
2388 known and can be used in the expression calculations.
2390 Before continuing with the linking process the symbol table
2391 is scanned to determine if any symbols have been referenced but
2392 not defined. Undefined symbols are listed on the stderr device.
2399 if a .module directive was included in the assembled file the
2400 module making the reference to this undefined variable will be
2403 Constants defined as global in more than one module will be
2404 flagged as multiple definitions if their values are not identi-
2407 After the preceeding processes are complete the linker may
2408 output a map file (-m option). This file provides the following
2411 1. Global symbol values and label absolute addresses
2413 2. Defined areas and there lengths
2415 3. Remaining undefined symbols
2417 4. List of modules linked
2419 5. List of library modules linked
2421 6. List of -b and -g definitions
2426 The final step of the linking process is performed during the
2427 second pass of the input files. As the xxx.rel files are read
2428 the code is relocated by substituting the physical addresses for
2429 the referenced symbols and areas and may be output in Intel or
2430 Motorola formats. The number of files linked and symbols de-
2431 fined/referenced is limited by the processor space available to
2432 build the area/symbol lists. If the -u option is specified then
2433 the listing files (file.lst) associated with the relocation
2434 files (file.rel) are scanned and used to create a new file
2435 (file.rst) which has all addresses and data relocated to their
2439 2.5 LINKER INPUT FORMAT
2442 The linkers' input object file is an ascii file containing
2443 the information needed by the linker to bind multiple object
2444 modules into a complete loadable memory image.
2446 The object module contains the following designators:
2459 H Most significant byte first
2460 L Least significant byte first
2467 R Relocation information
2468 P Paging information
2471 2.5.1 Object Module Format
2474 The first line of an object module contains the [XDQ][HL]
2475 format specifier (i.e. XH indicates a hexidecimal file with
2476 most significant byte first) for the following designators.
2481 H aa areas gg global symbols
2483 The header line specifies the number of areas(aa) and the
2484 number of global symbols(gg) defined or referenced in this ob-
2485 ject module segment.
2492 The module line specifies the module name from which this
2493 header segment was assembled. The module line will not appear
2494 if the .module directive was not used in the source program.
2505 The symbol line defines (Def) or references (Ref) the symbol
2506 'string' with the value nnnn. The defined value is relative to
2507 the current area base address. References to constants and
2508 external global symbols will always appear before the first area
2515 definition. References to external symbols will have a value of
2521 A label size ss flags ff
2523 The area line defines the area label, the size (ss) of the
2524 area in bytes, and the area flags (ff). The area flags specify
2525 the ABS, REL, CON, OVR, and PAG parameters:
2527 OVR/CON (0x04/0x00 i.e. bit position 2)
2529 ABS/REL (0x08/0x00 i.e. bit position 3)
2531 PAG (0x10 i.e. bit position 4)
2536 T xx xx nn nn nn nn nn ...
2538 The T line contains the assembled code output by the assem-
2539 bler with xx xx being the offset address from the current area
2540 base address and nn being the assembled instructions and data in
2546 R 0 0 nn nn n1 n2 xx xx ...
2548 The R line provides the relocation information to the linker.
2549 The nn nn value is the current area index, i.e. which area the
2550 current values were assembled. Relocation information is en-
2551 coded in groups of 4 bytes:
2553 1. n1 is the relocation mode and object format
2554 1. bit 0 word(0x00)/byte(0x01)
2555 2. bit 1 relocatable area(0x00)/symbol(0x02)
2556 3. bit 2 normal(0x00)/PC relative(0x04) relocation
2557 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for
2559 5. bit 4 signed(0x00)/unsigned(0x10) byte data
2560 6. bit 5 normal(0x00)/page '0'(0x20) reference
2561 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference
2562 8. bit 7 LSB byte(0x00)/MSB byte(0x80) with 2-byte
2565 2. n2 is a byte index into the corresponding (i.e. pre-
2566 ceeding) T line data (i.e. a pointer to the data to be
2573 updated by the relocation). The T line data may be
2574 1-byte or 2-byte byte data format or 2-byte word
2577 3. xx xx is the area/symbol index for the area/symbol be-
2578 ing referenced. the corresponding area/symbol is found
2579 in the header area/symbol lists.
2582 The groups of 4 bytes are repeated for each item requiring relo-
2583 cation in the preceeding T line.
2588 P 0 0 nn nn n1 n2 xx xx
2590 The P line provides the paging information to the linker as
2591 specified by a .setdp directive. The format of the relocation
2592 information is identical to that of the R line. The correspond-
2593 ing T line has the following information:
2596 Where aa aa is the area reference number which specifies the
2597 selected page area and bb bb is the base address of the page.
2598 bb bb will require relocation processing if the 'n1 n2 xx xx' is
2599 specified in the P line. The linker will verify that the base
2600 address is on a 256 byte boundary and that the page length of an
2601 area defined with the PAG type is not larger than 256 bytes.
2603 The linker defaults any direct page references to the first
2604 area defined in the input REL file. All ASxxxx assemblers will
2605 specify the _CODE area first, making this the default page area.
2608 2.6 LINKER ERROR MESSAGES
2611 The linker provides detailed error messages allowing the pro-
2612 grammer to quickly find the errant code. As the linker com-
2613 pletes pass 1 over the input file(s) it reports any page
2614 boundary or page length errors as follows:
2616 ?ASlink-Warning-Paged Area PAGE0 Boundary Error
2620 ?ASlink-Warning-Paged Area PAGE0 Length Error
2622 where PAGE0 is the paged area.
2627 LINKER ERROR MESSAGES
2630 During Pass two the linker reads the T, R, and P lines per-
2631 forming the necessary relocations and outputting the absolute
2632 code. Various errors may be reported during this process
2633 The P line processing can produce only one possible error:
2635 ?ASlink-Warning-Page Definition Boundary Error
2636 file module pgarea pgoffset
2637 PgDef t6809l t6809l PAGE0 0001
2639 The error message specifies the file and module where the .setdp
2640 direct was issued and indicates the page area and the page
2641 offset value determined after relocation.
2644 The R line processing produces various errors:
2646 ?ASlink-Warning-Byte PCR relocation error for symbol bra2
2647 file module area offset
2648 Refby t6809l t6809l TEST 00FE
2649 Defin tconst tconst . .ABS. 0080
2651 ?ASlink-Warning-Unsigned Byte error for symbol two56
2652 file module area offset
2653 Refby t6800l t6800l DIRECT 0015
2654 Defin tconst tconst . .ABS. 0100
2656 ?ASlink-Warning-Page0 relocation error for symbol ltwo56
2657 file module area offset
2658 Refby t6800l t6800l DIRECT 000D
2659 Defin tconst tconst DIRECT 0100
2661 ?ASlink-Warning-Page Mode relocation error for symbol two56
2662 file module area offset
2663 Refby t6809l t6809l DIRECT 0005
2664 Defin tconst tconst . .ABS. 0100
2666 ?ASlink-Warning-Page Mode relocation error
2667 file module area offset
2668 Refby t Pagetest PROGRAM 0006
2669 Defin t Pagetest DIRECT 0100
2671 These error messages specify the file, module, area, and offset
2672 within the area of the code referencing (Refby) and defining
2673 (Defin) the symbol. If the symbol is defined in the same module
2674 as the reference the linker is unable to report the symbol name.
2675 The assembler listing file(s) should be examined at the offset
2676 from the specified area to located the offending code.
2680 1. The byte PCR error is caused by exceeding the pc rela-
2681 tive byte branch range.
2684 THE LINKER PAGE 2-10
2685 LINKER ERROR MESSAGES
2688 2. The Unsigned byte error indicates an indexing value was
2689 negative or larger than 255.
2691 3. The Page0 error is generated if the direct page vari-
2692 able is not in the page0 range of 0 to 255.
2694 4. The page mode error is generated if the direct variable
2695 is not within the current direct page (6809).
2699 THE LINKER Page 2-11
2700 INTEL HEX OUTPUT FORMAT
2703 2.7 INTEL HEX OUTPUT FORMAT
2705 Record Mark Field - This field signifies the start of a
2706 record, and consists of an ascii colon
2709 Record Length Field - This field consists of two ascii
2710 characters which indicate the number of
2711 data bytes in this record. The
2712 characters are the result of converting
2713 the number of bytes in binary to two
2714 ascii characters, high digit first. An
2715 End of File record contains two ascii
2716 zeros in this field.
2718 Load Address Field - This field consists of the four ascii
2719 characters which result from converting
2720 the the binary value of the address in
2721 which to begin loading this record. The
2722 order is as follows:
2724 High digit of high byte of address.
2725 Low digit of high byte of address.
2726 High digit of low byte of address.
2727 Low digit of low byte of address.
2729 In an End of File record this field con-
2730 sists of either four ascii zeros or the
2731 program entry address. Currently the
2732 entry address option is not supported.
2734 Record Type Field - This field identifies the record type,
2735 which is either 0 for data records or 1
2736 for an End of File record. It consists
2737 of two ascii characters, with the high
2738 digit of the record type first, followed
2739 by the low digit of the record type.
2741 Data Field - This field consists of the actual data,
2742 converted to two ascii characters, high
2743 digit first. There are no data bytes in
2744 the End of File record.
2746 Checksum Field - The checksum field is the 8 bit binary
2747 sum of the record length field, the load
2748 address field, the record type field,
2749 and the data field. This sum is then
2750 negated (2's complement) and converted
2751 to two ascii characters, high digit
2755 THE LINKER Page 2-12
2756 MOTOROLA S1-S9 OUTPUT FORMAT
2759 2.8 MOTORLA S1-S9 OUTPUT FORMAT
2761 Record Type Field - This field signifies the start of a
2762 record and identifies the the record
2765 Ascii S1 - Data Record
2766 Ascii S9 - End of File Record
2768 Record Length Field - This field specifies the record length
2769 which includes the address, data, and
2770 checksum fields. The 8 bit record
2771 length value is converted to two ascii
2772 characters, high digit first.
2774 Load Address Field - This field consists of the four ascii
2775 characters which result from converting
2776 the the binary value of the address in
2777 which to begin loading this record. The
2778 order is as follows:
2780 High digit of high byte of address.
2781 Low digit of high byte of address.
2782 High digit of low byte of address.
2783 Low digit of low byte of address.
2785 In an End of File record this field con-
2786 sists of either four ascii zeros or the
2787 program entry address. Currently the
2788 entry address option is not supported.
2790 Data Field - This field consists of the actual data,
2791 converted to two ascii characters, high
2792 digit first. There are no data bytes in
2793 the End of File record.
2795 Checksum Field - The checksum field is the 8 bit binary
2796 sum of the record length field, the load
2797 address field, and the data field. This
2798 sum is then complemented (1's comple-
2799 ment) and converted to two ascii
2800 characters, high digit first.
2817 BUILDING ASXXXX AND ASLINK
2822 The assemblers and linker have been successfully compiled us-
2823 ing the DECUS C (PDP-11) compiler (patch level 9) with
2824 RT-11/TSX+, Eyring Research Institute, Inc. PDOS (680x0) C
2825 V5.4b compiler, and Symantec C/C++ V6.1/V7.0.
2827 The device specific header file (i.e. m6800.h, m6801.h,
2828 etc.) contains the DECUS C 'BUILD' directives for generating a
2829 command file to compile, assemble, and link the necessary files
2830 to prepare an executable image for a particular assembler.
2833 3.1 BUILDING AN ASSEMBLER
2836 The building of a typical assembler (6809 for example) re-
2837 quires the following files:
2855 The first five files are the 6809 processor dependent sec-
2856 tions which contain the following:
2861 BUILDING ASXXXX AND ASLINK PAGE 3-2
2862 BUILDING AN ASSEMBLER
2865 1. m6809.h - header file containing the machine specific
2866 definitions of constants, variables, structures, and
2869 2. m09ext - device description, byte order, and file ex-
2872 3. m09pst - a table of the assembler general directives,
2873 special device directives, and assembler mnemonics with
2874 associated operation codes
2876 4. m09mch / m09adr - machine specific code for processing
2877 the device mnemonics, addressing modes, and special
2881 The remaining nine files provide the device independent sec-
2882 tions which handle the details of file input/output, symbol
2883 table generation, program/data areas, expression analysis, and
2884 assembler directive processing.
2886 The assembler defaults to the not case sensitive mode. This
2887 may be altered by changing the case sensitivity flag in asm.h to
2890 * Case Sensitivity Flag
2892 #define CASE_SENSITIVE 1
2894 The assemblers and linker should be compiled with the same
2895 case sensitivity option.
2901 The building of the linker requires the following files:
2919 BUILDING ASXXXX AND ASLINK PAGE 3-3
2923 The linker defaults to the not case sensitive mode. This may
2924 be altered by changing the case sensitivity flag in aslink.h to
2927 * Case Sensitivity Flag
2929 #define CASE_SENSITIVE 1
2931 The linker and assemblers should be compiled with the same
2932 case sensitivity option.
2955 A.1 6800 REGISTER SET
2957 The following is a list of the 6800 registers used by AS6800:
2959 a,b - 8-bit accumulators
2963 A.2 6800 INSTRUCTION SET
2966 The following tables list all 6800/6802/6808 mnemonics recog-
2967 nized by the AS6800 assembler. The designation [] refers to a
2968 required addressing mode argument. The following list specifies
2969 the format for each addressing mode supported by AS6800:
2971 #data immediate data
2974 *dir direct page addressing
2975 (see .setdp directive)
2978 ,x register indirect addressing
2981 offset,x register indirect addressing
2984 ext extended addressing
2988 The terms data, dir, offset, ext, and label may all be expres-
2993 AS6800 ASSEMBLER PAGE A-2
2994 6800 INSTRUCTION SET
2997 Note that not all addressing modes are valid with every in-
2998 struction, refer to the 6800 technical data for valid modes.
3001 A.2.1 Inherent Instructions
3023 A.2.2 Branch Instructions
3036 AS6800 ASSEMBLER PAGE A-3
3037 6800 INSTRUCTION SET
3040 A.2.3 Single Operand Instructions
3091 AS6800 ASSEMBLER PAGE A-4
3092 6800 INSTRUCTION SET
3095 A.2.4 Double Operand Instructions
3131 A.2.5 Jump and Jump to Subroutine Instructions
3138 AS6800 ASSEMBLER PAGE A-5
3139 6800 INSTRUCTION SET
3142 A.2.6 Long Register Instructions
3169 B.1 .hd6303 DIRECTIVE
3175 The .hd6303 directive enables processing of the HD6303 specific
3176 mnemonics not included in the 6801 instruction set. HD6303
3177 mnemonics encountered without the .hd6303 directive will be
3178 flagged with an 'o' error.
3181 B.2 6801 REGISTER SET
3183 The following is a list of the 6801 registers used by AS6801:
3185 a,b - 8-bit accumulators
3186 d - 16-bit accumulator <a:b>
3190 B.3 6801 INSTRUCTION SET
3193 The following tables list all 6801/6303 mnemonics recognized
3194 by the AS6801 assembler. The designation [] refers to a re-
3195 quired addressing mode argument. The following list specifies
3196 the format for each addressing mode supported by AS6801:
3198 #data immediate data
3201 *dir direct page addressing
3202 (see .setdp directive)
3207 AS6801 ASSEMBLER PAGE B-2
3208 6801 INSTRUCTION SET
3211 ,x register indirect addressing
3214 offset,x register indirect addressing
3217 ext extended addressing
3221 The terms data, dir, offset, ext, and label may all be expres-
3224 Note that not all addressing modes are valid with every in-
3225 struction, refer to the 6801/6303 technical data for valid
3229 B.3.1 Inherent Instructions
3247 B.3.2 Branch Instructions
3261 AS6801 ASSEMBLER PAGE B-3
3262 6801 INSTRUCTION SET
3265 B.3.3 Single Operand Instructions
3319 AS6801 ASSEMBLER PAGE B-4
3320 6801 INSTRUCTION SET
3332 B.3.4 Double Operand Instructions
3337 adda [] addb [] addd []
3338 add a [] add b [] add d []
3361 suba [] subb [] subd []
3362 sub a [] sub b [] sub d []
3367 AS6801 ASSEMBLER PAGE B-5
3368 6801 INSTRUCTION SET
3371 B.3.5 Jump and Jump to Subroutine Instructions
3376 B.3.6 Long Register Instructions
3384 B.3.7 6303 Specific Instructions
3386 aim #data, [] eim #data, []
3387 oim #data, [] tim #data, []
3411 Requires the .setdp directive to specify the ram area.
3414 C.1 6804 REGISTER SET
3416 The following is a list of the 6804 registers used by AS6804:
3418 x,y - index registers
3421 C.2 6804 INSTRUCTION SET
3424 The following tables list all 6804 mnemonics recognized by
3425 the AS6804 assembler. The designation [] refers to a required
3426 addressing mode argument. The following list specifies the
3427 format for each addressing mode supported by AS6804:
3429 #data immediate data
3432 ,x register indirect addressing
3434 dir direct addressing
3435 (see .setdp directive)
3438 ext extended addressing
3442 The terms data, dir, and ext may be expressions. The label for
3443 the short branchs beq, bne, bcc, and bcs must not be external.
3445 Note that not all addressing modes are valid with every in-
3446 struction, refer to the 6804 technical data for valid modes.
3449 AS6804 ASSEMBLER PAGE C-2
3450 6804 INSTRUCTION SET
3453 C.2.1 Inherent Instructions
3464 C.2.2 Branch Instructions
3470 C.2.3 Single Operand Instructions
3482 C.2.4 Jump and Jump to Subroutine Instructions
3488 C.2.5 Bit Test Instructions
3490 brclr #data,[],label
3491 brset #data,[],label
3499 AS6804 ASSEMBLER PAGE C-3
3500 6804 INSTRUCTION SET
3503 C.2.6 Load Immediate data Instruction
3508 C.2.7 6804 Derived Instructions
3555 D.1 6805 REGISTER SET
3557 The following is a list of the 6805 registers used by AS6805:
3559 a - 8-bit accumulator
3563 D.2 6805 INSTRUCTION SET
3566 The following tables list all 6805 mnemonics recognized by
3567 the AS6805 assembler. The designation [] refers to a required
3568 addressing mode argument. The following list specifies the
3569 format for each addressing mode supported by AS6805:
3571 #data immediate data
3574 *dir direct page addressing
3575 (see .setdp directive)
3578 ,x register indirect addressing
3581 offset,x register indirect addressing
3582 0 <= offset <= 255 --- byte mode
3583 256 <= offset <= 65535 --- word mode
3584 (an externally defined offset uses the
3587 ext extended addressing
3593 AS6805 ASSEMBLER PAGE D-2
3594 6805 INSTRUCTION SET
3597 The terms data, dir, offset, and ext may all be expressions.
3599 Note that not all addressing modes are valid with every in-
3600 struction, refer to the 6805 technical data for valid modes.
3603 D.2.1 Control Instructions
3614 D.2.2 Bit Manipulation Instructions
3616 brset #data,*dir,label
3617 brclr #data,*dir,label
3623 D.2.3 Branch Instructions
3629 bhcc label bhcs label
3636 AS6805 ASSEMBLER PAGE D-3
3637 6805 INSTRUCTION SET
3640 D.2.4 Read-Modify-Write Instructions
3676 D.2.5 Register\Memory Instructions
3687 AS6805 ASSEMBLER PAGE D-4
3688 6805 INSTRUCTION SET
3691 D.2.6 Jump and Jump to Subroutine Instructions
3716 E.1 68HC08 REGISTER SET
3718 The following is a list of the 68HC08 registers used by
3721 a - 8-bit accumulator
3722 x - index register <H:X>
3726 E.2 68HC08 INSTRUCTION SET
3729 The following tables list all 68HC08 mnemonics recognized by
3730 the AS68HC08 assembler. The designation [] refers to a required
3731 addressing mode argument. The following list specifies the
3732 format for each addressing mode supported by AS68HC08:
3734 #data immediate data
3737 *dir direct page addressing
3738 (see .setdp directive)
3741 ,x register indexed addressing
3744 offset,x register indexed addressing
3745 0 <= offset <= 255 --- byte mode
3746 256 <= offset <= 65535 --- word mode
3747 (an externally defined offset uses the
3750 ,x+ register indexed addressing
3751 zero offset with post increment
3754 AS68HC08 ASSEMBLER PAGE E-2
3755 68HC08 INSTRUCTION SET
3759 offset,x+ register indexed addressing
3760 unsigned byte offset with post increment
3762 offset,s stack pointer indexed addressing
3763 0 <= offset <= 255 --- byte mode
3764 256 <= offset <= 65535 --- word mode
3765 (an externally defined offset uses the
3768 ext extended addressing
3772 The terms data, dir, offset, and ext may all be expressions.
3774 Note that not all addressing modes are valid with every in-
3775 struction, refer to the 68HC08 technical data for valid modes.
3778 E.2.1 Control Instructions
3789 E.2.2 Bit Manipulation Instructions
3791 brset #data,*dir,label
3792 brclr #data,*dir,label
3798 AS68HC08 ASSEMBLER PAGE E-3
3799 68HC08 INSTRUCTION SET
3802 E.2.3 Branch Instructions
3808 bhcc label bhcs label
3817 E.2.4 Complex Branch Instructions
3827 AS68HC08 ASSEMBLER PAGE E-4
3828 68HC08 INSTRUCTION SET
3831 E.2.5 Read-Modify-Write Instructions
3874 AS68HC08 ASSEMBLER PAGE E-5
3875 68HC08 INSTRUCTION SET
3878 E.2.6 Register\Memory Instructions
3889 E.2.7 Double Operand Move Instruction
3894 E.2.8 16-Bit <H:X> Index Register Instructions
3901 E.2.9 Jump and Jump to Subroutine Instructions
3926 F.1 6809 REGISTER SET
3928 The following is a list of the 6809 registers used by AS6809:
3930 a,b - 8-bit accumulators
3931 d - 16-bit accumulator <a:b>
3932 x,y - index registers
3933 s,u - stack pointers
3934 pc - program counter
3939 F.2 6809 INSTRUCTION SET
3942 The following tables list all 6809 mnemonics recognized by
3943 the AS6809 assembler. The designation [] refers to a required
3944 addressing mode argument. The following list specifies the
3945 format for each addressing mode supported by AS6809:
3947 #data immediate data
3950 *dir direct page addressing
3951 (see .setdp directive)
3957 cc,a,b,d,dp,x,y,s,u,pc
3959 ,-x ,--x register indexed
3964 AS6809 ASSEMBLER PAGE F-2
3965 6809 INSTRUCTION SET
3968 ,x+ ,x++ register indexed
3971 ,x register indexed addressing
3974 offset,x register indexed addressing
3975 -16 <= offset <= 15 --- 5-bit
3976 -128 <= offset <= -17 --- 8-bit
3977 16 <= offset <= 127 --- 8-bit
3978 -32768 <= offset <= -129 --- 16-bit
3979 128 <= offset <= 32767 --- 16-bit
3980 (external definition of offset
3983 a,x accumulator offset indexed addressing
3985 ext extended addressing
3987 ext,pc pc addressing ( pc <- pc + ext )
3989 ext,pcr pc relative addressing
3991 [,--x] register indexed indirect
3994 [,x++] register indexed indirect
3997 [,x] register indexed indirect addressing
4000 [offset,x] register indexed indirect addressing
4001 -128 <= offset <= 127 --- 8-bit
4002 -32768 <= offset <= -129 --- 16-bit
4003 128 <= offset <= 32767 --- 16-bit
4004 (external definition of offset
4007 [a,x] accumulator offset indexed
4010 [ext] extended indirect addressing
4012 [ext,pc] pc indirect addressing
4013 ( [pc <- pc + ext] )
4015 [ext,pcr] pc relative indirect addressing
4017 The terms data, dir, label, offset, and ext may all be expres-
4022 AS6809 ASSEMBLER PAGE F-3
4023 6809 INSTRUCTION SET
4026 Note that not all addressing modes are valid with every in-
4027 struction, refer to the 6809 technical data for valid modes.
4030 F.2.1 Inherent Instructions
4040 F.2.2 Short Branch Instructions
4045 bhis label bhs label
4047 blos label bls label
4055 F.2.3 Long Branch Instructions
4057 lbcc label lbcs label
4058 lbeq label lbge label
4059 lbgt label lbhi label
4060 lbhis label lbhs label
4061 lble label lblo label
4062 lblos label lbls label
4063 lblt label lbmi label
4064 lbne label lbpl label
4065 lbra label lbrn label
4066 lbvc label lbvs label
4070 AS6809 ASSEMBLER PAGE F-4
4071 6809 INSTRUCTION SET
4074 F.2.4 Single Operand Instructions
4113 AS6809 ASSEMBLER PAGE F-5
4114 6809 INSTRUCTION SET
4117 F.2.5 Double Operand Instructions
4142 F.2.6 D-register Instructions
4149 F.2.7 Index/Stack Register Instructions
4167 AS6809 ASSEMBLER PAGE F-6
4168 6809 INSTRUCTION SET
4171 F.2.8 Jump and Jump to Subroutine Instructions
4176 F.2.9 Register - Register Instructions
4181 F.2.10 Condition Code Register Instructions
4183 andcc #data orcc #data
4187 F.2.11 6800 Compatibility Instructions
4227 G.1 6811 REGISTER SET
4229 The following is a list of the 6811 registers used by AS6811:
4231 a,b - 8-bit accumulators
4232 d - 16-bit accumulator <a:b>
4233 x,y - index registers
4236 G.2 6811 INSTRUCTION SET
4239 The following tables list all 6811 mnemonics recognized by
4240 the AS6811 assembler. The designation [] refers to a required
4241 addressing mode argument. The following list specifies the
4242 format for each addressing mode supported by AS6811:
4244 #data immediate data
4247 *dir direct page addressing
4248 (see .setdp directive)
4251 ,x register indirect addressing
4254 offset,x register indirect addressing
4257 ext extended addressing
4261 The terms data, dir, offset, and ext may all be expressions.
4265 AS6811 ASSEMBLER PAGE G-2
4266 6811 INSTRUCTION SET
4269 Note that not all addressing modes are valid with every in-
4270 struction, refer to the 6811 technical data for valid modes.
4273 G.2.1 Inherent Instructions
4305 G.2.2 Branch Instructions
4319 AS6811 ASSEMBLER PAGE G-3
4320 6811 INSTRUCTION SET
4323 G.2.3 Single Operand Instructions
4374 AS6811 ASSEMBLER PAGE G-4
4375 6811 INSTRUCTION SET
4378 G.2.4 Double Operand Instructions
4383 adda [] addb [] addd []
4384 add a [] add b [] add d []
4410 suba [] subb [] subd []
4411 sub a [] sub b [] sub d []
4414 G.2.5 Bit Manupulation Instructions
4419 brclr [],#data,label
4420 brset [],#data,label
4425 AS6811 ASSEMBLER PAGE G-5
4426 6811 INSTRUCTION SET
4429 G.2.6 Jump and Jump to Subroutine Instructions
4434 G.2.7 Long Register Instructions
4465 H.1 6816 REGISTER SET
4467 The following is a list of the 6816 registers used by AS6816:
4469 a,b - 8-bit accumulators
4470 d - 16-bit accumulator <a:b>
4471 e - 16-bit accumulator
4472 x,y,z - index registers
4473 k - address extension register
4475 ccr - condition code
4478 H.2 6816 INSTRUCTION SET
4481 The following tables list all 6816 mnemonics recognized by
4482 the AS6816 assembler. The designation [] refers to a required
4483 addressing mode argument. The following list specifies the
4484 format for each addressing mode supported by AS6816:
4486 #data immediate data
4489 #xo,#yo local immediate data (mac / rmac)
4496 ,x zero offset register indexed addressing
4500 offset,x register indexed addressing
4503 AS6816 ASSEMBLER PAGE H-2
4504 6816 INSTRUCTION SET
4507 0 <= offset <= 255 --- 8-bit
4508 -32768 <= offset <= -1 --- 16-bit
4509 256 <= offset <= 32767 --- 16-bit
4510 (external definition of offset
4513 offset,x8 unsigned 8-bit offset indexed addressing
4514 offset,x16 signed 16-bit offset indexed addressing
4516 e,x accumulator offset indexed addressing
4518 ext extended addressing
4520 bank 64K bank number (jmp / jsr)
4522 The terms data, label, offset, bank, and ext may all be expres-
4525 Note that not all addressing modes are valid with every in-
4526 struction, refer to the 6816 technical data for valid modes.
4529 H.2.1 Inherent Instructions
4535 ediv edivs emul emuls
4536 fdiv fmuls idiv ldhi
4538 pshb pshmac pula pulb
4555 AS6816 ASSEMBLER PAGE H-3
4556 6816 INSTRUCTION SET
4559 H.2.2 Push/Pull Multiple Register Instructions
4561 pshm r,... pulm r,...
4564 H.2.3 Short Branch Instructions
4569 bhis label bhs label
4571 blos label bls label
4579 H.2.4 Long Branch Instructions
4581 lbcc label lbcs label
4582 lbeq label lbge label
4583 lbgt label lbhi label
4584 lbhis label lbhs label
4585 lble label lblo label
4586 lblos label lbls label
4587 lblt label lbmi label
4588 lbne label lbpl label
4589 lbra label lbrn label
4590 lbvc label lbvs label
4594 H.2.5 Bit Manipulation Instructions
4599 brclr [],#data,label
4600 brset [],#data,label
4603 AS6816 ASSEMBLER PAGE H-4
4604 6816 INSTRUCTION SET
4607 H.2.6 Single Operand Instructions
4660 AS6816 ASSEMBLER PAGE H-5
4661 6816 INSTRUCTION SET
4664 H.2.7 Double Operand Instructions
4699 H.2.8 Index/Stack Register Instructions
4711 AS6816 ASSEMBLER PAGE H-6
4712 6816 INSTRUCTION SET
4715 H.2.9 Jump and Jump to Subroutine Instructions
4717 jmp bank,[] jsr bank,[]
4720 H.2.10 Condition Code Register Instructions
4722 andp #data orp #data
4725 H.2.11 Multiply and Accumulate Instructions
4727 mac #data rmac #data
4728 mac #xo,#yo rmac #xo,#yo
4751 I.1 H8/3XX REGISTER SET
4753 The following is a list of the H8 registers used by ASH8:
4755 r0 - r7,sp 16-bit accumulators
4756 r0L - r7L,spL 8-bit accumulators
4757 r0H - r7H,spH 8-bit accumulators
4758 spL,spH,sp stack pointers
4762 I.2 H8/3XX INSTRUCTION SET
4765 The following tables list all H8/3xx mnemonics recognized by
4766 the ASH8 assembler. The designation [] refers to a required ad-
4767 dressing mode argument. The following list specifies the format
4768 for each addressing mode supported by ASH8:
4770 #xx:3 immediate data (3 bit)
4771 #xx:8 immediate data (8 bit)
4772 #xx:16 immediate data (16 bit)
4774 *dir direct page addressing
4775 (see .setdp directive)
4781 rn registers (16 bit)
4784 rnB registers (8 bit)
4785 r0H-r7H,r0L-r7L,spH,spL
4789 ASH8 ASSEMBLER PAGE I-2
4790 H8/3XX INSTRUCTION SET
4793 ccr condition code register
4795 @rn register indirect
4797 @-rn register indirect (auto pre-decrement)
4799 @rn+ register indirect (auto post-increment)
4801 @[offset,rn] register indirect, 16-bit displacement
4803 @@offset memory indirect, (8-bit address)
4805 ext extended addressing (16-bit)
4807 The terms data, dir, label, offset, and ext may all be expres-
4810 Note that not all addressing modes are valid with every in-
4811 struction, refer to the H8/3xx technical data for valid modes.
4814 I.2.1 Inherent Instructions
4823 I.2.2 Branch Instructions
4828 bhi label bhis label
4830 blo label blos label
4839 ASH8 ASSEMBLER PAGE I-3
4840 H8/3XX INSTRUCTION SET
4843 I.2.3 Single Operand Instructions
4872 rotxl.b rnB rotxr.b rnB
4874 rotl.b rnB rotr.b rnB
4876 shal.b rnB shar.b rnB
4878 shll.b rnB shlr.b rnB
4883 ASH8 ASSEMBLER PAGE I-4
4884 H8/3XX INSTRUCTION SET
4887 I.2.4 Double Operand Instructions
4891 add rnB,rnB add #xx:8,rnB
4894 cmp rnB,rnB cmp #xx:8,rnB
4900 addx rnB,rnB addx #xx:8,rnB
4902 and rnB,rnB and #xx:8,rnB
4905 or rnB,rnB or #xx:8,rnB
4908 subx rnB,rnB subx #xx:8,rnB
4910 xor rnB,rnB xor #xx:8,rnB
4916 add.b rnB,rnB add.b #xx:8,rnB
4919 cmp.b rnB,rnB cmp.b #xx:8,rnB
4925 addx.b rnB,rnB addx.b #xx:8,rnB
4927 and.b rnB,rnB and.b #xx:8,rnB
4930 or.b rnB,rnB or.b #xx:8,rnB
4933 subx.b rnB,rnB subx.b #xx:8,rnB
4935 xor.b rnB,rnB xor.b #xx:8,rnB
4939 ASH8 ASSEMBLER PAGE I-5
4940 H8/3XX INSTRUCTION SET
4943 I.2.5 Mov Instructions
4947 mov rnB,rnB mov rn,rn
4948 mov #xx:8,rnB mov #xx:16,rn
4949 mov @rn,rnB mov @rn,rn
4950 mov @[offset,rn],rnB mov @[offset,rn],rn
4951 mov @rn+,rnB mov @rn+,rn
4956 mov @label,rnB mov @label,rn
4957 mov label,rnB mov label,rn
4958 mov rnB,@rn mov rn,@rn
4959 mov rnB,@[offset,rn] mov rn,@[offset,rn]
4960 mov rnB,@-rn mov rn,@-rn
4965 mov rnB,@label mov rn,@label
4966 mov rnB,label mov rn,label
4971 mov.b rnB,rnB mov.w rn,rn
4972 mov.b #xx:8,rnB mov.w #xx:16,rn
4973 mov.b @rn,rnB mov.w @rn,rn
4974 mov.b @[offset,rn],rnB mov.w @[offset,rn],rn
4975 mov.b @rn+,rnB mov.w @rn+,rn
4980 mov.b @label,rnB mov.w @label,rn
4981 mov.b label,rnB mov.w label,rn
4982 mov.b rnB,@rn mov.w rn,@rn
4983 mov.b rnB,@[offset,rn] mov.w rn,@[offset,rn]
4984 mov.b rnB,@-rn mov.w rn,@-rn
4989 mov.b rnB,@label mov.w rn,@label
4990 mov.b rnB,label mov.w rn,label
4993 ASH8 ASSEMBLER PAGE I-6
4994 H8/3XX INSTRUCTION SET
4997 I.2.6 Bit Manipulation Instructions
4999 bld #xx:3,rnB bld #xx:3,@rn
5000 bld #xx:3,@dir bld #xx:3,dir
5001 bld #xx:3,*@dir bld #xx:3,*dir
5003 bild #xx:3,rnB bild #xx:3,@rn
5004 bild #xx:3,@dir bild #xx:3,dir
5005 bild #xx:3,*@dir bild #xx:3,*dir
5007 bst #xx:3,rnB bst #xx:3,@rn
5008 bst #xx:3,@dir bst #xx:3,dir
5009 bst #xx:3,*@dir bst #xx:3,*dir
5011 bist #xx:3,rnB bist #xx:3,@rn
5012 bist #xx:3,@dir bist #xx:3,dir
5013 bist #xx:3,*@dir bist #xx:3,*dir
5015 band #xx:3,rnB band #xx:3,@rn
5016 band #xx:3,@dir band #xx:3,dir
5017 band #xx:3,*@dir band #xx:3,*dir
5019 biand #xx:3,rnB biand #xx:3,@rn
5020 biand #xx:3,@dir biand #xx:3,dir
5021 biand #xx:3,*@dir biand #xx:3,*dir
5023 bor #xx:3,rnB bor #xx:3,@rn
5024 bor #xx:3,@dir bor #xx:3,dir
5025 bor #xx:3,*@dir bor #xx:3,*dir
5027 bior #xx:3,rnB bior #xx:3,@rn
5028 bior #xx:3,@dir bior #xx:3,dir
5029 bior #xx:3,*@dir bior #xx:3,*dir
5031 bxor #xx:3,rnB bxor #xx:3,@rn
5032 bxor #xx:3,@dir bxor #xx:3,dir
5033 bxor #xx:3,*@dir bxor #xx:3,*dir
5035 bixor #xx:3,rnB bixor #xx:3,@rn
5036 bixor #xx:3,@dir bixor #xx:3,dir
5037 bixor #xx:3,*@dir bixor #xx:3,*dir
5040 ASH8 ASSEMBLER PAGE I-7
5041 H8/3XX INSTRUCTION SET
5044 I.2.7 Extended Bit Manipulation Instructions
5046 bset #xx:3,rnB bset #xx:3,@rn
5047 bset #xx:3,@dir bset #xx:3,dir
5048 bset #xx:3,*@dir bset #xx:3,*dir
5049 bset rnB,rnB bset rnB,@rn
5050 bset rnB,@dir bset rnB,dir
5051 bset rnB,*@dir bset rnB,*dir
5053 bclr #xx:3,rnB bclr #xx:3,@rn
5054 bclr #xx:3,@dir bclr #xx:3,dir
5055 bclr #xx:3,*@dir bclr #xx:3,*dir
5056 bclr rnB,rnB bclr rnB,@rn
5057 bclr rnB,@dir bclr rnB,dir
5058 bclr rnB,*@dir bclr rnB,*dir
5060 bnot #xx:3,rnB bnot #xx:3,@rn
5061 bnot #xx:3,@dir bnot #xx:3,dir
5062 bnot #xx:3,*@dir bnot #xx:3,*dir
5063 bnot rnB,rnB bnot rnB,@rn
5064 bnot rnB,@dir bnot rnB,dir
5065 bnot rnB,*@dir bnot rnB,*dir
5067 btst #xx:3,rnB btst #xx:3,@rn
5068 btst #xx:3,@dir btst #xx:3,dir
5069 btst #xx:3,*@dir btst #xx:3,*dir
5070 btst rnB,rnB btst rnB,@rn
5071 btst rnB,@dir btst rnB,dir
5072 btst rnB,*@dir btst rnB,*dir
5075 I.2.8 Condition Code Instructions
5077 andc #xx:8,ccr andc #xx:8
5078 and #xx:8,ccr and.b #xx:8,ccr
5080 ldc #xx:8,ccr ldc #xx:8
5083 orc #xx:8,ccr orc #xx:8
5084 or #xx:8,ccr or.b #xx:8,ccr
5086 xorc #xx:8,ccr xorc #xx:8
5087 xor #xx:8,ccr xor.b #xx:8,ccr
5092 ASH8 ASSEMBLER PAGE I-8
5093 H8/3XX INSTRUCTION SET
5096 I.2.9 Other Instructions
5098 divxu rnB,rn divxu.b rnB,rn
5100 mulxu rnB,rn mulxu.b rnB,rn
5102 movfpe @label,rnB movfpe label,rnB
5103 movfpe.b @label,rnB movfpe.b label,rnB
5105 movtpe @label,rnB movtpe label,rnB
5106 movtpe.b @label,rnB movtpe.b label,rnB
5109 I.2.10 Jump and Jump to Subroutine Instructions
5112 jmp @label jmp label
5115 jsr @label jsr label
5138 J.1 8085 REGISTER SET
5140 The following is a list of the 8080/8085 registers used by
5143 a,b,c,d,e,h,l - 8-bit accumulators
5144 m - memory through (hl)
5149 J.2 8085 INSTRUCTION SET
5152 The following tables list all 8080/8085 mnemonics recognized
5153 by the AS8085 assembler. The following list specifies the
5154 format for each addressing mode supported by AS8085:
5156 #data immediate data
5159 r,r1,r2 register or register pair
5163 m memory address using (hl)
5165 addr direct memory addressing
5167 label call or jump label
5169 The terms data, m, addr, and label may be expressions.
5171 Note that not all addressing modes are valid with every in-
5172 struction, refer to the 8080/8085 technical data for valid
5176 AS8085 ASSEMBLER PAGE J-2
5177 8085 INSTRUCTION SET
5180 J.2.1 Inherent Instructions
5194 J.2.2 Register/Memory/Immediate Instructions
5196 adc r adc m aci #data
5197 add r add m adi #data
5198 ana r ana m ani #data
5199 cmp r cmp m cpi #data
5200 ora r ora m ori #data
5201 sbb r sbb m sbi #data
5202 sub r sub m sui #data
5203 xra r xra m xri #data
5206 J.2.3 Call and Return Instructions
5219 J.2.4 Jump Instructions
5232 AS8085 ASSEMBLER PAGE J-3
5233 8085 INSTRUCTION SET
5236 J.2.5 Input/Output/Reset Instructions
5243 J.2.6 Move Instructions
5253 J.2.7 Other Instructions
5295 The .hd64 directive enables processing of the HD64180 specific
5296 mnemonics not included in the Z80 instruction set. HD64180
5297 mnemonics encountered without the .hd64 directive will be
5298 flagged with an 'o' error.
5301 K.2 Z80 REGISTER SET AND CONDITIONS
5304 The following is a complete list of register designations and
5305 condition mnemonics:
5307 byte registers - a,b,c,d,e,h,l,i,r
5308 register pairs - af,af',bc,de,hl
5309 word registers - pc,sp,ix,iy
5313 NC - carry bit clear
5323 ASZ80 ASSEMBLER PAGE K-2
5327 K.3 Z80 INSTRUCTION SET
5330 The following tables list all Z80/HD64180 mnemonics recog-
5331 nized by the ASZ80 assembler. The designation [] refers to a
5332 required addressing mode argument. The following list specifies
5333 the format for each addressing mode supported by ASZ80:
5335 #data immediate data
5346 (hl) implied addressing or
5347 register indirect addressing
5349 (label) direct addressing
5351 offset(ix) indexed addressing with
5354 label call/jmp/jr label
5356 The terms data, dir, offset, and ext may all be expressions.
5357 The terms dir and offset are not allowed to be external refer-
5360 Note that not all addressing modes are valid with every in-
5361 struction, refer to the Z80/HD64180 technical data for valid
5365 ASZ80 ASSEMBLER PAGE K-3
5369 K.3.1 Inherent Instructions
5384 K.3.2 Implicit Operand Instructions
5405 ASZ80 ASSEMBLER PAGE K-4
5409 K.3.3 Load Instruction
5414 ld (label),a ld a,(label)
5415 ld (label),rp ld rp,(label)
5419 ld sp,iy ld rp,#data
5425 K.3.4 Call/Return Instructions
5429 call NC,label ret NC
5430 call NZ,label ret NZ
5432 call PE,label ret PE
5433 call PO,label ret PO
5438 K.3.5 Jump and Jump to Subroutine Instructions
5440 jp C,label jp M,label
5441 jp NC,label jp NZ,label
5442 jp P,label jp PE,label
5443 jp PO,label jp Z,label
5450 jr C,label jr NC,label
5451 jr NZ,label jr Z,label
5455 ASZ80 ASSEMBLER PAGE K-5
5459 K.3.6 Bit Manipulation Instructions
5466 K.3.7 Interrupt Mode and Reset Instructions
5474 K.3.8 Input and Output Instructions
5480 out (n),a out (c),rg
5485 K.3.9 Register Pair Instructions
5492 ex (sp),hl ex (sp),ix
5500 ASZ80 ASSEMBLER PAGE K-6
5504 K.3.10 HD64180 Specific Instructions
5544 Thanks to Marko Makela for his contribution of the AS6500
5551 Internet: Marko.Makela@Helsinki.Fi
5552 EARN/BitNet: msmakela@finuh
5554 Several additions and modifications were made to his code to
5555 support the following families of 6500 processors:
5557 (1) 650X and 651X processor family
5558 (2) 65F11 and 65F12 processor family
5559 (3) 65C00/21 and 65C29 processor family
5560 (4) 65C02, 65C102, and 65C112 processor family
5562 The instruction syntax of this cross assembler contains two
5563 peculiarities: (1) the addressing indirection is denoted by the
5564 square brackets [] and (2) the `bbrx' and `bbsx' instructions
5565 are written `bbr0 memory,label'.
5570 AS6500 ASSEMBLER PAGE L-2
5574 L.2 6500 REGISTER SET
5576 The following is a list of the 6500 registers used by AS6500:
5578 a - 8-bit accumulator
5579 x,y - index registers
5582 L.3 6500 INSTRUCTION SET
5585 The following tables list all 6500 family mnemonics recog-
5586 nized by the AS6500 assembler. The designation [] refers to a
5587 required addressing mode argument. The following list specifies
5588 the format for each addressing mode supported by AS6500:
5590 #data immediate data
5593 *dir direct page addressing
5594 (see .setdp directive)
5597 offset,x indexed addressing
5598 offset,y indexed addressing
5599 address = (offset + (x or y))
5601 [offset,x] pre-indexed indirect addressing
5603 address = contents of location
5604 (offset + (x or y)) mod 256
5606 [offset],y post-indexed indirect addressing
5607 address = contents of location at offset
5608 plus the value of the y register
5610 [address] indirect addressing
5612 ext extended addressing
5616 address,label direct page memory location
5618 bbrx and bbsx instruction addressing
5620 The terms data, dir, offset, address, ext, and label may all be
5623 Note that not all addressing modes are valid with every in-
5624 struction, refer to the 65xx technical data for valid modes.
5627 AS6500 ASSEMBLER PAGE L-3
5628 6500 INSTRUCTION SET
5631 L.3.1 Processor Specific Directives
5634 The AS6500 cross assembler has four (4) processor specific
5635 assembler directives which define the target 65xx processor
5638 .r6500 Core 650X and 651X family (default)
5639 .r65f11 Core plus 65F11 and 65F12
5640 .r65c00 Core plus 65C00/21 and 65C29
5641 .r65c02 Core plus 65C02, 65C102, and 65C112
5644 L.3.2 65xx Core Inherent Instructions
5661 L.3.3 65xx Core Branch Instructions
5670 L.3.4 65xx Core Single Operand Instructions
5680 AS6500 ASSEMBLER PAGE L-4
5681 6500 INSTRUCTION SET
5684 L.3.5 65xx Core Double Operand Instructions
5697 L.3.6 65xx Core Jump and Jump to Subroutine Instructions
5702 L.3.7 65xx Core Miscellaneous X and Y Register Instructions
5712 AS6500 ASSEMBLER PAGE L-5
5713 6500 INSTRUCTION SET
5716 L.3.8 65F11 and 65F12 Specific Instructions
5718 bbr0 [],label bbr1 [],label
5719 bbr2 [],label bbr3 [],label
5720 bbr4 [],label bbr5 [],label
5721 bbr6 [],label bbr7 [],label
5723 bbs0 [],label bbs1 [],label
5724 bbs2 [],label bbs3 [],label
5725 bbs4 [],label bbs5 [],label
5726 bbs6 [],label bbs7 [],label
5739 L.3.9 65C00/21 and 65C29 Specific Instructions
5741 bbr0 [],label bbr1 [],label
5742 bbr2 [],label bbr3 [],label
5743 bbr4 [],label bbr5 [],label
5744 bbr6 [],label bbr7 [],label
5746 bbs0 [],label bbs1 [],label
5747 bbs2 [],label bbs3 [],label
5748 bbs4 [],label bbs5 [],label
5749 bbs6 [],label bbs7 [],label
5767 AS6500 ASSEMBLER PAGE L-6
5768 6500 INSTRUCTION SET
5771 L.3.10 65C02, 65C102, and 65C112 Specific Instructions
5773 bbr0 [],label bbr1 [],label
5774 bbr2 [],label bbr3 [],label
5775 bbr4 [],label bbr5 [],label
5776 bbr6 [],label bbr7 [],label
5778 bbs0 [],label bbs1 [],label
5779 bbs2 [],label bbs3 [],label
5780 bbs4 [],label bbs5 [],label
5781 bbs6 [],label bbs7 [],label
5802 Additional addressing modes for the following core instruc-
5803 tions are also available with the 65C02, 65C102, and 65C112 pro-
projects / debian / cc1111 / blob