2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 struct ao_fifo rx_fifo;
22 struct ao_fifo tx_fifo;
23 struct stm_usart *reg;
28 struct ao_stm_usart ao_stm_usart1;
31 struct ao_stm_usart ao_stm_usart2;
34 struct ao_stm_usart ao_stm_usart3;
42 while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
55 ao_usart_tx_start(struct ao_stm_usart *usart)
57 if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
59 usart->tx_started = 1;
60 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
65 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
72 if (sr & (1 << STM_USART_SR_RXNE)) {
73 char c = usart->reg->dr;
74 if (!ao_fifo_full(usart->rx_fifo))
75 ao_fifo_insert(usart->rx_fifo, c);
76 ao_wakeup(&usart->rx_fifo);
78 ao_wakeup(&ao_stdin_ready);
80 if (sr & (1 << STM_USART_SR_TC)) {
81 usart->tx_started = 0;
82 ao_usart_tx_start(usart);
83 ao_wakeup(&usart->tx_fifo);
88 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_STDIN); }
91 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, 0); }
94 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, 0); }
98 ao_usart_getchar(struct ao_stm_usart *usart)
102 while (ao_fifo_empty(usart->rx_fifo))
103 ao_sleep(&usart->rx_fifo);
104 ao_fifo_remove(usart->rx_fifo, c);
110 ao_usart_pollchar(struct ao_stm_usart *usart)
114 if (ao_fifo_empty(usart->rx_fifo)) {
116 return AO_READ_AGAIN;
118 ao_fifo_remove(usart->rx_fifo,c);
124 ao_usart_putchar(struct ao_stm_usart *usart, char c)
127 while (ao_fifo_full(usart->tx_fifo))
128 ao_sleep(&usart->tx_fifo);
129 ao_fifo_insert(usart->tx_fifo, c);
130 ao_usart_tx_start(usart);
135 ao_usart_drain(struct ao_stm_usart *usart)
138 while (!ao_fifo_empty(usart->tx_fifo))
139 ao_sleep(&usart->tx_fifo);
143 static const struct {
145 } ao_usart_speeds[] = {
146 [AO_SERIAL_SPEED_4800] = {
149 [AO_SERIAL_SPEED_9600] = {
152 [AO_SERIAL_SPEED_19200] = {
155 [AO_SERIAL_SPEED_57600] = {
161 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
163 if (speed > AO_SERIAL_SPEED_57600)
165 stm_usart1.brr = ao_usart_speeds[speed].brr;
169 ao_usart_init(struct ao_stm_usart *usart)
171 usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
172 (1 << STM_USART_CR1_UE) |
173 (0 << STM_USART_CR1_M) |
174 (0 << STM_USART_CR1_WAKE) |
175 (0 << STM_USART_CR1_PCE) |
176 (0 << STM_USART_CR1_PS) |
177 (0 << STM_USART_CR1_PEIE) |
178 (0 << STM_USART_CR1_TXEIE) |
179 (1 << STM_USART_CR1_TCIE) |
180 (1 << STM_USART_CR1_RXNEIE) |
181 (0 << STM_USART_CR1_IDLEIE) |
182 (1 << STM_USART_CR1_TE) |
183 (1 << STM_USART_CR1_RE) |
184 (0 << STM_USART_CR1_RWU) |
185 (0 << STM_USART_CR1_SBK));
187 usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
188 (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
189 (0 << STM_USART_CR2_CLKEN) |
190 (0 << STM_USART_CR2_CPOL) |
191 (0 << STM_USART_CR2_CPHA) |
192 (0 << STM_USART_CR2_LBCL) |
193 (0 << STM_USART_CR2_LBDIE) |
194 (0 << STM_USART_CR2_LBDL) |
195 (0 << STM_USART_CR2_ADD));
197 usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
198 (0 << STM_USART_CR3_CTSIE) |
199 (0 << STM_USART_CR3_CTSE) |
200 (0 << STM_USART_CR3_RTSE) |
201 (0 << STM_USART_CR3_DMAT) |
202 (0 << STM_USART_CR3_DMAR) |
203 (0 << STM_USART_CR3_SCEN) |
204 (0 << STM_USART_CR3_NACK) |
205 (0 << STM_USART_CR3_HDSEL) |
206 (0 << STM_USART_CR3_IRLP) |
207 (0 << STM_USART_CR3_IREN) |
208 (0 << STM_USART_CR3_EIE));
210 /* Pick a 9600 baud rate */
211 ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
224 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
226 stm_moder_set(&stm_gpioa, 9, STM_MODER_ALTERNATE);
227 stm_moder_set(&stm_gpioa, 10, STM_MODER_ALTERNATE);
228 stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
229 stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
232 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
234 ao_stm_usart1.reg = &stm_usart1;
236 stm_nvic_set_enable(STM_ISR_USART1_POS);
237 stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
239 ao_add_stdio(ao_serial_pollchar,
252 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
254 stm_moder_set(&stm_gpioa, 2, STM_MODER_ALTERNATE);
255 stm_moder_set(&stm_gpioa, 3, STM_MODER_ALTERNATE);
256 stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
257 stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
260 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
262 ao_stm_usart2.reg = &stm_usart2;
264 stm_nvic_set_enable(STM_ISR_USART2_POS);
265 stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
275 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
277 stm_moder_set(&stm_gpiob, 10, STM_MODER_ALTERNATE);
278 stm_moder_set(&stm_gpiob, 11, STM_MODER_ALTERNATE);
279 stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
280 stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
283 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
285 ao_stm_usart3.reg = &stm_usart3;
287 stm_nvic_set_enable(STM_ISR_USART3_POS);
288 stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
294 ao_serial_getchar(void)
296 return ao_usart_getchar(&ao_stm_usart1);
301 ao_serial_pollchar(void)
303 return ao_usart_pollchar(&ao_stm_usart1);
308 ao_serial_putchar(char c)
310 ao_usart_putchar(&ao_stm_usart1, c);
312 #endif /* HAS_SERIAL_1 */