Add test plan and test files
[hw/easymega] / Makefile
1 # name of project, also used for PCB file
2 PROJECT=easymega
3
4 # list of schematic files that make up this design
5 SCHEMATICS=easymega.sch
6
7 # number of PCB layers
8 LAYERS=4
9
10 # sides with silkscreen, can be none|top|bottom|both
11 SILK=both
12
13 include ../altusmetrum/pcb-rnd.mk
14
15 TEST_FILES=EasyMega-Test-Plan.pdf EasyMega-Test-Plan.doc easymega-v3.0-combined-1.9.18.dfu easymega-v3.0-combined-1.9.18.ihx
16
17 easymega-test.zip: $(TEST_FILES)
18         rm -f $@ && zip $@ $(TEST_FILES)