From 3f05f477c5b2b050fe10c45c4c7a1d62e0dd3a10 Mon Sep 17 00:00:00 2001 From: Bdale Garbee Date: Wed, 3 Nov 2010 12:21:04 -0600 Subject: [PATCH] bottom layer pulled back into new board boundary, silk delineation removed --- telenano.pcb | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/telenano.pcb b/telenano.pcb index 35c0600..11c4bbf 100644 --- a/telenano.pcb +++ b/telenano.pcb @@ -1,5 +1,5 @@ # release: pcb 20091103 -# date: Wed Nov 3 12:19:50 2010 +# date: Wed Nov 3 12:20:59 2010 # user: bdale (Bdale Garbee,KB0G) # host: rover @@ -838,7 +838,7 @@ Element["" "0402" "C28" "0.1uF" 104126 41993 1759 -7949 0 100 ""] ) -Element["" "SOT23-5" "U1" "TC2185-3.3" 63000 47300 -18400 -7300 0 89 ""] +Element["" "SOT23-5" "U1" "TC2185-3.3" 63000 47300 -1800 -6600 0 89 ""] ( Attribute("author" "DJ Delorie") Attribute("copyright" "2006 DJ Delorie") @@ -1435,7 +1435,7 @@ Layer(2 "bottom") ( Line[92500 1600 92500 4387 2500 2000 "clearline"] Line[92500 4387 92481 4406 2500 2000 "clearline"] - Line[31122 21277 31122 19416 1000 2000 ""] + Line[56500 29200 63700 36400 2500 2000 "clearline"] Line[78600 9700 78500 9800 1000 2000 "clearline"] Line[106400 36400 106400 36300 1000 2000 "clearline"] Line[106400 36300 113600 29100 1000 2000 "clearline"] @@ -1462,10 +1462,9 @@ Layer(2 "bottom") Line[78500 9800 78500 6800 2500 2000 "clearline"] Line[78500 6800 76100 4400 2500 2000 "clearline"] Line[56500 26600 56500 29200 2500 2000 "clearline"] - Line[56500 29200 63700 36400 2500 2000 "clearline"] Polygon("clearpoly") ( - [500 49500] [149500 49500] [149500 500] [500 500] + [50500 49500] [149500 49500] [149500 500] [50500 500] ) ) Layer(3 "silk") @@ -1477,7 +1476,6 @@ Layer(3 "silk") ) Layer(4 "silk") ( - Line[50000 200 50000 49800 600 1200 ""] ) NetList() ( -- 2.30.2