hw/telemini
2010-11-23 Bdale Garbeehide top silk again v0.1 fab-v0.1
2010-11-23 Bdale Garbeemake sure all silk elements are within board outline
2010-11-23 Bdale Garbeeadd outline layer, center ground plane polygon
2010-11-18 Bdale Garbeelose C9 as redundant on this tight layout
2010-11-18 Bdale Garbeeupdate to reflect footprint name change
2010-11-11 Bdale Garbeeadd targets for automating outputs
2010-11-11 Bdale Garbeeadd attributes
2010-11-11 Bdale Garbeemore copper shoving to reduce impedance in the pyro...
2010-11-11 Bdale Garbeecomponent move to improve bypass capacitor placement...
2010-11-11 Bdale Garbeefix reset circuit component values to match TeleMetrum...
2010-11-10 Bdale Garbeeno remaining DRC errors
2010-11-09 Bdale Garbeeroute complete, 16 DRC errors
2010-11-08 Bdale GarbeeThis is a TeleNano but with dual deployment .. calling...
2010-11-08 Bdale Garbeechange project name to TeleMini
2010-11-08 Bdale Garbeelose junk file accidentally included
2010-11-08 Bdale Garbeeinitial design import