From 2ee3b7610f8389a4e22055da216311568c3db5c7 Mon Sep 17 00:00:00 2001 From: Bdale Garbee Date: Thu, 18 Nov 2010 16:19:31 -0700 Subject: [PATCH] lose C9 as redundant on this tight layout --- telemini.pcb | 29 +++++++++------------------- telemini.sch | 53 ++++++++++++++++------------------------------------ 2 files changed, 25 insertions(+), 57 deletions(-) diff --git a/telemini.pcb b/telemini.pcb index 1816ee2..f8d402f 100644 --- a/telemini.pcb +++ b/telemini.pcb @@ -1,5 +1,5 @@ # release: pcb 20091103 -# date: Thu Nov 11 01:27:05 2010 +# date: Thu Nov 18 16:19:27 2010 # user: bdale (Bdale Garbee,KB0G) # host: rover @@ -13,7 +13,7 @@ Cursor[0 50000 0.000000] PolyArea[200000000.000000] Thermal[0.500000] DRC[600 1000 600 500 1500 700] -Flags("nameonpcb,clearnew,snappin,liveroute,hidenames") +Flags("nameonpcb,clearnew,liveroute,hidenames") Groups("1,c:2,s:3") Styles["Signal,1000,2900,1500,1000:Power,2500,6000,3500,1000:Fat,2500,6000,3500,1000:Skinny,600,2402,1181,600"] @@ -821,7 +821,7 @@ Via[29000 45500 2900 2000 0 1500 "" ""] Via[48800 30100 2900 2000 0 1500 "" ""] Via[121900 11700 2900 2000 0 1500 "" "thermal(1S)"] Via[109000 40100 2900 2000 0 1500 "" "thermal(1S)"] -Via[114800 2000 2900 2000 0 1500 "" "thermal(0,1S)"] +Via[111000 2000 2900 2000 0 1500 "" "thermal(0,1S)"] Via[83300 36400 2900 2000 0 1500 "" ""] Via[103500 9800 2900 2000 0 1500 "" ""] Via[146000 35000 2900 2000 0 1500 "" "thermal(1S)"] @@ -847,13 +847,6 @@ Via[71100 11600 2900 2000 0 1500 "" "thermal(1S)"] Via[56700 8500 2900 2000 0 1500 "" ""] Via[81300 4600 2900 2000 0 1500 "" ""] -Element["" "0402" "C9" "0.1uF" 116207 16326 -3068 -8116 0 100 ""] -( - Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] - Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] - - ) - Element["" "0402" "C28" "0.1uF" 104126 41993 1759 -7949 0 100 ""] ( Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] @@ -893,7 +886,7 @@ Element["" "0402" "C18" "0.001uF" 62400 47600 -13415 -3800 0 100 ""] ) -Element["" "0605" "D2" "unknown" 72267 17774 -7464 -5700 0 100 ""] +Element["" "0605" "D2" "dualLED" 72267 17774 -7464 -5700 0 100 ""] ( Pad[-2067 1280 -1280 1280 2559 -1771 3159 "2" "2" "square,edge2"] Pad[-2067 4626 -1280 4626 2559 -1771 3159 "1" "1" "square,edge2"] @@ -990,7 +983,7 @@ Element["" "0402" "C23" "8.2pF" 123807 16274 -2959 -4751 1 100 ""] ) -Element["" "0402" "C21" "220pF" 111407 3574 -3537 -6852 3 100 ""] +Element["" "0402" "C21" "220pF" 116207 16274 -3537 -6852 3 100 ""] ( Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] @@ -1325,7 +1318,7 @@ Element["" "530470410" "J6" "Debug" 67800 47600 0 0 0 100 ""] ) -Element["onsolder" "282834-4" "J4" "unknown" 1005 3694 0 0 1 100 "auto"] +Element["onsolder" "282834-4" "J4" "Pyro" 1005 3694 0 0 1 100 "auto"] ( Pin[12795 5906 7000 1260 7687 4528 "4" "4" ""] Pin[12795 15906 7000 1260 7687 4528 "3" "3" ""] @@ -1375,7 +1368,7 @@ Layer(1 "top") Line[127800 14300 127800 11900 2500 2000 "clearline"] Line[63474 47993 67407 47993 1000 2000 "clearline"] Line[79781 39600 79807 39574 1000 2000 "clearline"] - Line[108000 2000 114800 2000 1000 2000 "clearline"] + Line[108000 2000 111200 2000 1000 2000 "clearline"] Line[106849 19095 114500 19100 1000 2000 "clearline"] Line[127374 17874 127400 17848 1000 2000 "clearline"] Line[127374 20807 127374 17874 1000 2000 "clearline"] @@ -1384,8 +1377,8 @@ Layer(1 "top") Line[121034 27800 120748 27514 1000 2000 ""] Line[124100 27800 121034 27800 1000 2000 ""] Line[120748 27514 120748 24438 1000 2000 ""] - Line[111014 5148 111014 8286 1000 2000 "clearline"] - Line[111014 8286 111000 8300 1000 2000 "clearline"] + Line[47600 14400 47500 14300 2500 2000 "clearline"] + Line[50300 14400 47600 14400 2500 2000 "clearline"] Line[119300 19700 119300 18181 1000 2000 "clearline"] Line[86500 39600 83300 36400 1000 2000 "clearline"] Line[7300 24200 13100 30000 2500 2000 "clearline"] @@ -1617,8 +1610,6 @@ Layer(1 "top") Line[61219 14400 64226 11393 1000 2000 "clearline"] Line[73133 11600 73426 11307 1000 2000 "clearline"] Line[76574 12093 79793 12093 1000 2000 "clearline"] - Line[50300 14400 47600 14400 2500 2000 "clearline"] - Line[47600 14400 47500 14300 2500 2000 "clearline"] Polygon("") ( [149100 49500] [130100 49500] [130100 32000] [149100 32000] @@ -1692,7 +1683,6 @@ NetList() ( Net("+3.3V" "(unknown)") ( - Connect("C9-1") Connect("C10-2") Connect("C12-2") Connect("C20-2") @@ -1746,7 +1736,6 @@ NetList() ( Connect("B1-2") Connect("C5-1") - Connect("C9-2") Connect("C10-1") Connect("C11-1") Connect("C12-1") diff --git a/telemini.sch b/telemini.sch index fe4ca49..89e2966 100644 --- a/telemini.sch +++ b/telemini.sch @@ -1,26 +1,26 @@ v 20100214 2 C 40000 40000 0 0 0 EMBEDDEDtitle-C-bdale.sym [ -T 31100 40800 5 10 0 0 0 0 1 +T 43200 41100 5 10 0 0 0 0 1 graphical=1 -B 40000 40000 22000 17000 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 -L 54400 41400 62000 41400 15 0 0 0 -1 -1 +T 54500 40400 15 8 1 0 0 0 1 +FILE: +T 59500 40400 15 8 1 0 0 0 1 +REVISION: +T 57400 40400 15 8 1 0 0 0 1 +PAGE +T 58200 40400 15 8 1 0 0 0 1 +OF +B 54400 40000 7600 2700 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +L 54400 40600 62000 40600 15 0 0 0 -1 -1 +T 54500 40100 15 10 1 0 0 0 1 +Project URL: T 54900 40800 9 10 1 0 0 0 2 Copyright 2010 by Bdale Garbee Licensed under the TAPR Open Hardware License, http://www.tapr.org/OHL -T 54500 40100 15 10 1 0 0 0 1 -Project URL: -L 54400 40600 62000 40600 15 0 0 0 -1 -1 -B 54400 40000 7600 2700 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 -T 58200 40400 15 8 1 0 0 0 1 -OF -T 57400 40400 15 8 1 0 0 0 1 -PAGE -T 59500 40400 15 8 1 0 0 0 1 -REVISION: -T 54500 40400 15 8 1 0 0 0 1 -FILE: -T 43200 41100 5 10 0 0 0 0 1 +L 54400 41400 62000 41400 15 0 0 0 -1 -1 +B 40000 40000 22000 17000 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +T 31100 40800 5 10 0 0 0 0 1 graphical=1 ] C 45600 54500 1 0 0 gnd-1.sym @@ -178,25 +178,6 @@ vendor=digikey T 55400 54000 5 10 0 1 0 0 1 loadstatus=smt } -C 56800 54400 1 270 0 capacitor-1.sym -{ -T 57500 54200 5 10 0 0 270 0 1 -device=CAPACITOR -T 57100 54200 5 10 1 1 0 0 1 -refdes=C9 -T 57700 54200 5 10 0 0 270 0 1 -symversion=0.1 -T 57100 53600 5 10 1 1 0 0 1 -value=0.1uF -T 56800 54400 5 10 0 0 0 0 1 -vendor_part_number=399-3027-1-ND -T 56800 54400 5 10 0 0 0 0 1 -footprint=0402 -T 56800 54400 5 10 0 0 0 0 1 -vendor=digikey -T 56800 54400 5 10 0 1 0 0 1 -loadstatus=smt -} C 57800 54800 1 270 0 capacitor-1.sym { T 58500 54600 5 10 0 0 270 0 1 @@ -236,12 +217,10 @@ T 58800 55200 5 10 0 1 0 0 1 loadstatus=smt } N 55200 54000 55600 54000 4 -N 55600 54400 57000 54400 4 N 55600 54800 58000 54800 4 N 59000 55200 55600 55200 4 C 58900 54000 1 0 0 gnd-1.sym C 57900 53600 1 0 0 gnd-1.sym -C 56900 53200 1 0 0 gnd-1.sym C 55500 52800 1 0 0 gnd-1.sym C 55200 50800 1 270 0 capacitor-1.sym { -- 2.30.2