From: Bdale Garbee <bdale@gag.com>
Date: Tue, 26 Mar 2013 22:12:10 +0000 (-0400)
Subject: improve silk
X-Git-Tag: fab-v1.1~3
X-Git-Url: https://git.gag.com/?p=hw%2Ftelemini;a=commitdiff_plain;h=37b991a45d128fd341ebefa47083a1bbc0848008

improve silk
---

diff --git a/telemini.pcb b/telemini.pcb
index ce8fd87..5eab461 100644
--- a/telemini.pcb
+++ b/telemini.pcb
@@ -6,11 +6,11 @@ FileVersion[20091103]
 PCB["" 1500.00mil 800.00mil]
 
 Grid[100.000000 0.0000 0.0000 0]
-Cursor[5.00mil 15.00mil 0.000000]
+Cursor[812.00mil 797.00mil 0.000000]
 PolyArea[200000000.000000]
 Thermal[0.500000]
 DRC[6.00mil 6.00mil 6.00mil 10.00mil 15.00mil 7.00mil]
-Flags("showdrc,nameonpcb,clearnew,snappin,hidenames")
+Flags("showdrc,nameonpcb,clearnew,hidenames")
 Groups("1,c:4,s:2:3:5")
 Styles["Signal,6.00mil,30.00mil,15.00mil,6.00mil:Power,25.00mil,60.00mil,35.00mil,10.00mil:Fat,40.00mil,60.00mil,35.00mil,10.00mil:Medium,15.00mil,30.00mil,15.00mil,6.00mil"]
 
@@ -2130,7 +2130,7 @@ Layer(5 "outline")
 )
 Layer(6 "silk")
 (
-	Text[791.00mil 773.00mil 0 200 "TeleMini" "clearline,onsolder"]
+	Text[856.00mil 765.00mil 0 200 "TeleMini" "clearline,onsolder"]
 	Text[693.00mil 235.00mil 0 100 "`2013" "clearline,onsolder"]
 	Text[697.00mil 164.00mil 0 100 "Bdale Garbee" "clearline,onsolder"]
 	Text[511.00mil 729.00mil 0 150 "+" "clearline,onsolder"]
@@ -2141,7 +2141,7 @@ Layer(6 "silk")
 	Text[489.00mil 133.00mil 0 100 "Switch" "clearline,onsolder"]
 	Text[61.00mil 294.00mil 0 150 "+" "clearline,onsolder"]
 	Text[63.00mil 589.00mil 0 150 "-" "clearline,onsolder"]
-	Text[17.7800mm 100.00mil 0 100 "v1.9" "clearline,onsolder"]
+	Text[700.00mil 100.00mil 0 100 "v1.9" "clearline,onsolder"]
 )
 Layer(7 "silk")
 (