From ab3b14ea8a461905af3a86453c8007d5b1f2ac41 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 23 Jul 2012 23:05:08 -0700 Subject: [PATCH] Add serial debug connector for cc1111 Useful to separately debug the cc1111 Signed-off-by: Keith Packard --- telelco.pcb | 101 ++++++++++++++++++++++++++++++++++------------------ telelco.sch | 18 ++++++++++ 2 files changed, 85 insertions(+), 34 deletions(-) diff --git a/telelco.pcb b/telelco.pcb index 83c0203..7fab79c 100644 --- a/telelco.pcb +++ b/telelco.pcb @@ -6,7 +6,7 @@ FileVersion[20070407] PCB["TeleLco" 450000 375000] Grid[100.0 0 0 0] -Cursor[0 0 0.000000] +Cursor[76300 17200 0.000000] PolyArea[200000000.000000] Thermal[0.500000] DRC[500 1000 500 500 1500 650] @@ -957,7 +957,7 @@ Via[191600 105100 3000 2000 0 1500 "" ""] Via[69655 152188 3000 2000 0 1500 "" ""] Via[81055 152188 3000 2000 0 1500 "" ""] Via[2155 119188 3000 2000 0 1500 "" "thermal(1S)"] -Via[12155 119288 3000 2000 0 1500 "" "selected,thermal(1S)"] +Via[12155 119288 3000 2000 0 1500 "" "thermal(1S)"] Via[12155 139288 3000 2000 0 1500 "" "thermal(1S)"] Via[2155 139188 3000 2000 0 1500 "" "thermal(1S)"] Via[48855 144288 3000 2000 0 1500 "" ""] @@ -975,10 +975,13 @@ Via[84500 46900 3000 2000 0 1500 "" ""] Via[194900 183900 3000 2000 0 1500 "" ""] Via[198500 183800 3000 2000 0 1500 "" ""] Via[56500 159100 3000 2000 0 1500 "" "thermal(1S)"] -Via[74100 118100 3000 2000 0 1500 "" ""] -Via[81100 118100 3000 2000 0 1500 "" ""] -Via[70300 112300 3000 2000 0 1500 "" ""] Via[53700 117600 3000 2000 0 1500 "" ""] +Via[72400 117400 3000 2000 0 1500 "" ""] +Via[70900 108900 3000 2000 0 1500 "" ""] +Via[68400 106400 3000 2000 0 1500 "" ""] +Via[74100 102500 3000 2000 0 1500 "" ""] +Via[71600 100000 3000 2000 0 1500 "" ""] +Via[81100 117400 3000 2000 0 1500 "" ""] Element["" "TDK_PS12" "U8" "TDK_PS12" 225000 277558 -4600 -3632 0 100 ""] ( @@ -1166,7 +1169,7 @@ Element["" "B2B-PH" "B1" "LiPo" 354776 328051 -7007 -14749 0 100 ""] ) -Element["" "0-215079-4" "J3" "Debug" 169200 17800 -16000 -5500 0 100 ""] +Element["" "0-215079-4" "J3" "Debug" 169200 17800 -15700 7500 0 100 ""] ( Pin[0 10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(1X)"] Pin[5000 0 6299 1200 7299 3150 "2" "2" "edge2"] @@ -2004,7 +2007,7 @@ Element["" "0402" "C23" "8.2pF" 26048 134314 -5729 15272 1 100 ""] ) -Element["" "0-215079-4" "J6" "Debug" 38300 17900 0 0 0 100 ""] +Element["" "0-215079-4" "J6" "Debug" 38300 17900 -16100 9100 0 100 ""] ( Pin[0 10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(1X)"] Pin[5000 0 6299 1200 7299 3150 "2" "2" "edge2"] @@ -2016,6 +2019,18 @@ Element["" "0-215079-4" "J6" "Debug" 38300 17900 0 0 0 100 ""] ElementLine [24429 15039 24429 -5038 600] ElementLine [24429 -5038 -9428 -5038 600] + ) + +Element["" "100mil3pin.fp" "J2" "unknown" 7800 59900 -2400 -33800 0 100 ""] +( + Pin[0 0 7000 1500 8500 3800 "1" "1" "square,thermal(1X)"] + Pin[0 -10000 7000 1500 8500 3800 "2" "2" ""] + Pin[0 -20000 7000 1500 8500 3800 "3" "3" ""] + ElementLine [-5000 -25000 -5000 5000 1500] + ElementLine [-5000 5000 5000 5000 1500] + ElementLine [5000 -25000 5000 5000 1500] + ElementLine [-5000 -25000 5000 -25000 1500] + ) Layer(1 "top") ( @@ -2873,30 +2888,6 @@ Layer(1 "top") Line[58448 157152 56500 159100 1000 2000 "clearline"] Line[54455 155962 54455 157055 1000 2000 "clearline"] Line[54455 157055 56500 159100 1000 2000 "clearline"] - Line[75100 60900 61300 47100 1000 2000 "clearline"] - Line[73500 67500 44700 38700 1000 2000 "clearline"] - Line[113300 98200 101000 98200 2500 2000 "clearline"] - Line[101000 98200 81100 118100 2500 2000 "clearline"] - Line[81742 140713 81742 118742 1000 2000 "clearline"] - Line[81742 118742 81100 118100 1000 2000 "clearline"] - Line[67072 120683 67072 119328 1000 2000 "clearline"] - Line[67072 119328 68300 118100 1000 2000 "clearline"] - Line[68300 118100 74100 118100 1000 2000 "clearline"] - Line[61167 120683 61167 119333 1000 2000 "clearline"] - Line[61167 119333 64000 116500 1000 2000 "clearline"] - Line[64000 116500 72000 116500 1000 2000 "clearline"] - Line[72000 116500 75100 113400 1000 2000 "clearline"] - Line[75100 113400 75100 60900 1000 2000 "clearline"] - Line[59199 120683 59199 119101 1000 2000 "clearline"] - Line[59199 119101 63400 114900 1000 2000 "clearline"] - Line[63400 114900 71300 114900 1000 2000 "clearline"] - Line[71300 114900 73500 112700 1000 2000 "clearline"] - Line[73500 112700 73500 67500 1000 2000 "clearline"] - Line[70300 112300 60900 112300 1000 2000 "clearline"] - Line[60900 112300 52600 120600 1000 2000 "clearline"] - Line[52600 120600 50184 120600 1000 2000 "clearline"] - Line[50184 120600 50148 120636 1000 2000 "clearline"] - Line[53700 117600 54650 118550 1000 2000 "clearline"] Line[65104 142532 65104 147637 1000 2000 "clearline"] Line[65104 147637 69655 152188 1000 2000 "clearline"] Line[67072 142532 67072 145872 1000 2000 "clearline"] @@ -2911,6 +2902,35 @@ Layer(1 "top") Line[71009 145009 75500 149500 1000 2000 "clearline"] Line[75500 149500 75500 153500 1000 2000 "clearline"] Line[75500 153500 80000 158000 1000 2000 "clearline"] + Line[74060 123734 74366 123734 1000 2000 "clearline"] + Line[74366 123734 75100 123000 1000 2000 "clearline"] + Line[75100 123000 75100 107200 1000 2000 "clearline"] + Line[75100 107200 7800 39900 1000 2000 "clearline"] + Line[67072 120683 67072 119428 1000 2000 "clearline"] + Line[67072 119428 69100 117400 1000 2000 "clearline"] + Line[69100 117400 72400 117400 1000 2000 "clearline"] + Line[73500 107800 15600 49900 1000 2000 "clearline"] + Line[15600 49900 7800 49900 1000 2000 "clearline"] + Line[53700 117600 53700 119000 1000 2000 "clearline"] + Line[53700 119000 52100 120600 1000 2000 "clearline"] + Line[52100 120600 50184 120600 1000 2000 "clearline"] + Line[50184 120600 50148 120636 1000 2000 "clearline"] + Line[113300 98200 100300 98200 2500 2000 "clearline"] + Line[100300 98200 81100 117400 2500 2000 "clearline"] + Line[81742 140713 81742 118042 1000 2000 "clearline"] + Line[81742 118042 81100 117400 1000 2000 "clearline"] + Line[74100 102500 74100 59900 1000 2000 "clearline"] + Line[74100 59900 61300 47100 1000 2000 "clearline"] + Line[71600 100000 71600 65600 1000 2000 "clearline"] + Line[71600 65600 44700 38700 1000 2000 "clearline"] + Line[61167 120683 61167 118633 1000 2000 "clearline"] + Line[61167 118633 70900 108900 1000 2000 "clearline"] + Line[59199 120683 59199 115601 1000 2000 "clearline"] + Line[59199 115601 68400 106400 1000 2000 "clearline"] + Line[73500 107800 73500 110000 1000 2000 "clearline"] + Line[73500 110000 65100 118400 1000 2000 "clearline"] + Line[65100 118400 65100 120679 1000 2000 "clearline"] + Line[65100 120679 65104 120683 1000 2000 "clearline"] ) Layer(2 "bottom") ( @@ -3037,11 +3057,13 @@ Layer(2 "bottom") Line[194100 180900 195600 180900 1000 2000 "clearline"] Line[195600 180900 198500 183800 1000 2000 "clearline"] Line[178100 173500 194900 173500 1000 2000 "clearline"] - Line[74100 118100 81100 118100 1000 2000 "clearline"] - Line[74100 118100 74100 116100 1000 2000 "clearline"] - Line[74100 116100 70300 112300 1000 2000 "clearline"] Line[53700 117600 53700 121843 1000 2000 "clearline"] Line[53700 121843 46855 128688 1000 2000 "clearline"] + Line[68400 106400 68400 103200 1000 2000 "clearline"] + Line[68400 103200 71600 100000 1000 2000 "clearline"] + Line[70900 108900 70900 105700 1000 2000 "clearline"] + Line[70900 105700 74100 102500 1000 2000 "clearline"] + Line[81100 117400 53700 117400 1000 2000 "clearline"] Polygon("clearpoly") ( [446600 372500] [1600 372500] [1600 2500] [446600 2500] @@ -3227,6 +3249,7 @@ NetList() Connect("H8-1") Connect("J1-4") Connect("J1-5") + Connect("J2-1") Connect("J3-1") Connect("J5-5") Connect("J6-1") @@ -3388,6 +3411,16 @@ NetList() Connect("R5-1") Connect("U7-14") ) + Net("serial_rx" "(unknown)") + ( + Connect("J2-2") + Connect("U9-13") + ) + Net("serial_tx" "(unknown)") + ( + Connect("J2-3") + Connect("U9-9") + ) Net("swclk" "(unknown)") ( Connect("J3-4") diff --git a/telelco.sch b/telelco.sch index 525801c..60f8230 100644 --- a/telelco.sch +++ b/telelco.sch @@ -2288,3 +2288,21 @@ T 96500 52900 9 10 1 0 0 0 1 T 95200 53900 9 10 1 0 0 0 2 SMA is optional default is wire whip +N 79400 47700 78100 47700 4 +{ +T 78100 47800 5 10 1 1 0 0 1 +netname=serial_tx +} +N 79400 47300 78100 47300 4 +{ +T 78100 47400 5 10 1 1 0 0 1 +netname=serial_rx +} +C 78100 47900 1 180 0 conn-3.sym +{ +T 77600 48200 5 10 1 1 180 0 1 +refdes=J2 +T 78100 47900 5 10 0 0 0 0 1 +footprint=100mil3pin.fp +} +C 78000 46600 1 0 0 gnd.sym -- 2.30.2