From 7ec95687aaa17ba478a14ad397e32fa59a289b08 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Thu, 6 Sep 2012 00:26:52 -0700 Subject: [PATCH] Get started switching to the STM32L152VBT6 The LCD digits need more wires than the 64-bit version provides, so switch to the 100pin package. Lots of rats left, but it's a start at least. Signed-off-by: Keith Packard --- Makefile | 5 +- symbols/STM32L152-100.sym | 1114 ++++++++++++++++++++ telelco.pcb | 2010 ++++++++++++++++--------------------- telelco.sch | 706 ++++++++----- 4 files changed, 2426 insertions(+), 1409 deletions(-) create mode 100644 symbols/STM32L152-100.sym diff --git a/Makefile b/Makefile index 2ca1d76..6efb4c2 100644 --- a/Makefile +++ b/Makefile @@ -11,10 +11,13 @@ partslist: $(PROJECT).sch Makefile (head -n1 $(PROJECT)-bom.unsorted && tail -n+2 $(PROJECT)-bom.unsorted | sort) | nickle ./retab >> partslist rm -f $(PROJECT)-bom.unsorted -partslist.csv: $(PROJECT).sch Makefile gnet-partslist-keithp.scm +partslist.tab: $(PROJECT).sch Makefile gnetlist -l gnet-partslist-keithp.scm -g partslist-keithp -o $(PROJECT)-list.unsorted $(PROJECT).sch nickle ./retab < $(PROJECT)-list.unsorted > $@ +partslist.csv: $(PROJECT).sch Makefile gnet-partslist-csv.scm + gnetlist -l gnet-partslist-csv.scm -g partslist-csv -o $@ $(PROJECT).sch + partslist.dk: $(PROJECT).sch Makefile gnet-partslist-bom.scm gnetlist -m ./gnet-partslist-bom.scm -g partslist-bom -Ovendor=digikey -o $@ $(PROJECT).sch diff --git a/symbols/STM32L152-100.sym b/symbols/STM32L152-100.sym new file mode 100644 index 0000000..9d54491 --- /dev/null +++ b/symbols/STM32L152-100.sym @@ -0,0 +1,1114 @@ +v 20110115 2 +P 9500 5200 9100 5200 1 0 0 +{ +T 9195 5245 5 10 1 1 0 0 1 +pinnumber=3 +T 9045 5195 3 10 1 1 0 6 1 +pinlabel=PE4/TRACED1/TIM3_CH2 +T 9900 5300 5 10 0 1 0 6 1 +pinseq=18 +T 9500 5200 5 10 0 1 0 6 1 +pintype=io +} +P 9500 5600 9100 5600 1 0 0 +{ +T 9195 5645 5 10 1 1 0 0 1 +pinnumber=2 +T 9045 5595 3 10 1 1 0 6 1 +pinlabel=PE3/TRACED0/SEG39/TIM3_CH1 +T 9900 5700 5 10 0 1 0 6 1 +pinseq=4 +T 9500 5600 5 10 0 1 0 6 1 +pintype=io +} +P 9500 6000 9100 6000 1 0 0 +{ +T 9195 6045 5 10 1 1 0 0 1 +pinnumber=1 +T 9045 5995 3 10 1 1 0 6 1 +pinlabel=PE2/TRACECK/SEG38/TIM3_ETR +T 9900 6100 5 10 0 1 0 6 1 +pinseq=20 +T 9500 6000 5 10 0 1 0 6 1 +pintype=io +} +P 9500 18400 9100 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1 0 0 1 +pintype=io +} +P 0 16800 400 16800 1 0 0 +{ +T 100 16900 5 10 1 1 0 0 1 +pinnumber=73 +T 500 16800 3 10 1 1 0 0 1 +pinlabel=PH2/I2C2_SMBA +T -400 16900 5 10 0 1 0 0 1 +pinseq=21 +T 0 16800 5 10 0 1 0 0 1 +pintype=io +} +P 4200 0 4200 400 1 0 0 +{ +T 4150 305 5 10 1 1 90 6 1 +pinnumber=74 +T 4200 455 3 10 1 1 90 0 1 +pinlabel=VSS2 +T 4200 0 5 10 0 1 90 6 1 +pinseq=25 +T 4200 0 5 10 0 1 90 6 1 +pintype=pwr +} +P 4000 20400 4000 20000 1 0 0 +{ +T 3950 20095 5 10 1 1 90 0 1 +pinnumber=75 +T 4000 19945 3 10 1 1 90 6 1 +pinlabel=VDD2 +T 3900 20800 5 10 0 1 270 2 1 +pinseq=21 +T 4000 20400 5 10 0 1 270 2 1 +pintype=pwr +} +P 9500 8400 9100 8400 1 0 0 +{ +T 9195 8445 5 10 1 1 0 0 1 +pinnumber=59 +T 9045 8395 3 10 1 1 0 6 1 +pinlabel=PD12/TIM4_CH1/USART3_RTS/SEG32 +T 9900 8500 5 10 0 1 0 6 1 +pinseq=18 +T 9500 8400 5 10 0 1 0 6 1 +pintype=io +} +P 9500 15600 9100 15600 1 0 0 +{ +T 9195 15645 5 10 1 1 0 0 1 +pinnumber=78 +T 9045 15595 3 10 1 1 0 6 1 +pinlabel=PC10/USART3_TX/SEG40/COM4 +T 9900 15700 5 10 0 1 0 6 1 +pinseq=18 +T 9500 15600 5 10 0 1 0 6 1 +pintype=io +} +P 0 8000 400 8000 1 0 0 +{ +T 100 8100 5 10 1 1 0 0 1 +pinnumber=77 +T 500 8000 3 10 1 1 0 0 1 +pinlabel=PA15/JTDI/TIM2_CH1_ETR/SPI1_NSS/SEG17 +T -400 8100 5 10 0 1 0 0 1 +pinseq=4 +T 0 8000 5 10 0 1 0 0 1 +pintype=io +} +P 0 8400 400 8400 1 0 0 +{ +T 100 8500 5 10 1 1 0 0 1 +pinnumber=76 +T 500 8400 3 10 1 1 0 0 1 +pinlabel=PA14/JTCK/SWCLK +T -400 8500 5 10 0 1 0 0 1 +pinseq=20 +T 0 8400 5 10 0 1 0 0 1 +pintype=io +} +P 0 4800 400 4800 1 0 0 +{ +T 305 4845 5 10 1 1 0 6 1 +pinnumber=93 +T 455 4795 3 10 1 1 0 0 1 +pinlabel=PB7/I2C1_SDA/TIM4_CH2/USART1_RX/PVD_IN +T -400 4900 5 10 0 1 0 0 1 +pinseq=3 +T 0 4800 5 10 0 1 0 0 1 +pintype=io +} +P 0 16000 400 16000 1 0 0 +{ +T 100 16100 5 10 1 1 0 0 1 +pinnumber=94 +T 500 16000 3 10 1 1 0 0 1 +pinlabel=BOOT0 +T -400 16100 5 10 0 1 0 0 1 +pinseq=21 +T 0 16000 5 10 0 1 0 0 1 +pintype=in +} +P 0 4400 400 4400 1 0 0 +{ +T 305 4445 5 10 1 1 0 6 1 +pinnumber=95 +T 455 4395 3 10 1 1 0 0 1 +pinlabel=PB8/TIM4_CH3/I2C1_SCL/TIM10_CH1/SEG16 +T 0 4400 5 10 0 1 0 6 1 +pinseq=25 +T 0 4400 5 10 0 1 0 6 1 +pintype=io +} +P 0 6400 400 6400 1 0 0 +{ +T 305 6445 5 10 1 1 0 6 1 +pinnumber=89 +T 455 6395 3 10 1 1 0 0 1 +pinlabel=PB3/JTDO/TIM2_CH2/TRACESWO/SPI1_SCK/SEG7 +T 0 6400 5 10 0 1 0 6 1 +pinseq=25 +T 0 6400 5 10 0 1 0 6 1 +pintype=io +} +P 0 6000 400 6000 1 0 0 +{ +T 305 6045 5 10 1 1 0 6 1 +pinnumber=90 +T 455 5995 3 10 1 1 0 0 1 +pinlabel=PB4/JNTRSTSPI1_MISO/TIM3_CH1/SEG8 +T 0 6000 5 10 0 1 0 6 1 +pinseq=25 +T 0 6000 5 10 0 1 0 6 1 +pintype=io +} +P 0 5200 400 5200 1 0 0 +{ +T 305 5245 5 10 1 1 0 6 1 +pinnumber=92 +T 455 5195 3 10 1 1 0 0 1 +pinlabel=PB6/I2C1_SCL/TIM4_CH1/USART1_TX +T 0 5200 5 10 0 1 0 6 1 +pinseq=25 +T 0 5200 5 10 0 1 0 6 1 +pintype=io +} +P 0 5600 400 5600 1 0 0 +{ +T 305 5645 5 10 1 1 0 6 1 +pinnumber=91 +T 455 5595 3 10 1 1 0 0 1 +pinlabel=PB5/I2C1_SMBA/TIM3_CH2/SPI1_MOSI/SEG9 +T 0 5600 5 10 0 1 0 6 1 +pinseq=25 +T 0 5600 5 10 0 1 0 6 1 +pintype=io +} +P 9500 10400 9100 10400 1 0 0 +{ +T 9195 10445 5 10 1 1 0 0 1 +pinnumber=88 +T 9045 10395 3 10 1 1 0 6 1 +pinlabel=PD7/USART2_CK/TIM9_CH2 +T 9500 10400 5 10 0 1 0 0 1 +pinseq=25 +T 9500 10400 5 10 0 1 0 0 1 +pintype=io +} +P 9500 11600 9100 11600 1 0 0 +{ +T 9195 11645 5 10 1 1 0 0 1 +pinnumber=85 +T 9045 11595 3 10 1 1 0 6 1 +pinlabel=PD4_USART2_RTS/SPI2_MOSI +T 9900 11700 5 10 0 1 0 6 1 +pinseq=20 +T 9500 11600 5 10 0 1 0 6 1 +pintype=io +} +P 9500 11200 9100 11200 1 0 0 +{ +T 9195 11245 5 10 1 1 0 0 1 +pinnumber=86 +T 9045 11195 3 10 1 1 0 6 1 +pinlabel=PD5/USART2_TX +T 9900 11300 5 10 0 1 0 6 1 +pinseq=20 +T 9500 11200 5 10 0 1 0 6 1 +pintype=io +} +P 9500 10800 9100 10800 1 0 0 +{ +T 9195 10845 5 10 1 1 0 0 1 +pinnumber=87 +T 9045 10795 3 10 1 1 0 6 1 +pinlabel=PD6/USART2_RX +T 9900 10900 5 10 0 1 0 6 1 +pinseq=20 +T 9500 10800 5 10 0 1 0 6 1 +pintype=io +} +P 0 4000 400 4000 1 0 0 +{ +T 305 4045 5 10 1 1 0 6 1 +pinnumber=96 +T 455 3995 3 10 1 1 0 0 1 +pinlabel=PB9/TIM4_CH4/I2C1_SDA/TIM11_CH1/COM3 +T -400 4100 5 10 0 1 0 0 1 +pinseq=21 +T 0 4000 5 10 0 1 0 0 1 +pintype=io +} +P 9500 15200 9100 15200 1 0 0 +{ +T 9195 15245 5 10 1 1 0 0 1 +pinnumber=79 +T 9045 15195 3 10 1 1 0 6 1 +pinlabel=PC11/USART3_RX/SEG29/SEG41/COM5 +T 9900 15300 5 10 0 1 0 6 1 +pinseq=18 +T 9500 15200 5 10 0 1 0 6 1 +pintype=io +} +P 9500 12800 9100 12800 1 0 0 +{ +T 9195 12845 5 10 1 1 0 0 1 +pinnumber=82 +T 9045 12795 3 10 1 1 0 6 1 +pinlabel=PD1/SPI2_SCK +T 9900 12900 5 10 0 1 0 6 1 +pinseq=18 +T 9500 12800 5 10 0 1 0 6 1 +pintype=io +} +P 9500 13200 9100 13200 1 0 0 +{ +T 9195 13245 5 10 1 1 0 0 1 +pinnumber=81 +T 9045 13195 3 10 1 1 0 6 1 +pinlabel=PD0/SPI2_NSS/TIM9_CH1 +T 9900 13300 5 10 0 1 0 6 1 +pinseq=4 +T 9500 13200 5 10 0 1 0 6 1 +pintype=io +} +P 9500 14800 9100 14800 1 0 0 +{ +T 9195 14845 5 10 1 1 0 0 1 +pinnumber=80 +T 9045 14795 3 10 1 1 0 6 1 +pinlabel=PC12/USART3_CK/SEG30/SEG42/COM6 +T 9900 14900 5 10 0 1 0 6 1 +pinseq=20 +T 9500 14800 5 10 0 1 0 6 1 +pintype=io +} +P 9500 12400 9100 12400 1 0 0 +{ +T 9195 12445 5 10 1 1 0 0 1 +pinnumber=83 +T 9045 12395 3 10 1 1 0 6 1 +pinlabel=PD2/TIM3_ETR/SEG31/SEG43/COM7 +T 9900 12500 5 10 0 1 0 6 1 +pinseq=18 +T 9500 12400 5 10 0 1 0 6 1 +pintype=io +} +P 9500 6800 9100 6800 1 0 0 +{ +T 9195 6845 5 10 1 1 0 0 1 +pinnumber=97 +T 9045 6795 3 10 1 1 0 6 1 +pinlabel=PE0/TIM4_ETR/TIM10_CH1/SEG36 +T 9900 6900 5 10 0 1 0 6 1 +pinseq=3 +T 9500 6800 5 10 0 1 0 6 1 +pintype=io +} +P 9500 6400 9100 6400 1 0 0 +{ +T 9195 6445 5 10 1 1 0 0 1 +pinnumber=98 +T 9045 6395 3 10 1 1 0 6 1 +pinlabel=PE1/TIM11_CH1/SEG37 +T 9900 6500 5 10 0 1 0 6 1 +pinseq=21 +T 9500 6400 5 10 0 1 0 6 1 +pintype=io +} +P 4600 0 4600 400 1 0 0 +{ +T 4550 305 5 10 1 1 90 6 1 +pinnumber=99 +T 4600 455 3 10 1 1 90 0 1 +pinlabel=VSS3 +T 4600 0 5 10 0 1 90 6 1 +pinseq=25 +T 4600 0 5 10 0 1 90 6 1 +pintype=pwr +} +P 4400 20400 4400 20000 1 0 0 +{ +T 4350 20095 5 10 1 1 90 0 1 +pinnumber=100 +T 4400 19945 3 10 1 1 90 6 1 +pinlabel=VDD3 +T 4300 20800 5 10 0 1 270 2 1 +pinseq=21 +T 4400 20400 5 10 0 1 270 2 1 +pintype=pwr +} +P 9500 12000 9100 12000 1 0 0 +{ +T 9195 12045 5 10 1 1 0 0 1 +pinnumber=84 +T 9045 11995 3 10 1 1 0 6 1 +pinlabel=PD3/USART2_CTS/SPI2_MISO +T 9900 12100 5 10 0 1 0 6 1 +pinseq=18 +T 9500 12000 5 10 0 1 0 6 1 +pintype=io +} diff --git a/telelco.pcb b/telelco.pcb index 7044136..081b34b 100644 --- a/telelco.pcb +++ b/telelco.pcb @@ -6,7 +6,7 @@ FileVersion[20070407] PCB["TeleLco" 450000 375000] Grid[100.0 0 0 0] -Cursor[0 0 0.000000] +Cursor[0 18200 0.000000] PolyArea[200000000.000000] Thermal[0.500000] DRC[500 1000 500 500 1500 650] @@ -811,75 +811,10 @@ Symbol['~' 1200] SymbolLine[2000 3500 2500 3000 800] ) Attribute("PCB::grid::unit" "mil") -Via[322600 46900 3000 2000 0 1500 "" ""] -Via[284400 25000 3000 2000 0 1500 "" ""] -Via[284400 46900 3000 2000 0 1500 "" ""] -Via[119700 103100 3000 2000 0 1500 "" ""] -Via[115700 103100 3000 2000 0 1500 "" ""] -Via[134300 150200 3000 2000 0 1500 "" ""] -Via[134300 163800 3000 2000 0 1500 "" ""] -Via[115700 94900 3000 2000 0 1500 "" ""] -Via[119700 94900 3000 2000 0 1500 "" ""] -Via[179600 186600 3000 2000 0 1500 "" ""] -Via[179600 182200 3000 2000 0 1500 "" ""] -Via[179600 177800 3000 2000 0 1500 "" ""] -Via[178100 173500 3000 2000 0 1500 "" ""] -Via[129500 228100 3000 2000 0 1500 "" ""] -Via[195600 256500 3000 2000 0 1500 "" ""] -Via[192000 256500 3000 2000 0 1500 "" ""] -Via[294400 228100 3000 2000 0 1500 "" ""] -Via[284400 228100 3000 2000 0 1500 "" ""] -Via[294400 246500 3000 2000 0 1500 "" ""] -Via[284400 246500 3000 2000 0 1500 "" ""] -Via[274400 246500 3000 2000 0 1500 "" ""] -Via[264400 246500 3000 2000 0 1500 "" ""] -Via[183800 244000 3000 2000 0 1500 "" ""] -Via[196700 228100 3000 2000 0 1500 "" ""] -Via[193000 228100 3000 2000 0 1500 "" ""] -Via[180200 241400 3000 2000 0 1500 "" ""] -Via[187400 233300 3000 2000 0 1500 "" ""] -Via[180200 228100 3000 2000 0 1500 "" ""] -Via[187400 228100 3000 2000 0 1500 "" ""] -Via[183800 228100 3000 2000 0 1500 "" ""] -Via[115900 230700 3000 2000 0 1500 "" ""] -Via[209400 243900 3000 2000 0 1500 "" ""] -Via[138100 150300 3000 2000 0 1500 "" ""] -Via[141900 150300 3000 2000 0 1500 "" ""] -Via[145500 150300 3000 2000 0 1500 "" ""] -Via[149100 150300 3000 2000 0 1500 "" ""] -Via[270400 46900 3000 2000 0 1500 "" ""] -Via[201800 55600 3000 2000 0 1500 "" ""] -Via[190200 55600 3000 2000 0 1500 "" ""] -Via[138700 46900 3000 2000 0 1500 "" ""] -Via[184200 49600 3000 2000 0 1500 "" ""] -Via[179300 47000 3000 2000 0 1500 "" ""] -Via[194700 46900 3000 2000 0 1500 "" ""] -Via[194700 39100 3000 2000 0 1500 "" ""] -Via[89900 44300 3000 2000 0 1500 "" ""] -Via[99800 44300 3000 2000 0 1500 "" ""] -Via[229500 31500 3000 2000 0 1500 "" ""] -Via[209500 44300 3000 2000 0 1500 "" ""] -Via[328100 44300 3000 2000 0 1500 "" ""] -Via[348700 31500 3000 2000 0 1500 "" ""] -Via[305800 244900 3000 2000 0 1500 "" ""] -Via[305800 241300 3000 2000 0 1500 "" ""] -Via[317300 241300 3000 2000 0 1500 "" ""] -Via[253100 230700 3000 2000 0 1500 "" ""] -Via[317300 229700 3000 2000 0 1500 "" ""] -Via[304200 229700 3000 2000 0 1500 "" ""] -Via[304200 233300 3000 2000 0 1500 "" ""] -Via[317300 233300 3000 2000 0 1500 "" ""] Via[391600 289200 3000 2000 0 1500 "" "thermal(1S)"] Via[353300 295800 3000 2000 0 1500 "" "thermal(1S)"] Via[404600 322300 3000 2000 0 1500 "" "thermal(1S)"] Via[380900 308600 3000 2000 0 1500 "" "thermal(1S)"] -Via[204600 169600 3000 2000 0 1500 "" "thermal(1S)"] -Via[136400 104600 3000 2000 0 1500 "" "thermal(1S)"] -Via[122700 139300 3000 2000 0 1500 "" "thermal(1S)"] -Via[322600 28800 3000 2000 0 1500 "" ""] -Via[167500 117800 3000 2000 0 1500 "" "thermal(1S)"] -Via[147100 133800 3000 2000 0 1500 "" ""] -Via[147100 94000 3000 2000 0 1500 "" ""] Via[105000 296500 3000 2000 0 1500 "" ""] Via[105000 291400 3000 2000 0 1500 "" ""] Via[26500 291400 3000 2000 0 1500 "" "thermal(1S)"] @@ -887,63 +822,6 @@ Via[136300 291300 3000 2000 0 1500 "" "thermal(1S)"] Via[283000 291400 3000 2000 0 1500 "" ""] Via[251000 291500 3000 2000 0 1500 "" "thermal(1S)"] Via[282900 296500 3000 2000 0 1500 "" ""] -Via[183600 164400 3000 2000 0 1500 "" ""] -Via[160600 143600 3000 2000 0 1500 "" "thermal(1S)"] -Via[152700 150300 3000 2000 0 1500 "" ""] -Via[152700 163800 3000 2000 0 1500 "" ""] -Via[194900 173500 3000 2000 0 1500 "" ""] -Via[238000 113000 3000 2000 0 1500 "" ""] -Via[241600 113000 3000 2000 0 1500 "" ""] -Via[245200 113000 3000 2000 0 1500 "" ""] -Via[248800 113000 3000 2000 0 1500 "" ""] -Via[163300 113200 3000 2000 0 1500 "" ""] -Via[204400 228100 3000 2000 0 1500 "" ""] -Via[204400 256500 3000 2000 0 1500 "" ""] -Via[214400 228100 3000 2000 0 1500 "" ""] -Via[214400 246500 3000 2000 0 1500 "" ""] -Via[222500 143000 3000 2000 0 1500 "" ""] -Via[221200 139700 3000 2000 0 1500 "" ""] -Via[231800 104600 3000 2000 0 1500 "" ""] -Via[194200 123600 3000 2000 0 1500 "" ""] -Via[197800 123600 3000 2000 0 1500 "" ""] -Via[209800 112700 3000 2000 0 1500 "" ""] -Via[209800 102500 3000 2000 0 1500 "" ""] -Via[190300 123600 3000 2000 0 1500 "" ""] -Via[183900 153200 3000 2000 0 1500 "" ""] -Via[200500 99300 3000 2000 0 1500 "" ""] -Via[196900 99300 3000 2000 0 1500 "" ""] -Via[224600 104600 3000 2000 0 1500 "" ""] -Via[224600 119800 3000 2000 0 1500 "" ""] -Via[272900 120300 3000 2000 0 1500 "" ""] -Via[276700 124200 3000 2000 0 1500 "" ""] -Via[277900 115600 3000 2000 0 1500 "" ""] -Via[281400 119100 3000 2000 0 1500 "" ""] -Via[231200 125700 3000 2000 0 1500 "" ""] -Via[228200 104600 3000 2000 0 1500 "" ""] -Via[280300 127600 3000 2000 0 1500 "" ""] -Via[286900 120000 3000 2000 0 1500 "" ""] -Via[235400 104600 3000 2000 0 1500 "" ""] -Via[235400 100900 3000 2000 0 1500 "" ""] -Via[228200 130900 3000 2000 0 1500 "" ""] -Via[279400 228100 3000 2000 0 1500 "" ""] -Via[198200 190700 3000 2000 0 1500 "" ""] -Via[179600 190700 3000 2000 0 1500 "" ""] -Via[199900 195900 3000 2000 0 1500 "" ""] -Via[178000 195900 3000 2000 0 1500 "" ""] -Via[274400 225500 3000 2000 0 1500 "" ""] -Via[264400 225500 3000 2000 0 1500 "" ""] -Via[238000 126300 3000 2000 0 1500 "" ""] -Via[241600 126300 3000 2000 0 1500 "" ""] -Via[245200 126300 3000 2000 0 1500 "" ""] -Via[248800 126300 3000 2000 0 1500 "" ""] -Via[194900 177800 3000 2000 0 1500 "" ""] -Via[135500 94900 3000 2000 0 1500 "" "thermal(1S)"] -Via[191700 109000 3000 2000 0 1500 "" ""] -Via[178500 109000 3000 2000 0 1500 "" "thermal(1S)"] -Via[174200 53800 3000 2000 0 1500 "" ""] -Via[191600 105100 3000 2000 0 1500 "" ""] -Via[69655 152188 3000 2000 0 1500 "" ""] -Via[81055 152188 3000 2000 0 1500 "" ""] Via[2155 119188 3000 2000 0 1500 "" "thermal(1S)"] Via[12155 119288 3000 2000 0 1500 "" "thermal(1S)"] Via[12155 139288 3000 2000 0 1500 "" "thermal(1S)"] @@ -956,11 +834,6 @@ Via[38555 124888 3000 2000 0 1500 "" "thermal(1S)"] Via[48955 136488 3000 2000 0 1500 "" ""] Via[46855 128688 3000 2000 0 1500 "" ""] Via[31755 104788 3000 2000 0 1500 "" "thermal(1S)"] -Via[61300 47100 3000 2000 0 1500 "" ""] -Via[74700 46900 3000 2000 0 1500 "" ""] -Via[84500 46900 3000 2000 0 1500 "" ""] -Via[194900 183900 3000 2000 0 1500 "" ""] -Via[198500 183800 3000 2000 0 1500 "" ""] Via[56500 159100 3000 2000 0 1500 "" "thermal(1S)"] Via[53700 117600 3000 2000 0 1500 "" ""] Via[72400 117400 3000 2000 0 1500 "" ""] @@ -969,25 +842,22 @@ Via[68400 106400 3000 2000 0 1500 "" ""] Via[74100 102500 3000 2000 0 1500 "" ""] Via[71600 100000 3000 2000 0 1500 "" ""] Via[81100 117400 3000 2000 0 1500 "" ""] -Via[112300 156100 3000 2000 0 1500 "" "thermal(1S)"] -Via[81755 147688 3000 2000 0 1500 "" "thermal(0+,1S)"] -Via[95500 160900 3000 2000 0 1500 "" "thermal(1S)"] -Via[219700 122600 3000 2000 0 1500 "" "thermal(1S)"] -Via[171700 225500 3000 2000 0 1500 "" ""] Via[198200 260500 3000 2000 0 1500 "" ""] Via[198200 264100 3000 2000 0 1500 "" ""] Via[331800 271600 3000 2000 0 1500 "" ""] Via[331800 278400 3000 2000 0 1500 "" ""] -Via[145500 225500 3000 2000 0 1500 "" ""] -Via[145500 251300 3000 2000 0 1500 "" ""] -Via[149100 163900 3000 2000 0 1500 "" ""] -Via[138100 167300 3000 2000 0 1500 "" ""] -Via[141900 170000 3000 2000 0 1500 "" ""] -Via[145500 172600 3000 2000 0 1500 "" ""] Via[209500 296500 3000 2000 0 1500 "" ""] Via[222700 296500 3000 2000 0 1500 "" ""] -Via[182200 169700 3000 2000 0 1500 "" "thermal(1S)"] -Via[175200 225300 3000 2000 0 1500 "" ""] +Via[84200 128400 3000 2000 0 1500 "" "thermal(1S)"] +Via[84700 140100 3000 2000 0 1500 "" "thermal(1S)"] +Via[186700 207000 3000 2000 0 1500 "" "thermal(1S)"] +Via[199400 199200 3000 2000 0 1500 "" "thermal(1S)"] +Via[191900 181800 3000 2000 0 1500 "" "thermal(1S)"] +Via[210200 171300 3000 2000 0 1500 "" "thermal(1S)"] +Via[235300 166300 3000 2000 0 1500 "" "thermal(1S)"] +Via[233400 123000 3000 2000 0 1500 "" "thermal(1S)"] +Via[176800 110300 3000 2000 0 1500 "" "thermal(1S)"] +Via[172400 166300 3000 2000 0 1500 "" "thermal(1S)"] Element["" "TDK_PS12" "U8" "TDK_PS12" 225000 277558 -4600 -3632 0 100 ""] ( @@ -1256,21 +1126,21 @@ Element["" "0402" "R55" "270" 145974 257500 -4196 2100 0 100 ""] ) -Element["" "0402" "C33" "22pF" 129426 139300 3926 -2800 0 100 ""] +Element["" "0402" "C33" "22pF" 186726 221200 3926 -2800 0 100 ""] ( Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C32" "22pF" 129826 104600 -4074 -7600 0 100 ""] +Element["" "0402" "C32" "22pF" 186726 192600 -4074 -7600 0 100 ""] ( Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "ABM3B" "X2" "8mhz" 129677 122874 8846 -2548 0 100 ""] +Element["" "ABM3B" "X2" "8mhz" 186724 206974 8846 -2548 0 100 ""] ( Pad[-4724 6692 -4724 9054 4724 0 5324 "2" "2" "square,edge2"] Pad[-4724 -9055 -4724 -6693 4724 0 5324 "1" "1" "square"] @@ -1342,45 +1212,45 @@ Element["" "0402" "R4" "27k" 358226 286600 -3646 -8450 0 100 ""] ) -Element["" "0402" "R401" "10k" 199774 169600 -5150 -7550 0 100 ""] +Element["" "0402" "R401" "10k" 237474 136800 -5150 -7550 0 100 ""] ( Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "R402" "10k" 180074 105000 -6654 -7898 0 100 ""] +Element["" "0402" "R402" "10k" 142926 153600 -6654 -7898 0 100 ""] ( Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C601" "1uF" 156400 144726 3046 -15576 3 100 ""] +Element["" "0402" "C601" "1uF" 213074 185100 -15576 -3046 0 100 ""] ( - Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] - Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] + Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C602" "0.1uF" 152400 144774 2146 -15728 3 100 ""] +Element["" "0402" "C602" "0.1uF" 213126 181300 -15728 -2146 0 100 ""] ( - Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] - Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] + Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "L600" "bead" 167200 156726 -4150 -10098 3 100 ""] +Element["" "0402" "L600" "bead" 227400 196226 -6272 8124 0 100 ""] ( Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C610" "0.1uF" 129426 143500 3824 -1702 0 100 ""] +Element["" "0402" "C610" "0.1uF" 199300 194574 5450 -876 0 100 ""] ( - Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] - Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] ) @@ -1473,24 +1343,24 @@ Element["" "sma-edge" "J8" "SMA" 400 132200 300 1300 1 10 ""] ) -Element["" "0402" "R102" "22" 261126 120200 5432 -3750 0 100 ""] +Element["" "0402" "R102" "22" 360426 248800 5432 -3750 0 100 ""] ( Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "R101" "22" 261126 124200 5380 -2250 0 100 ""] +Element["" "0402" "R101" "22" 326774 246200 5380 -2250 0 100 ""] ( Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C603" "1uF" 163100 119726 -14248 -2900 0 100 ""] +Element["" "0402" "C603" "1uF" 186074 187100 2900 -14248 3 100 ""] ( - Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square"] - Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] + Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] ) @@ -1590,80 +1460,6 @@ Element["" "0402" "C36" "0.1uF" 133174 76100 -3898 -7750 0 100 ""] ) -Element["" "lqfp64" "U7" "CPU" 191316 136064 21268 15552 0 100 ""] -( - Pad[-24408 14763 -20865 14763 1181 787 1811 "PA2/USART2_TX/ADC_IN2/TIM2_CH3/TIM9_CH1/SEG1" "16" "square"] - Pad[20866 14763 24409 14763 1181 787 1811 "PB12/SPI2_NSS/I2C2_SMBA/USART3_CKI/ADC_IN18/TIM10_CH1/SEG12" "33" "square,edge2"] - Pad[-14763 -24409 -14763 -20866 1181 787 1811 "VDD3" "64" "square"] - Pad[-14763 20865 -14763 24408 1181 787 1811 "PA3/USART2_RX/ADC_IN3/TIM2_CH4/TIM9_CH2/SEG2" "17" "square,edge2"] - Pad[-24408 12794 -20865 12794 1181 787 1811 "PA1/USART2_RTS/ADC_IN1/TIM2_CH2/SEG0" "15" "square"] - Pad[20866 12794 24409 12794 1181 787 1811 "PB13/SPI2_SCK/USART3_CTS/ADC_IN19/TIM9_CH1/SEG13" "34" "square,edge2"] - Pad[-12794 -24409 -12794 -20866 1181 787 1811 "VSS3" "63" "square"] - Pad[-12794 20865 -12794 24408 1181 787 1811 "VSS4" "18" "square,edge2"] - Pad[-24408 10826 -20865 10826 1181 787 1811 "PA0/WKUP1/USART2_CTS/ADC_IN0/TIM2_CH1_ETR" "14" "square"] - Pad[20866 10826 24409 10826 1181 787 1811 "PB14/SPI2_MISO/USART3_RTS/ADC_IN20/TIM9_CH2/SEG14" "35" "square,edge2"] - Pad[-10826 -24409 -10826 -20866 1181 787 1811 "PB9/TIM4_CH4/I2C1_SDA/TIM11_CH1/COM3" "62" "square"] - Pad[-10826 20865 -10826 24408 1181 787 1811 "VDD4" "19" "square,edge2"] - Pad[-24408 8857 -20865 8857 1181 787 1811 "VDDA" "13" "square"] - Pad[20866 8857 24409 8857 1181 787 1811 "PB15/SPI2_MOSI/ADC_IN21/TIM11_CH1/RTC_50_60HZ/SEG15" "36" "square,edge2"] - Pad[-8857 -24409 -8857 -20866 1181 787 1811 "PB8/TIM4_CH3/I2C1_SCL/TIM10_CH1/SEG16" "61" "square"] - Pad[-8857 20865 -8857 24408 1181 787 1811 "PA4/SPI1_NSS/USART2_CK/ADC_IN4/DAC_OUT1" "20" "square,edge2"] - Pad[-24408 6889 -20865 6889 1181 787 1811 "VSSA" "12" "square"] - Pad[20866 6889 24409 6889 1181 787 1811 "PC6/TIM3_CH1/SEG24" "37" "square,edge2"] - Pad[-6889 -24409 -6889 -20866 1181 787 1811 "BOOT0" "60" "square"] - Pad[-6889 20865 -6889 24408 1181 787 1811 "PA5/SPI1_SCK/ADC_IN5/DAC_OUT2/TIM2_CH1_ETR" "21" "square,edge2"] - Pad[-24408 4920 -20865 4920 1181 787 1811 "PC3/ADC_IN13/SEG21" "11" "square"] - Pad[20866 4920 24409 4920 1181 787 1811 "PC7/TIM3_CH2/SEG25" "38" "square,edge2"] - Pad[-4920 -24409 -4920 -20866 1181 787 1811 "PB7/I2C1_SDA/TIM4_CH2/USART1_RX/PVD_IN" "59" "square"] - Pad[-4920 20865 -4920 24408 1181 787 1811 "PA6/SPI1_MISO_ADC_IN6/TIM3_CH1/TIM10_CH1/SEG3" "22" "square,edge2"] - Pad[-24408 2952 -20865 2952 1181 787 1811 "PC2/ADC_IN12/SEG20" "10" "square"] - Pad[20866 2952 24409 2952 1181 787 1811 "PC8/TIM3_CH3/SEG26" "39" "square,edge2"] - Pad[-2952 -24409 -2952 -20866 1181 787 1811 "PB6/I2C1_SCL/TIM4_CH1/USART1_TX" "58" "square"] - Pad[-2952 20865 -2952 24408 1181 787 1811 "PA7/SPI1_MOSI/ADC_IN7/TIM3_CH2/TIM11_CH1/SEG4" "23" "square,edge2"] - Pad[-24408 983 -20865 983 1181 787 1811 "PC1/ADC_IN11/SEG19" "9" "square"] - Pad[20866 983 24409 983 1181 787 1811 "PC9/TIM3_CH4/SEG27" "40" "square,edge2"] - Pad[-983 -24409 -983 -20866 1181 787 1811 "PB5/I2C1_SMBA/TIM3_CH2/SPI1_MOSI/SEG9" "57" "square"] - Pad[-983 20865 -983 24408 1181 787 1811 "PC4/ADC_IN14/SEG22" "24" "square,edge2"] - Pad[-24408 -984 -20865 -984 1181 787 1811 "PC0/ADC_IN10/SEG18" "8" "square"] - Pad[20866 -984 24409 -984 1181 787 1811 "PA8/USART1_CK/MCO/COM0" "41" "square,edge2"] - Pad[984 -24409 984 -20866 1181 787 1811 "PB4/JNTRSTSPI1_MISO/TIM3_CH1/SEG8" "56" "square"] - Pad[984 20865 984 24408 1181 787 1811 "PC5/ADC_IN15/SEG23" "25" "square,edge2"] - Pad[-24408 -2953 -20865 -2953 1181 787 1811 "NRST" "7" "square"] - Pad[20866 -2953 24409 -2953 1181 787 1811 "PA9/USART1_TX/COM1" "42" "square,edge2"] - Pad[2953 -24409 2953 -20866 1181 787 1811 "PB3/JTDO/TIM2_CH2/TRACESWO/SPI1_SCK/SEG7" "55" "square"] - Pad[2953 20865 2953 24408 1181 787 1811 "PB0/ADC_IN8/TIM3_CH3/VREF_OUT/SEG5" "26" "square,edge2"] - Pad[-24408 -4921 -20865 -4921 1181 787 1811 "PH1/OSC_OUT" "6" "square"] - Pad[20866 -4921 24409 -4921 1181 787 1811 "PA10/USART1_RX/COM2" "43" "square,edge2"] - Pad[4921 -24409 4921 -20866 1181 787 1811 "PD2/TIM3_ETR/COM7/SEG31/SEG43" "54" "square"] - Pad[4921 20865 4921 24408 1181 787 1811 "PB1/ADC_IN9/TIM3_CH4/VREF_OUT/SEG6" "27" "square,edge2"] - Pad[-24408 -6890 -20865 -6890 1181 787 1811 "PH0/OSC_IN" "5" "square"] - Pad[20866 -6890 24409 -6890 1181 787 1811 "PA11/USART1_CTS/USBDM/SPI1_MISO" "44" "square,edge2"] - Pad[6890 -24409 6890 -20866 1181 787 1811 "PC12/USART3_CK/COM6/SEG30/SEG42" "53" "square"] - Pad[6890 20865 6890 24408 1181 787 1811 "PB2/BOOT1" "28" "square,edge2"] - Pad[-24408 -8858 -20865 -8858 1181 787 1811 "PC15/OSC32_OUT" "4" "square"] - Pad[20866 -8858 24409 -8858 1181 787 1811 "PA12/USART1_RTS/USBDP/SPI1_MOSI" "45" "square,edge2"] - Pad[8858 -24409 8858 -20866 1181 787 1811 "PC11/USART3_RX/COM5/SEG29/SEG41" "52" "square"] - Pad[8858 20865 8858 24408 1181 787 1811 "PB10/I2C2_SCL/USART3_TX/TIM2_CH3/SEG10" "29" "square,edge2"] - Pad[-24408 -10827 -20865 -10827 1181 787 1811 "PC14/OSC32_IN" "3" "square"] - Pad[20866 -10827 24409 -10827 1181 787 1811 "PA13/JTMS/SWDIO" "46" "square,edge2"] - Pad[10827 -24409 10827 -20866 1181 787 1811 "PC10/USART3_TX/COM4/SEG28/SEG40" "51" "square"] - Pad[10827 20865 10827 24408 1181 787 1811 "PB11/I2C2_SDA/USART3_RX/TIM2_CH4/SEG11" "30" "square,edge2"] - Pad[-24408 -12795 -20865 -12795 1181 787 1811 "PC13/RTC_AF1/WKUP2" "2" "square"] - Pad[20866 -12795 24409 -12795 1181 787 1811 "VSS2" "47" "square,edge2"] - Pad[12795 -24409 12795 -20866 1181 787 1811 "PA15/JTDI/TIM2_CH1_ETR/SPI1_NSS/SEG17" "50" "square"] - Pad[12795 20865 12795 24408 1181 787 1811 "VSS1" "31" "square,edge2"] - Pad[-24408 -14764 -20865 -14764 1181 787 1811 "VLCD" "1" "square"] - Pad[20866 -14764 24409 -14764 1181 787 1811 "VDD2" "48" "square,edge2"] - Pad[14764 -24409 14764 -20866 1181 787 1811 "PA14/JTCK/SWCLK" "49" "square"] - Pad[14764 20865 14764 24408 1181 787 1811 "VDD1" "32" "square,edge2"] - ElementLine [-19684 19684 19685 19684 1000] - ElementLine [19685 -19685 19685 19684 1000] - ElementLine [-19684 -19685 19685 -19685 1000] - ElementLine [-19684 -19685 -19684 19684 1000] - ElementArc [-20865 -20866 500 500 90 360 1000] - - ) - Element["onsolder" "100mil-led3" "D2" "red/green" 307500 12500 22600 -2900 2 100 "auto"] ( Pin[-10000 0 7000 1500 8500 3500 "Red" "1" "square,edge2"] @@ -1959,10 +1755,10 @@ Element["" "0402" "L2" "22nH" 29848 130762 -2758 8891 1 100 ""] ) -Element["" "0402" "C12" "0.1uF" 81742 142287 -2990 -12725 0 100 ""] +Element["" "0402" "C12" "0.1uF" 82700 122200 -5435 -8596 0 100 ""] ( - Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] - Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] + Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] ) @@ -2006,98 +1802,98 @@ Element["" "100mil3pin.fp" "J2" "none" 7800 59900 -2400 -33800 0 100 ""] ) -Element["" "0402" "R109" "330" 87300 148600 -6324 1850 0 100 ""] +Element["" "0402" "R109" "330" 72474 183100 -6324 1850 0 100 ""] ( Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C109" "47pF" 87326 144500 -2950 -8850 0 100 ""] +Element["" "0402" "C109" "47pF" 80526 193900 -2950 -8850 0 100 ""] ( Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "R105" "330" 123526 154200 -324 -7650 0 100 ""] +Element["" "0402" "R105" "330" 93100 131500 -324 -7650 0 100 ""] ( Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "R106" "330" 123526 158100 -624 1650 0 100 ""] +Element["" "0402" "R106" "330" 93100 135400 -624 1650 0 100 ""] ( Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "R107" "330" 84626 160900 -7024 7250 0 100 ""] +Element["" "0402" "R107" "330" 83100 144800 -8850 9250 0 100 ""] ( Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "R108" "330" 106426 160900 -6824 7550 0 100 ""] +Element["" "0402" "R108" "330" 88100 148800 -5024 10950 0 100 ""] ( Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C105" "47pF" 116926 154200 -7150 -7728 0 100 ""] +Element["" "0402" "C105" "47pF" 88100 129926 -1324 -12454 0 100 ""] ( - Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] - Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C106" "47pF" 116900 158100 -6624 1350 0 100 ""] +Element["" "0402" "C106" "47pF" 88100 136974 -13124 4824 1 100 ""] ( - Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] - Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C107" "47pF" 90826 160900 -6672 1850 0 100 ""] +Element["" "0402" "C107" "47pF" 88100 143174 2054 -1224 0 100 ""] ( - Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] - Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C108" "47pF" 100126 160900 -3150 1950 0 100 ""] +Element["" "0402" "C108" "47pF" 83100 150274 -11624 9276 0 100 ""] ( - Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] - Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C604" "0.1uF" 178500 165000 3676 -3350 0 100 ""] +Element["" "0402" "C604" "0.1uF" 192300 185200 17524 -11098 3 100 ""] ( Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C605" "0.1uF" 209300 161374 3082 -3004 0 100 ""] +Element["" "0402" "C605" "0.1uF" 238900 164726 3082 -3004 0 100 ""] ( Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C606" "0.1uF" 219600 118400 -3424 -8750 0 100 ""] +Element["" "0402" "C606" "0.1uF" 232126 114800 -4550 -7724 0 100 ""] ( - Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] - Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] + Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] ) -Element["" "0402" "C607" "0.1uF" 173100 109726 -12698 -9176 0 100 ""] +Element["" "0402" "C607" "0.1uF" 171500 109800 -12698 -9176 0 100 ""] ( Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square"] Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"] @@ -2118,152 +1914,167 @@ Element["" "282834-6" "J9" "switch_connector" 350194 340605 0 0 0 100 ""] ElementLine [61811 0 0 0 600] ) + +Element["" "lqfp100" "U7" "unknown" 198400 145300 -35900 -29400 1 100 ""] +( + Pad[23621 28739 23621 32282 1181 787 1811 "PA2/USART2_TX/ADC_IN2/TIM2_CH3/TIM9_CH1/SEG1" "25" "square,edge2"] + Pad[23621 -32283 23621 -28740 1181 787 1811 "PB12/SPI2_NSS/I2C2_SMBA/USART3_CKI/ADC_IN18/TIM10_CH1/SEG12" "51" "square"] + Pad[-32283 23621 -28740 23621 1181 787 1811 "VDD3" "100" "square"] + Pad[28739 23621 32282 23621 1181 787 1811 "PA3/USART2_RX/ADC_IN3/TIM2_CH4/TIM9_CH2/SEG2" "26" "square,edge2"] + Pad[21653 28739 21653 32282 1181 787 1811 "PA1/USART2_RTS/ADC_IN1/TIM2_CH2/SEG0" "24" "square,edge2"] + Pad[21653 -32283 21653 -28740 1181 787 1811 "PB13/SPI2_SCK/USART3_CTS/ADC_IN19/TIM9_CH1/SEG13" "52" "square"] + Pad[-32283 21653 -28740 21653 1181 787 1811 "VSS3" "99" "square"] + Pad[28739 21653 32282 21653 1181 787 1811 "VSS4" "27" "square,edge2"] + Pad[19684 28739 19684 32282 1181 787 1811 "PA0/WKUP1/USART2_CTS/ADC_IN0/TIM2_CH1_ETR" "23" "square,edge2"] + Pad[19684 -32283 19684 -28740 1181 787 1811 "PB14/SPI2_MISO/USART3_RTS/ADC_IN20/TIM9_CH2/SEG14" "53" "square"] + Pad[-32283 19684 -28740 19684 1181 787 1811 "PE1/TIM11_CH1/SEG37" "98" "square"] + Pad[28739 19684 32282 19684 1181 787 1811 "VDD4" "28" "square,edge2"] + Pad[17716 28739 17716 32282 1181 787 1811 "VDDA" "22" "square,edge2"] + Pad[17716 -32283 17716 -28740 1181 787 1811 "PB15/SPI2_MOSI/ADC_IN21/TIM11_CH1/RTC_50_60HZ/SEG15" "54" "square"] + Pad[-32283 17716 -28740 17716 1181 787 1811 "PE0/TIM4_ETR/TIM10_CH1/SEG36" "97" "square"] + Pad[28739 17716 32282 17716 1181 787 1811 "PA4/SPI1_NSS/USART2_CK/ADC_IN4/DAC_OUT1" "29" "square,edge2"] + Pad[15747 28739 15747 32282 1181 787 1811 "VREF+" "21" "square,edge2"] + Pad[15747 -32283 15747 -28740 1181 787 1811 "PD8/USART3_TX/SEG28" "55" "square"] + Pad[-32283 15747 -28740 15747 1181 787 1811 "PB9/TIM4_CH4/I2C1_SDA/TIM11_CH1/COM3" "96" "square"] + Pad[28739 15747 32282 15747 1181 787 1811 "PA5/SPI1_SCK/ADC_IN5/DAC_OUT2/TIM2_CH1_ETR" "30" "square,edge2"] + Pad[13779 28739 13779 32282 1181 787 1811 "VREF-" "20" "square,edge2"] + Pad[13779 -32283 13779 -28740 1181 787 1811 "PD9/USART3_RX/SEG29" "56" "square"] + Pad[-32283 13779 -28740 13779 1181 787 1811 "PB8/TIM4_CH3/I2C1_SCL/TIM10_CH1/SEG16" "95" "square"] + Pad[28739 13779 32282 13779 1181 787 1811 "PA6/SPI1_MISO_ADC_IN6/TIM3_CH1/TIM10_CH1/SEG3" "31" "square,edge2"] + Pad[11810 28739 11810 32282 1181 787 1811 "VSSA" "19" "square,edge2"] + Pad[11810 -32283 11810 -28740 1181 787 1811 "PD10/USART3_CK/SEG30" "57" "square"] + Pad[-32283 11810 -28740 11810 1181 787 1811 "BOOT0" "94" "square"] + Pad[28739 11810 32282 11810 1181 787 1811 "PA7/SPI1_MOSI/ADC_IN7/TIM3_CH2/TIM11_CH1/SEG4" "32" "square,edge2"] + Pad[9842 28739 9842 32282 1181 787 1811 "PC3/ADC_IN13/SEG21" "18" "square,edge2"] + Pad[9842 -32283 9842 -28740 1181 787 1811 "PD11/USART3_CTS/SEG31" "58" "square"] + Pad[-32283 9842 -28740 9842 1181 787 1811 "PB7/I2C1_SDA/TIM4_CH2/USART1_RX/PVD_IN" "93" "square"] + Pad[28739 9842 32282 9842 1181 787 1811 "PC4/ADC_IN14/SEG22" "33" "square,edge2"] + Pad[7873 28739 7873 32282 1181 787 1811 "PC2/ADC_IN12/SEG20/COMP1_INP" "17" "square,edge2"] + Pad[7873 -32283 7873 -28740 1181 787 1811 "PD12/TIM4_CH1/USART3_RTS/SEG32" "59" "square"] + Pad[-32283 7873 -28740 7873 1181 787 1811 "PB6/I2C1_SCL/TIM4_CH1/USART1_TX" "92" "square"] + Pad[28739 7873 32282 7873 1181 787 1811 "PC5/ADC_IN15/SEG23" "34" "square,edge2"] + Pad[5905 28739 5905 32282 1181 787 1811 "PC1/ADC_IN11/SEG19/COMP1_INP" "16" "square,edge2"] + Pad[5905 -32283 5905 -28740 1181 787 1811 "PD13/TIM4_CH2/SEG33" "60" "square"] + Pad[-32283 5905 -28740 5905 1181 787 1811 "PB5/I2C1_SMBA/TIM3_CH2/SPI1_MOSI/SEG9" "91" "square"] + Pad[28739 5905 32282 5905 1181 787 1811 "PB0/ADC_IN8/TIM3_CH3/VREF_OUT/SEG5" "35" "square,edge2"] + Pad[3936 28739 3936 32282 1181 787 1811 "PC0/ADC_IN10/SEG18/COMP1_INP" "15" "square,edge2"] + Pad[3936 -32283 3936 -28740 1181 787 1811 "PD14_TIM4_CH3/SEG34" "61" "square"] + Pad[-32283 3936 -28740 3936 1181 787 1811 "PB4/JNTRSTSPI1_MISO/TIM3_CH1/SEG8" "90" "square"] + Pad[28739 3936 32282 3936 1181 787 1811 "PB1/ADC_IN9/TIM3_CH4/VREF_OUT/SEG6" "36" "square,edge2"] + Pad[1968 28739 1968 32282 1181 787 1811 "NRST" "14" "square,edge2"] + Pad[1968 -32283 1968 -28740 1181 787 1811 "PD15/TIM4_CH4/SEG35" "62" "square"] + Pad[-32283 1968 -28740 1968 1181 787 1811 "PB3/JTDO/TIM2_CH2/TRACESWO/SPI1_SCK/SEG7" "89" "square"] + Pad[28739 1968 32282 1968 1181 787 1811 "PB2/BOOT1" "37" "square,edge2"] + Pad[0 28739 0 32282 1181 787 1811 "PH1/OSC_OUT" "13" "square,edge2"] + Pad[0 -32283 0 -28740 1181 787 1811 "PC6/TIM3_CH1/SEG24" "63" "square"] + Pad[-32283 0 -28740 0 1181 787 1811 "PD7/USART2_CK/TIM9_CH2" "88" "square"] + Pad[28739 0 32282 0 1181 787 1811 "PE7/ADC_IN22" "38" "square,edge2"] + Pad[-1969 28739 -1969 32282 1181 787 1811 "PH0/OSC_IN" "12" "square,edge2"] + Pad[-1969 -32283 -1969 -28740 1181 787 1811 "PC7/TIM3_CH2/SEG25" "64" "square"] + Pad[-32283 -1969 -28740 -1969 1181 787 1811 "PD6/USART2_RX" "87" "square"] + Pad[28739 -1969 32282 -1969 1181 787 1811 "PE8/ADC_IN23" "39" "square,edge2"] + Pad[-3937 28739 -3937 32282 1181 787 1811 "VDD5" "11" "square,edge2"] + Pad[-3937 -32283 -3937 -28740 1181 787 1811 "PC8/TIM3_CH3/SEG26" "65" "square"] + Pad[-32283 -3937 -28740 -3937 1181 787 1811 "PD5/USART2_TX" "86" "square"] + Pad[28739 -3937 32282 -3937 1181 787 1811 "PE9/ADC_IN24/TIM2_CH1_ETR" "40" "square,edge2"] + Pad[-5906 28739 -5906 32282 1181 787 1811 "VSS5" "10" "square,edge2"] + Pad[-5906 -32283 -5906 -28740 1181 787 1811 "PC9/TIM3_CH4/SEG27" "66" "square"] + Pad[-32283 -5906 -28740 -5906 1181 787 1811 "PD4_USART2_RTS/SPI2_MOSI" "85" "square"] + Pad[28739 -5906 32282 -5906 1181 787 1811 "PE10/ADC_IN25/TIM2_CH2" "41" "square,edge2"] + Pad[-7874 28739 -7874 32282 1181 787 1811 "PC15/OSC32_OUT" "9" "square,edge2"] + Pad[-7874 -32283 -7874 -28740 1181 787 1811 "PA8/USART1_CK/MCO" "67" "square"] + Pad[-32283 -7874 -28740 -7874 1181 787 1811 "PD3/USART2_CTS/SPI2_MISO" "84" "square"] + Pad[28739 -7874 32282 -7874 1181 787 1811 "PE11/TIM2_CH3" "42" "square,edge2"] + Pad[-9843 28739 -9843 32282 1181 787 1811 "PC14/OSC32_IN" "8" "square,edge2"] + Pad[-9843 -32283 -9843 -28740 1181 787 1811 "PA9/USART1_TX" "68" "square"] + Pad[-32283 -9843 -28740 -9843 1181 787 1811 "PD2/TIM3_ETR/SEG31/SEG43/COM7" "83" "square"] + Pad[28739 -9843 32282 -9843 1181 787 1811 "PE12/TIM2_CH4/SPI1_NSS" "43" "square,edge2"] + Pad[-11811 28739 -11811 32282 1181 787 1811 "PC13/RTC_AF1/WKUP2" "7" "square,edge2"] + Pad[-11811 -32283 -11811 -28740 1181 787 1811 "PA10/USART1_RX" "69" "square"] + Pad[-32283 -11811 -28740 -11811 1181 787 1811 "PD1/SPI2_SCK" "82" "square"] + Pad[28739 -11811 32282 -11811 1181 787 1811 "PE13/SPI1_SCK" "44" "square,edge2"] + Pad[-13780 28739 -13780 32282 1181 787 1811 "VLCD" "6" "square,edge2"] + Pad[-13780 -32283 -13780 -28740 1181 787 1811 "PA11/USART1_CTS/USBDM/SPI1_MISO" "70" "square"] + Pad[-32283 -13780 -28740 -13780 1181 787 1811 "PD0/SPI2_NSS/TIM9_CH1" "81" "square"] + Pad[28739 -13780 32282 -13780 1181 787 1811 "PE14/SPI1_MISO" "45" "square,edge2"] + Pad[-15748 28739 -15748 32282 1181 787 1811 "PE6/TRACED3/WKUP3/TIM9_CH2" "5" "square,edge2"] + Pad[-15748 -32283 -15748 -28740 1181 787 1811 "PA12/USART1_RTS/USBDP/SPI1_MOSI" "71" "square"] + Pad[-32283 -15748 -28740 -15748 1181 787 1811 "PC12/USART3_CK/SEG30/SEG42/COM6" "80" "square"] + Pad[28739 -15748 32282 -15748 1181 787 1811 "PE15/SPI1_MOSI" "46" "square,edge2"] + Pad[-17717 28739 -17717 32282 1181 787 1811 "PE5/TRACED2/TIM9_CH1" "4" "square,edge2"] + Pad[-17717 -32283 -17717 -28740 1181 787 1811 "PA13/JTMS/SWDIO" "72" "square"] + Pad[-32283 -17717 -28740 -17717 1181 787 1811 "PC11/USART3_RX/SEG29/SEG41/COM5" "79" "square"] + Pad[28739 -17717 32282 -17717 1181 787 1811 "PB10/I2C2_SCL/USART3_TX/TIM2_CH3/SEG10" "47" "square,edge2"] + Pad[-19685 28739 -19685 32282 1181 787 1811 "PE4/TRACED1/TIM3_CH2" "3" "square,edge2"] + Pad[-19685 -32283 -19685 -28740 1181 787 1811 "PH2/I2C2_SMBA" "73" "square"] + Pad[-32283 -19685 -28740 -19685 1181 787 1811 "PC10/USART3_TX/SEG40/COM4" "78" "square"] + Pad[28739 -19685 32282 -19685 1181 787 1811 "PB11/I2C2_SDA/USART3_RX/TIM2_CH4/SEG11" "48" "square,edge2"] + Pad[-21654 28739 -21654 32282 1181 787 1811 "PE3/TRACED0/SEG39/TIM3_CH1" "2" "square,edge2"] + Pad[-21654 -32283 -21654 -28740 1181 787 1811 "VSS2" "74" "square"] + Pad[-32283 -21654 -28740 -21654 1181 787 1811 "PA15/JTDI/TIM2_CH1_ETR/SPI1_NSS/SEG17" "77" "square"] + Pad[28739 -21654 32282 -21654 1181 787 1811 "VSS1" "49" "square,edge2"] + Pad[-23622 28739 -23622 32282 1181 787 1811 "PE2/TRACECK/SEG38/TIM3_ETR" "1" "square,edge2"] + Pad[-23622 -32283 -23622 -28740 1181 787 1811 "VDD2" "75" "square"] + Pad[-32283 -23622 -28740 -23622 1181 787 1811 "PA14/JTCK/SWCLK" "76" "square"] + Pad[28739 -23622 32282 -23622 1181 787 1811 "VDD1" "50" "square,edge2"] + ElementLine [27558 -27559 27558 27558 1000] + ElementLine [-27559 -27559 27558 -27559 1000] + ElementLine [-27559 -27559 -27559 27558 1000] + ElementLine [-27559 27558 27558 27558 1000] + ElementArc [-28740 28739 500 500 180 360 1000] + + ) +Rat[228900 164984 0 227007 197800 0 ""] +Rat[227007 197800 0 310800 244600 0 ""] +Rat[192000 256500 0 178715 177582 0 ""] +Rat[144500 153207 0 166117 157110 0 ""] +Rat[198200 264100 1 166117 164984 0 ""] +Rat[198200 260500 1 166117 163016 0 ""] +Rat[190526 113017 0 129700 37900 1 ""] +Rat[190526 113017 0 129500 237100 0 ""] +Rat[48300 27900 1 74100 59900 0 ""] +Rat[195600 256500 0 180683 177582 0 ""] +Rat[134748 75707 0 1000 1000 1 "via"] +Rat[82707 151848 0 1000 1000 1 "via"] +Rat[78952 193507 0 1000 1000 1 "via"] +Rat[239048 136407 0 1000 1000 1 "via"] +Rat[141352 153207 0 1000 1000 1 "via"] +Rat[135500 90800 0 1000 1000 1 "via"] +Rat[327207 15648 0 194463 113017 0 ""] +Rat[284007 15648 0 196431 113017 0 ""] +Rat[22700 264300 0 176746 177582 0 ""] +Rat[122500 266900 0 174778 177582 0 ""] +Rat[70900 182707 0 65104 143457 0 ""] +Rat[200368 175810 0 139400 82000 0 ""] +Rat[139400 82000 0 174200 17800 1 ""] +Rat[174200 17800 1 164000 7600 0 ""] +Rat[139400 82000 0 61167 143457 0 ""] +Rat[334450 237100 0 344450 237100 1 ""] +Rat[166117 123646 0 49500 37900 1 ""] +Rat[49500 37900 1 39500 37900 1 ""] +Rat[329600 274200 0 218084 177582 0 ""] +Rat[184200 17800 1 166117 121678 0 ""] +Rat[179200 27800 1 180683 113017 0 ""] +Rat[198400 113017 0 215615 267715 0 ""] +Rat[235900 136407 0 230682 147268 0 ""] +Rat[297500 12500 1 284007 12500 0 ""] +Rat[317500 12500 1 327207 12500 0 ""] +Rat[186174 257107 0 186589 177582 0 ""] +Rat[147548 257107 0 166117 129552 0 ""] +Rat[114874 257107 0 166117 127583 0 ""] +Rat[81474 257107 0 166117 125615 0 ""] +Rat[48700 257107 0 192494 113017 0 ""] +Rat[325200 245807 0 184620 113017 0 ""] +Rat[358852 248407 0 182652 113017 0 ""] +Rat[70000 12500 1 74307 50726 0 ""] +Rat[104900 12500 1 84107 50726 0 ""] +Rat[82100 193507 0 74048 182707 0 ""] +Rat[82100 193507 0 188557 177582 0 ""] +Rat[329300 267300 0 328348 245807 0 ""] +Rat[391500 265700 0 362000 248407 0 ""] +Rat[214648 185100 0 227007 194652 0 ""] Layer(1 "top") ( - Line[118500 104300 119700 103100 1000 2000 "clearline"] - Line[118500 139800 118500 104300 1000 2000 "clearline"] - Line[116850 104250 115700 103100 1000 2000 "clearline"] - Line[116850 140450 116850 104250 1000 2000 "clearline"] - Line[134300 150200 134500 150200 1000 2000 "clearline"] - Line[118500 93700 119700 94900 1000 2000 "clearline"] - Line[118500 66900 118500 93700 1000 2000 "clearline"] - Line[116950 93650 115700 94900 1000 2000 "clearline"] - Line[116950 67650 116950 93650 1000 2000 "clearline"] - Line[175600 182800 179400 186600 1000 2000 "clearline"] - Line[179600 186600 179400 186600 1000 2000 "clearline"] - Line[179500 182200 178450 181150 1000 2000 "clearline"] - Line[179600 182200 179500 182200 1000 2000 "clearline"] - Line[179600 177800 177400 177800 1000 2000 "clearline"] - Line[177400 177800 157600 158000 1000 2000 "clearline"] - Line[176800 173500 176600 173300 1000 2000 "clearline"] - Line[178100 173500 176800 173500 1000 2000 "clearline"] - Line[176700 173400 159700 156400 1000 2000 "clearline"] - Line[129500 237100 119500 237100 1000 2000 "clearline"] - Line[176300 228100 180600 223800 1000 2000 "clearline"] - Line[129500 228100 176300 228100 1000 2000 "clearline"] - Line[174000 181200 174000 185700 1000 2000 "clearline"] - Line[287000 253900 294400 246500 1000 2000 "clearline"] - Line[189800 253900 287000 253900 1000 2000 "clearline"] - Line[186200 257500 189800 253900 1000 2000 "clearline"] - Line[186174 257500 186200 257500 1000 2000 "clearline"] - Line[278600 252300 284400 246500 1000 2000 "clearline"] - Line[181700 252300 278600 252300 1000 2000 "clearline"] - Line[179700 250300 181700 252300 1000 2000 "clearline"] - Line[154800 250300 179700 250300 1000 2000 "clearline"] - Line[147600 257500 154800 250300 1000 2000 "clearline"] - Line[147548 257500 147600 257500 1000 2000 "clearline"] - Line[270200 250700 274400 246500 1000 2000 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Line[115900 230700 117000 230700 1000 2000 "clearline"] - Line[109500 237100 99500 237100 1000 2000 "clearline"] - Line[303200 230700 116900 230700 1000 2000 "clearline"] - Line[89500 237100 79500 237100 1000 2000 "clearline"] - Line[93300 233300 89500 237100 1000 2000 "clearline"] - Line[235650 233300 93300 233300 1000 2000 "clearline"] - Line[69500 237100 59500 237100 1000 2000 "clearline"] - Line[73750 241350 69500 237100 1000 2000 "clearline"] - Line[198350 241350 73750 241350 1000 2000 "clearline"] - Line[49500 237100 39500 237100 1000 2000 "clearline"] - Line[56300 243900 49500 237100 1000 2000 "clearline"] - Line[209700 243900 56300 243900 1000 2000 "clearline"] - Line[304800 243900 209400 243900 1000 2000 "clearline"] - Line[175600 180500 156300 161200 1000 2000 "clearline"] - Line[175600 182800 175600 180500 1000 2000 "clearline"] - Line[178500 181200 156900 159600 1000 2000 "clearline"] - Line[201800 55600 201800 87700 1000 2000 "clearline"] - Line[119500 37900 129500 37900 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1000 2000 "clearline"] - Line[69400 37900 74800 32500 1000 2000 "clearline"] - Line[109500 37900 99500 37900 1000 2000 "clearline"] - Line[255650 34100 259450 37900 1000 2000 "clearline"] - Line[113300 34100 255650 34100 1000 2000 "clearline"] - Line[109500 37900 113300 34100 1000 2000 "clearline"] - Line[235650 41700 239450 37900 1000 2000 "clearline"] - Line[93300 41700 235650 41700 1000 2000 "clearline"] - Line[229500 31500 235900 31500 1000 2000 "clearline"] - Line[334450 37900 344450 37900 1000 2000 "clearline"] - Line[328100 44300 215850 44300 1000 2000 "clearline"] - Line[253250 41700 249450 37900 1000 2000 "clearline"] - Line[370700 41700 253250 41700 1000 2000 "clearline"] - Line[354450 37900 364450 37900 1000 2000 "clearline"] - Line[348700 31500 235850 31500 1000 2000 "clearline"] - Line[249450 37900 239450 37900 1000 2000 "clearline"] - Line[374450 37950 370700 41700 1000 2000 "clearline"] - Line[374450 37900 374450 37950 1000 2000 "clearline"] - Line[384450 37900 374450 37900 1000 2000 "clearline"] - Line[394450 37900 404450 37900 1000 2000 "clearline"] - Line[390650 34100 394450 37900 1000 2000 "clearline"] - Line[273200 34100 390650 34100 1000 2000 "clearline"] - Line[269450 37850 273200 34100 1000 2000 "clearline"] - Line[269450 37900 269450 37850 1000 2000 "clearline"] - Line[259450 37900 269450 37900 1000 2000 "clearline"] - Line[69500 37900 59500 37900 1000 2000 "clearline"] - Line[73400 41800 69500 37900 1000 2000 "clearline"] - Line[91100 41800 73400 41800 1000 2000 "clearline"] - Line[131221 154821 116900 140500 1000 2000 "clearline"] - Line[89500 37900 79500 37900 1000 2000 "clearline"] - Line[131553 152853 118500 139800 1000 2000 "clearline"] - Line[334450 237100 344450 237100 1000 2000 "clearline"] - Line[304800 243900 305800 244900 1000 2000 "clearline"] - Line[305800 241300 304600 241300 1000 2000 "clearline"] - Line[354450 237100 364450 237100 1000 2000 "clearline"] - Line[350250 241300 354450 237100 1000 2000 "clearline"] - Line[317300 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241300 1000 2000 "clearline"] - Line[199450 237100 209450 237100 1000 2000 "clearline"] - Line[279450 37900 289450 37900 1000 2000 "clearline"] - Line[279500 37950 279450 37900 1000 2000 "clearline"] - Line[424450 237100 414450 237100 1000 2000 "clearline"] - Line[414450 37900 424450 37900 1000 2000 "clearline"] Line[330000 265700 314700 250400 1000 2000 "clearline"] Line[391500 265700 330000 265700 1000 2000 "clearline"] Line[401000 275200 391500 265700 1000 2000 "clearline"] @@ -2328,22 +2139,6 @@ Layer(1 "top") Line[413300 290000 415300 290000 2500 2000 "clearline"] Line[418242 300058 413300 305000 1000 2000 "clearline"] Line[432000 300058 418242 300058 1000 2000 "clearline"] - Line[134500 131200 134400 131300 1000 2000 "clearline"] - Line[168690 131200 134500 131200 1000 2000 "clearline"] - Line[132853 122900 124953 115000 1000 2000 "clearline"] - Line[136400 122900 132853 122900 1000 2000 "clearline"] - Line[142731 129231 136400 122900 1000 2000 "clearline"] - Line[168690 129231 142731 129231 1000 2000 "clearline"] - Line[136500 104600 134400 106700 1000 2000 "clearline"] - Line[134400 135900 131000 139300 1000 2000 "clearline"] - Line[134400 130747 134400 135900 1000 2000 "clearline"] - Line[124953 107899 128252 104600 1000 2000 "clearline"] - Line[124953 115000 124953 107899 1000 2000 "clearline"] - Line[136400 104600 131400 104600 1000 2000 "clearline"] - Line[134400 115000 134400 106600 1000 2000 "clearline"] - Line[124953 137047 122700 139300 1000 2000 "clearline"] - Line[124953 130747 124953 137047 1000 2000 "clearline"] - Line[122700 139300 127852 139300 1000 2000 "clearline"] Line[22700 285100 22700 264300 1000 2000 "clearline"] Line[30500 270000 33052 270000 1000 2000 "clearline"] Line[33052 270000 45552 257500 1000 2000 "clearline"] @@ -2355,32 +2150,6 @@ Layer(1 "top") Line[132100 269800 144400 257500 1000 2000 "clearline"] Line[167500 270000 170526 270000 1000 2000 "clearline"] Line[170526 270000 183026 257500 1000 2000 "clearline"] - Line[284400 25000 284400 15648 1000 2000 "clearline"] - Line[284400 12500 297500 12500 1000 2000 "clearline"] - Line[317500 12500 327600 12500 1000 2000 "clearline"] - Line[322600 28800 322600 20648 1000 2000 "clearline"] - Line[322600 20648 327600 15648 1000 2000 "clearline"] - Line[152448 146300 152400 146348 1000 2000 "clearline"] - Line[168690 141042 150758 141042 1000 2000 "clearline"] - Line[150758 141042 149100 142700 1000 2000 "clearline"] - Line[149100 142700 149100 150300 1000 2000 "clearline"] - Line[168690 139073 150327 139073 1000 2000 "clearline"] - Line[150327 139073 145500 143900 1000 2000 "clearline"] - Line[145500 143900 145500 150300 1000 2000 "clearline"] - Line[168690 137105 149895 137105 1000 2000 "clearline"] - Line[149895 137105 141900 145100 1000 2000 "clearline"] - Line[141900 145100 141900 150300 1000 2000 "clearline"] - Line[168690 135136 149564 135136 1000 2000 "clearline"] - Line[149564 135136 138100 146600 1000 2000 "clearline"] - Line[138100 146600 138100 150300 1000 2000 "clearline"] - Line[168690 133168 147732 133168 1000 2000 "clearline"] - Line[147732 133168 147100 133800 1000 2000 "clearline"] - Line[147100 133800 140700 133800 1000 2000 "clearline"] - Line[140700 133800 131000 143500 1000 2000 "clearline"] - Line[134400 150200 134400 146900 1000 2000 "clearline"] - Line[134400 146900 131000 143500 1000 2000 "clearline"] - Line[127852 143500 126900 143500 1000 2000 "clearline"] - Line[126900 143500 122700 139300 1000 2000 "clearline"] Line[42874 291400 48026 291400 1000 2000 "clearline"] Line[48100 291474 48026 291400 1000 2000 "clearline"] Line[34274 291400 39726 291400 1000 2000 "clearline"] @@ -2414,303 +2183,10 @@ Layer(1 "top") Line[353300 295800 353200 295700 1000 2000 "clearline"] Line[353200 295700 353200 291400 1000 2000 "clearline"] Line[331800 291400 331800 289900 1000 2000 "clearline"] - Line[190200 230700 190200 214700 1000 2000 "clearline"] - Line[190200 214700 188400 212900 1000 2000 "clearline"] - Line[188400 212900 188400 158736 1000 2000 "clearline"] - Line[188400 158736 188364 158700 1000 2000 "clearline"] - Line[193000 228000 193000 214900 1000 2000 "clearline"] - Line[193000 214900 190300 212200 1000 2000 "clearline"] - Line[190300 212200 190300 158733 1000 2000 "clearline"] - Line[190300 158733 190333 158700 1000 2000 "clearline"] - Line[196700 228100 196700 215700 1000 2000 "clearline"] - Line[196700 215700 192300 211300 1000 2000 "clearline"] - Line[192300 211300 192300 158700 1000 2000 "clearline"] - Line[187400 228000 187400 214400 1000 2000 "clearline"] - Line[187400 214400 186400 213400 1000 2000 "clearline"] - Line[186400 213400 186400 158704 1000 2000 "clearline"] - Line[186400 158704 186396 158700 1000 2000 "clearline"] - Line[183800 164600 183600 164400 1000 2000 "clearline"] - Line[180200 228000 180200 226500 1000 2000 "clearline"] - Line[180200 226500 182200 224500 1000 2000 "clearline"] - Line[182200 224500 182200 174100 1000 2000 "clearline"] - Line[204111 158700 204111 169011 1000 2000 "clearline"] - Line[204111 169011 204700 169600 1000 2000 "clearline"] - Line[198206 158700 198206 169594 1000 2000 "clearline"] - Line[198206 169594 198200 169600 1000 2000 "clearline"] - Line[201348 169600 204600 169600 1000 2000 "clearline"] - Line[210900 116500 207100 120300 2500 2000 "clearline"] - Line[207100 120300 175800 120300 2500 2000 "clearline"] - Line[175800 120300 153700 98200 2500 2000 "clearline"] - Line[207200 120200 207200 150900 2500 2000 "clearline"] - Line[207200 150900 206000 152100 2500 2000 "clearline"] - Line[206080 158700 206080 152020 1000 2000 "clearline"] - Line[206080 152020 206100 152000 1000 2000 "clearline"] - Line[207200 121300 206650 120750 1000 2000 "clearline"] - Line[176553 113427 176553 120247 1000 2000 "clearline"] - Line[176553 120247 176150 120650 1000 2000 "clearline"] - Line[175200 146700 173400 144900 1000 2000 "clearline"] - Line[173400 144900 168700 144900 1000 2000 "clearline"] - Line[168700 144900 168680 144921 1000 2000 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Line[159750 152850 159300 152850 1000 2000 "clearline"] - Line[168680 150827 164123 150827 1000 2000 "clearline"] - Line[164123 150827 160100 154850 1000 2000 "clearline"] - Line[160100 154850 159500 154850 1000 2000 "clearline"] - Line[152700 163800 156600 163800 1000 2000 "clearline"] - Line[174000 181200 156600 163800 1000 2000 "clearline"] - Line[168680 121300 163100 121300 1000 2000 "clearline"] - Line[182200 173600 182200 174400 1000 2000 "clearline"] - Line[194900 173500 204500 173500 1000 2000 "clearline"] - Line[204500 173500 218000 160000 1000 2000 "clearline"] - Line[218000 160000 218000 151500 1000 2000 "clearline"] - Line[218000 151500 217300 150800 1000 2000 "clearline"] - Line[217300 150800 213980 150800 1000 2000 "clearline"] - Line[213980 150800 213954 150827 1000 2000 "clearline"] - Line[202600 177800 219600 160800 1000 2000 "clearline"] - Line[219600 160800 219600 150800 1000 2000 "clearline"] - Line[219600 150800 217700 148900 1000 2000 "clearline"] - Line[217700 148900 213996 148900 1000 2000 "clearline"] - Line[213996 148900 213954 148858 1000 2000 "clearline"] - Line[202300 180400 221200 161500 1000 2000 "clearline"] - Line[221200 161500 221200 150100 1000 2000 "clearline"] - Line[221200 150100 218000 146900 1000 2000 "clearline"] - Line[218000 146900 213964 146900 1000 2000 "clearline"] - Line[213964 146900 213954 146890 1000 2000 "clearline"] - Line[213954 144921 218321 144921 1000 2000 "clearline"] - Line[218321 144921 222800 149400 1000 2000 "clearline"] - Line[222800 149400 222800 162300 1000 2000 "clearline"] - Line[310800 252100 310800 153300 2500 2000 "clearline"] - Line[310800 153300 274000 116500 2500 2000 "clearline"] - Line[274000 116500 210900 116500 2500 2000 "clearline"] - Line[180600 120300 180600 152600 2500 2000 "clearline"] - Line[180490 158700 180490 152810 1000 2000 "clearline"] - Line[180490 152810 180600 152700 1000 2000 "clearline"] - Line[238000 113000 214000 113000 1000 2000 "clearline"] - Line[214000 113000 210900 109900 1000 2000 "clearline"] - Line[210900 109900 202143 109900 1000 2000 "clearline"] - Line[241600 113000 239000 110400 1000 2000 "clearline"] - Line[239000 110400 213700 110400 1000 2000 "clearline"] - Line[213700 110400 211600 108300 1000 2000 "clearline"] - Line[211600 108300 201300 108300 1000 2000 "clearline"] - Line[201300 108300 200200 109400 1000 2000 "clearline"] - Line[200200 109400 200200 113401 1000 2000 "clearline"] - Line[200200 113401 200174 113427 1000 2000 "clearline"] - Line[245200 113000 241000 108800 1000 2000 "clearline"] - Line[241000 108800 214300 108800 1000 2000 "clearline"] - Line[214300 108800 212200 106700 1000 2000 "clearline"] - Line[212200 106700 200600 106700 1000 2000 "clearline"] - Line[200600 106700 198200 109100 1000 2000 "clearline"] - Line[198200 109100 198200 113420 1000 2000 "clearline"] - Line[198200 113420 198206 113427 1000 2000 "clearline"] - Line[163100 118152 167148 118152 1000 2000 "clearline"] - Line[167148 118152 167500 117800 1000 2000 "clearline"] - Line[248800 113000 243000 107200 1000 2000 "clearline"] - Line[243000 107200 215100 107200 1000 2000 "clearline"] - Line[215100 107200 213000 105100 1000 2000 "clearline"] - Line[163300 113200 160600 115900 1000 2000 "clearline"] - Line[160600 115900 160600 122700 1000 2000 "clearline"] - Line[160600 122700 161200 123300 1000 2000 "clearline"] - Line[161200 123300 168648 123300 1000 2000 "clearline"] - Line[168648 123300 168680 123269 1000 2000 "clearline"] - Line[168680 125237 160837 125237 1000 2000 "clearline"] - Line[160837 125237 136100 100500 1000 2000 "clearline"] Line[225000 267715 215615 267715 1000 2000 "clearline"] Line[215615 267715 204400 256500 1000 2000 "clearline"] - Line[204400 228100 204400 221100 1000 2000 "clearline"] - Line[204400 221100 193900 210600 1000 2000 "clearline"] - Line[193900 210600 193900 187900 1000 2000 "clearline"] - Line[193900 187900 195400 186400 1000 2000 "clearline"] - Line[195400 186400 201000 186400 1000 2000 "clearline"] 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137047 222247 137047 1000 2000 "clearline"] - Line[222247 137047 226000 140800 1000 2000 "clearline"] - Line[226000 140800 226000 163700 1000 2000 "clearline"] - Line[194269 158700 194269 123669 1000 2000 "clearline"] - Line[194269 123669 194200 123600 1000 2000 "clearline"] - Line[196237 158700 196237 125163 1000 2000 "clearline"] - Line[196237 125163 197800 123600 1000 2000 "clearline"] - Line[209800 112700 206806 112700 1000 2000 "clearline"] - Line[206806 112700 206080 113427 1000 2000 "clearline"] - Line[190300 123600 190300 146900 1000 2000 "clearline"] - Line[190300 146900 184300 152900 1000 2000 "clearline"] - Line[209800 102500 208800 103500 1000 2000 "clearline"] - Line[216700 105600 211000 99900 1000 2000 "clearline"] - Line[211000 99900 208700 99900 1000 2000 "clearline"] - Line[208700 99900 206700 101900 1000 2000 "clearline"] - Line[196900 99300 196900 89100 1000 2000 "clearline"] - Line[196900 89100 197600 88400 1000 2000 "clearline"] - Line[197600 88400 197600 49800 1000 2000 "clearline"] - Line[200500 99300 198500 97300 1000 2000 "clearline"] - Line[198500 97300 198500 89800 1000 2000 "clearline"] - Line[198500 89800 199200 89100 1000 2000 "clearline"] - Line[199200 89100 199200 54500 1000 2000 "clearline"] - Line[206700 101900 195800 101900 1000 2000 "clearline"] - Line[195800 101900 194300 100400 1000 2000 "clearline"] - Line[194300 100400 194300 98200 1000 2000 "clearline"] - Line[194300 98200 195300 97200 1000 2000 "clearline"] - Line[195300 97200 195300 88400 1000 2000 "clearline"] - Line[195300 88400 196000 87700 1000 2000 "clearline"] - Line[208800 103500 195100 103500 1000 2000 "clearline"] - Line[195100 103500 192700 101100 1000 2000 "clearline"] - Line[192700 101100 192700 97500 1000 2000 "clearline"] - Line[192700 97500 193700 96500 1000 2000 "clearline"] - Line[193700 96500 193700 87700 1000 2000 "clearline"] - Line[193700 87700 194400 87000 1000 2000 "clearline"] - Line[216700 105600 223600 105600 1000 2000 "clearline"] - Line[223600 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115600 1000 2000 "clearline"] - Line[222289 133111 229100 126300 1000 2000 "clearline"] - Line[229100 126300 230600 126300 1000 2000 "clearline"] - Line[230600 126300 231200 125700 1000 2000 "clearline"] - Line[229400 118900 258252 118900 1000 2000 "clearline"] - Line[258252 118900 259552 120200 1000 2000 "clearline"] - Line[262700 120200 272800 120200 1000 2000 "clearline"] - Line[272800 120200 272900 120300 1000 2000 "clearline"] - Line[249800 120500 253900 120500 1000 2000 "clearline"] - Line[253900 120500 257600 124200 1000 2000 "clearline"] - Line[257600 124200 259552 124200 1000 2000 "clearline"] - Line[262700 124200 276700 124200 1000 2000 "clearline"] - Line[231000 122100 253300 122100 1000 2000 "clearline"] - Line[253300 122100 258800 127600 1000 2000 "clearline"] - Line[258800 127600 280300 127600 1000 2000 "clearline"] - Line[286900 120000 332350 120000 1000 2000 "clearline"] - Line[332350 120000 414450 37900 1000 2000 "clearline"] - Line[231800 104600 232000 104600 1000 2000 "clearline"] - Line[284400 47200 284350 47250 1000 2000 "clearline"] - Line[284350 47250 284350 46950 1000 2000 "clearline"] - Line[284350 46950 284400 46900 1000 2000 "clearline"] - Line[231700 104600 231900 104600 1000 2000 "clearline"] - Line[213954 135080 224020 135080 1000 2000 "clearline"] - Line[224020 135080 228200 130900 1000 2000 "clearline"] - Line[228200 104600 225600 102000 1000 2000 "clearline"] - Line[225600 102000 216300 102000 1000 2000 "clearline"] - Line[216300 102000 201800 87500 1000 2000 "clearline"] - Line[231800 104600 231800 85500 1000 2000 "clearline"] - Line[231800 85500 270400 46900 1000 2000 "clearline"] - Line[235400 100900 235400 95900 1000 2000 "clearline"] - Line[235400 95900 284400 46900 1000 2000 "clearline"] - Line[235400 104600 264900 104600 1000 2000 "clearline"] - Line[264900 104600 322600 46900 1000 2000 "clearline"] - Line[227600 164400 227600 140080 1000 2000 "clearline"] - Line[227600 140080 222600 135080 1000 2000 "clearline"] - Line[289450 237100 279450 237100 1000 2000 "clearline"] - Line[279400 228100 218200 228100 1000 2000 "clearline"] - Line[198200 190700 201300 190700 1000 2000 "clearline"] - Line[227600 164400 201300 190700 1000 2000 "clearline"] - Line[180600 223800 180600 191700 1000 2000 "clearline"] - Line[180600 191700 179600 190700 1000 2000 "clearline"] - Line[218200 228100 197200 207100 1000 2000 "clearline"] - Line[197200 207100 197200 193300 1000 2000 "clearline"] - Line[197200 193300 201000 193300 1000 2000 "clearline"] - Line[201000 193300 229200 165100 1000 2000 "clearline"] - Line[229200 165100 229200 133700 1000 2000 "clearline"] - Line[229200 133700 231200 131700 1000 2000 "clearline"] - Line[231200 131700 231200 125900 1000 2000 "clearline"] - Line[174000 185600 174000 191900 1000 2000 "clearline"] - Line[174000 191900 178000 195900 1000 2000 "clearline"] - Line[199900 195900 200700 195900 1000 2000 "clearline"] - Line[200700 195900 230700 165900 1000 2000 "clearline"] - Line[230700 165900 230700 134500 1000 2000 "clearline"] - Line[230700 134500 233800 131400 1000 2000 "clearline"] - Line[233800 131400 233800 123700 1000 2000 "clearline"] - Line[233800 123700 252600 123700 1000 2000 "clearline"] - Line[252600 123700 258100 129200 1000 2000 "clearline"] - Line[258100 129200 278100 129200 1000 2000 "clearline"] - Line[278100 129200 279100 130200 1000 2000 "clearline"] - Line[279100 130200 284300 130200 1000 2000 "clearline"] - Line[284300 130200 308400 154300 1000 2000 "clearline"] - Line[308400 253000 308400 154300 1000 2000 "clearline"] - Line[238000 126300 238000 199100 1000 2000 "clearline"] - Line[238000 199100 264400 225500 1000 2000 "clearline"] - Line[241600 126300 241600 192700 1000 2000 "clearline"] - Line[241600 192700 274400 225500 1000 2000 "clearline"] - Line[245200 126300 245200 188900 1000 2000 "clearline"] - Line[245200 188900 284400 228100 1000 2000 "clearline"] - Line[248800 126300 248800 182500 1000 2000 "clearline"] - Line[248800 182500 294400 228100 1000 2000 "clearline"] - Line[147100 94000 147100 87000 1000 2000 "clearline"] - Line[147100 87000 142400 82300 1000 2000 "clearline"] - Line[142400 82300 139400 82300 1000 2000 "clearline"] - Line[131600 82300 131600 98200 1000 2000 "clearline"] - Line[131600 82200 131600 76100 1000 2000 "clearline"] - Line[135500 94900 135500 76852 1000 2000 "clearline"] - Line[135500 76852 134748 76100 1000 2000 "clearline"] - Line[178522 113427 178522 109022 1000 2000 "clearline"] - Line[178522 109022 178500 109000 1000 2000 "clearline"] - Line[178500 109000 178500 105000 1000 2000 "clearline"] - Line[184427 113427 184427 107779 1000 2000 "clearline"] - Line[184427 107779 181648 105000 1000 2000 "clearline"] - Line[138700 46900 175400 46900 1000 2000 "clearline"] - Line[175400 46900 184100 55600 1000 2000 "clearline"] - Line[184100 55600 190200 55600 1000 2000 "clearline"] - Line[192100 95900 192100 87100 1000 2000 "clearline"] - Line[192100 87100 192800 86400 1000 2000 "clearline"] - Line[192800 86400 192800 66600 1000 2000 "clearline"] - Line[192800 66600 175700 49500 1000 2000 "clearline"] - Line[186396 113427 186396 99304 1000 2000 "clearline"] - Line[186396 99304 190500 95200 1000 2000 "clearline"] - Line[190500 95200 190500 86400 1000 2000 "clearline"] - Line[190500 86400 191200 85700 1000 2000 "clearline"] - Line[191200 85700 191200 67200 1000 2000 "clearline"] - Line[191200 67200 175100 51100 1000 2000 "clearline"] - Line[174200 53800 167900 53800 1000 2000 "clearline"] - Line[167900 53800 139400 82300 1000 2000 "clearline"] - Line[192100 105100 191700 105500 1000 2000 "clearline"] - Line[213000 105100 192100 105100 1000 2000 "clearline"] - Line[188364 113427 188364 99636 1000 2000 "clearline"] - Line[192100 95900 188364 99636 1000 2000 "clearline"] Line[74060 135544 76799 135544 1000 2000 "clearline"] Line[74060 133576 76467 133576 1000 2000 "clearline"] - Line[78455 143876 74060 139481 1000 2000 "clearline"] - Line[78455 143876 78455 154188 1000 2000 "clearline"] Line[37753 133576 37055 134274 1000 2000 "clearline"] Line[37107 130436 37055 130488 1000 2000 "clearline"] Line[37707 120688 37707 124040 1000 2000 "clearline"] @@ -2737,7 +2213,6 @@ Layer(1 "top") Line[59199 143457 59199 153096 1000 2000 "clearline"] Line[41307 141188 41807 140688 1000 2000 "clearline"] Line[37055 128936 37055 130488 1000 2000 "clearline"] - Line[81755 144041 81755 147688 1000 2000 "clearline"] Line[12855 129288 16635 129288 1000 2000 "clearline"] Line[36941 141188 41307 141188 1000 2000 "clearline"] Line[46755 120588 49688 120588 1000 2000 "clearline"] @@ -2784,10 +2259,6 @@ Layer(1 "top") Line[39955 116240 36486 112771 1000 2000 "clearline"] Line[44555 123288 41755 120488 1000 2000 "clearline"] Line[44555 123288 47755 123288 1000 2000 "clearline"] - Line[79135 140227 80549 140227 1000 2000 "clearline"] - Line[76421 137513 79135 140227 1000 2000 "clearline"] - Line[74985 137513 76421 137513 1000 2000 "clearline"] - Line[81655 143881 81135 143361 1000 2000 "clearline"] Line[57230 145413 55255 147388 1000 2000 "clearline"] Line[57230 143457 57230 145413 1000 2000 "clearline"] Line[49355 120750 49355 122388 1000 2000 "clearline"] @@ -2806,14 +2277,11 @@ Layer(1 "top") Line[34893 121022 34559 120688 1000 2000 "clearline"] Line[43300 17900 53600 7600 1000 2000 "clearline"] Line[53600 7600 164000 7600 1000 2000 "clearline"] - Line[164000 7600 174200 17800 1000 2000 "clearline"] Line[53300 17900 51000 17900 1000 2000 "clearline"] Line[51000 17900 43600 25300 1000 2000 "clearline"] Line[43600 25300 43600 33400 1000 2000 "clearline"] Line[43600 33400 44700 34500 1000 2000 "clearline"] Line[44700 34500 44700 38700 1000 2000 "clearline"] - Line[74700 46900 74700 50726 1000 2000 "clearline"] - Line[84500 46900 84500 50726 1000 2000 "clearline"] Line[74700 53874 74700 53900 1000 2000 "clearline"] Line[74700 53900 76700 55900 1000 2000 "clearline"] Line[76700 55900 76700 133376 1000 2000 "clearline"] @@ -2822,27 +2290,11 @@ Layer(1 "top") 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121678 229000 116352 1000 2000 "clearline"] + Line[229000 116352 230552 114800 1000 2000 "clearline"] + Line[233700 114800 233700 122700 1000 2000 "clearline"] + Line[228910 123646 232754 123646 1000 2000 "clearline"] + Line[233700 122700 232754 123646 1000 2000 "clearline"] + Line[174778 120878 174800 120900 1000 2000 "clearline"] + Line[176746 114788 176746 110354 1000 2000 "clearline"] + Line[176746 110354 176800 110300 1000 2000 "clearline"] + Line[171500 108226 174726 108226 1000 2000 "clearline"] + Line[174726 108226 176800 110300 1000 2000 "clearline"] + Line[174778 120878 174778 114652 1000 2000 "clearline"] + Line[174778 114652 171500 111374 1000 2000 "clearline"] + Line[167888 166953 171747 166953 1000 2000 "clearline"] + Line[171747 166953 172400 166300 1000 2000 "clearline"] + Line[184620 175810 184620 186980 1000 2000 "clearline"] + Line[184620 186980 184500 187100 1000 2000 "clearline"] + Line[187648 187100 188826 187100 1000 2000 "clearline"] + Line[188826 187100 190726 185200 1000 2000 "clearline"] ) Layer(2 "bottom") ( - Line[284400 46900 284400 25000 1000 2000 "clearline"] - Line[119700 94900 119700 103100 1000 2000 "clearline"] - Line[115700 94900 115700 103100 1000 2000 "clearline"] - Line[134300 150200 134300 163800 1000 2000 "clearline"] - Line[129500 237100 129500 228100 1000 2000 "clearline"] - Line[192000 229100 193000 228100 1000 2000 "clearline"] - Line[192000 256500 192000 229100 1000 2000 "clearline"] - Line[195600 229200 196700 228100 1000 2000 "clearline"] - Line[195600 256500 195600 229200 1000 2000 "clearline"] - Line[284400 228100 284400 246500 1000 2000 "clearline"] - Line[294400 246500 294400 228100 1000 2000 "clearline"] - Line[183800 244000 183800 228100 1000 2000 "clearline"] - Line[180200 241400 180200 228100 1000 2000 "clearline"] - Line[187400 228100 187400 233300 1000 2000 "clearline"] - Line[115900 230700 109500 237100 1000 2000 "clearline"] - Line[209400 243900 209400 237100 1000 2000 "clearline"] - Line[279400 37900 270400 46900 1000 2000 "clearline"] Line[279450 37900 279400 37900 1000 2000 "clearline"] - Line[190200 55600 201800 55600 1000 2000 "clearline"] - Line[129700 37900 138700 46900 1000 2000 "clearline"] Line[129500 37900 129700 37900 1000 2000 "clearline"] - Line[184200 17800 184200 49600 1000 2000 "clearline"] - Line[179200 46900 179300 47000 1000 2000 "clearline"] - Line[179200 27800 179200 46900 1000 2000 "clearline"] - Line[194700 39100 194700 46900 1000 2000 "clearline"] - Line[49500 37900 39500 37900 1000 2000 "clearline"] - Line[89900 44300 99800 44300 1000 2000 "clearline"] Line[229500 37850 229450 37900 1000 2000 "clearline"] - Line[229500 31500 229500 37850 1000 2000 "clearline"] Line[209500 37950 209450 37900 1000 2000 "clearline"] - Line[209500 44300 209500 37950 1000 2000 "clearline"] - Line[334450 37950 328100 44300 1000 2000 "clearline"] Line[334450 37900 334450 37950 1000 2000 "clearline"] - Line[354450 37250 348700 31500 1000 2000 "clearline"] Line[354450 37900 354450 37250 1000 2000 "clearline"] - Line[326650 244900 334450 237100 1000 2000 "clearline"] - Line[305800 244900 326650 244900 1000 2000 "clearline"] - Line[209450 237100 209500 237100 1000 2000 "clearline"] - Line[305800 241300 317300 241300 1000 2000 "clearline"] - Line[304200 229700 317300 229700 1000 2000 "clearline"] - Line[259450 237050 253100 230700 1000 2000 "clearline"] - Line[259450 237100 259450 237050 1000 2000 "clearline"] - Line[317300 233300 304200 233300 1000 2000 "clearline"] Line[105000 291400 105000 296500 1000 2000 "clearline"] - Line[322600 28800 322600 46900 1000 2000 "clearline"] Line[282900 296500 283000 296400 1000 2000 "clearline"] Line[283000 296400 283000 291400 1000 2000 "clearline"] - Line[152700 150300 152700 163800 1000 2000 "clearline"] - Line[204400 256500 204400 228100 1000 2000 "clearline"] - Line[214400 246500 214400 228100 1000 2000 "clearline"] - Line[222500 143000 235400 130100 1000 2000 "clearline"] - Line[221200 139700 223500 139700 1000 2000 "clearline"] - Line[223500 139700 233800 129400 1000 2000 "clearline"] - Line[209800 112700 209800 102500 1000 2000 "clearline"] - Line[183600 164400 183600 153500 1000 2000 "clearline"] - Line[183600 153500 183900 153200 1000 2000 "clearline"] - Line[194269 123669 194269 101931 1000 2000 "clearline"] - Line[194269 101931 196900 99300 1000 2000 "clearline"] - Line[197800 123600 197800 102000 1000 2000 "clearline"] - Line[197800 102000 200500 99300 1000 2000 "clearline"] - Line[224600 119800 224600 104600 1000 2000 "clearline"] - Line[272900 120300 273200 120300 1000 2000 "clearline"] - Line[273200 120300 277900 115600 1000 2000 "clearline"] - Line[276700 124200 276700 123800 1000 2000 "clearline"] - Line[276700 123800 281400 119100 1000 2000 "clearline"] - Line[280300 127600 280300 126600 1000 2000 "clearline"] - Line[280300 126600 286900 120000 1000 2000 "clearline"] - Line[228200 130900 228200 104600 1000 2000 "clearline"] - Line[231200 125700 231200 105200 1000 2000 "clearline"] - Line[231200 105200 231800 104600 1000 2000 "clearline"] - Line[233800 129400 233800 124600 1000 2000 "clearline"] - Line[233800 124600 232800 123600 1000 2000 "clearline"] - Line[232800 123600 232800 107200 1000 2000 "clearline"] - Line[232800 107200 235400 104600 1000 2000 "clearline"] - Line[235400 130100 235400 123900 1000 2000 "clearline"] - Line[235400 123900 234400 122900 1000 2000 "clearline"] - Line[234400 122900 234400 109300 1000 2000 "clearline"] - Line[234400 109300 238000 105700 1000 2000 "clearline"] - Line[238000 105700 238000 103500 1000 2000 "clearline"] - Line[238000 103500 235400 100900 1000 2000 "clearline"] - Line[279450 237100 279450 228150 1000 2000 "clearline"] - Line[279450 228150 279400 228100 1000 2000 "clearline"] - Line[179600 190700 198200 190700 1000 2000 "clearline"] - Line[178000 195900 199900 195900 1000 2000 "clearline"] - Line[264400 225500 264400 246500 1000 2000 "clearline"] - Line[274400 225500 274400 246500 1000 2000 "clearline"] - Line[238000 113000 238000 126300 1000 2000 "clearline"] - Line[241600 113000 241600 126300 1000 2000 "clearline"] - Line[245200 113000 245200 126300 1000 2000 "clearline"] - Line[248800 113000 248800 126300 1000 2000 "clearline"] - Line[147100 94000 147100 133800 1000 2000 "clearline"] - Line[191700 109000 191700 122200 1000 2000 "clearline"] - Line[191700 122200 190300 123600 1000 2000 "clearline"] - Line[171000 105500 163300 113200 1000 2000 "clearline"] - Line[174200 17800 174200 53800 1000 2000 "clearline"] - Line[191700 105500 171000 105500 1000 2000 "clearline"] - Line[69655 152188 81055 152188 1000 2000 "clearline"] Line[48955 130588 47055 128688 1000 2000 "clearline"] Line[48855 144288 48955 130588 1000 2000 "clearline"] Line[48300 27900 54400 34000 1000 2000 "clearline"] - Line[54400 34000 54400 40200 1000 2000 "clearline"] - Line[54400 40200 61300 47100 1000 2000 "clearline"] - Line[74700 46900 74700 17200 1000 2000 "clearline"] Line[74700 17200 70000 12500 1000 2000 "clearline"] - Line[84500 46900 84500 32900 1000 2000 "clearline"] Line[84500 32900 104900 12500 1000 2000 "clearline"] Line[104900 12500 120000 12500 1000 2000 "clearline"] - Line[179600 177800 194900 177800 1000 2000 "clearline"] - Line[179600 186600 192200 186600 1000 2000 "clearline"] - Line[192200 186600 194900 183900 1000 2000 "clearline"] - Line[179600 182200 192800 182200 1000 2000 "clearline"] - Line[192800 182200 194100 180900 1000 2000 "clearline"] - Line[194100 180900 195600 180900 1000 2000 "clearline"] - Line[195600 180900 198500 183800 1000 2000 "clearline"] - Line[178100 173500 194900 173500 1000 2000 "clearline"] Line[53700 117600 53700 121843 1000 2000 "clearline"] Line[53700 121843 46855 128688 1000 2000 "clearline"] Line[68400 106400 68400 103200 1000 2000 "clearline"] @@ -3185,22 +2646,11 @@ Layer(2 "bottom") Line[70900 108900 70900 105700 1000 2000 "clearline"] Line[70900 105700 74100 102500 1000 2000 "clearline"] Line[81100 117400 53700 117400 1000 2000 "clearline"] - Line[175200 243500 192200 260500 1000 2000 "clearline"] - Line[192200 260500 198200 260500 1000 2000 "clearline"] - Line[171700 225500 171700 242300 1000 2000 "clearline"] - Line[171700 242300 193500 264100 1000 2000 "clearline"] - Line[193500 264100 198200 264100 1000 2000 "clearline"] Line[331800 278400 331800 271600 1000 2000 "clearline"] - Line[145500 225500 145500 251300 1000 2000 "clearline"] - Line[149100 163900 149100 150300 1000 2000 "clearline"] - Line[138100 150300 138100 167300 1000 2000 "clearline"] - Line[141900 150300 141900 170000 1000 2000 "clearline"] - Line[145500 150300 145500 172600 1000 2000 "clearline"] Line[209500 296500 222700 296500 1000 2000 "clearline"] - Line[175200 225300 175200 243500 1000 2000 "clearline"] Polygon("clearpoly") ( - [446600 372500] [1600 372500] [1600 2500] [446600 2500] + [1000 1000] [449000 1000] [449000 374000] [1000 374000] ) ) Layer(3 "outline") @@ -3253,10 +2703,11 @@ NetList() Connect("R8-2") Connect("R9-2") Connect("U1-5") - Connect("U7-19") - Connect("U7-32") - Connect("U7-48") - Connect("U7-64") + Connect("U7-11") + Connect("U7-28") + Connect("U7-50") + Connect("U7-75") + Connect("U7-100") Connect("U9-2") Connect("U9-12") Connect("U9-19") @@ -3270,24 +2721,24 @@ NetList() Net("arm" "(unknown)") ( Connect("J9-5") - Connect("U7-24") + Connect("U7-3") ) Net("boot0" "(unknown)") ( Connect("R402-1") - Connect("U7-60") + Connect("U7-94") ) Net("box_a" "(unknown)") ( Connect("C1-2") Connect("R1-1") - Connect("U7-9") + Connect("U7-98") ) Net("box_b" "(unknown)") ( Connect("C2-2") Connect("R6-2") - Connect("U7-8") + Connect("U7-97") ) Net("c2" "(unknown)") ( @@ -3297,23 +2748,15 @@ NetList() ) Net("com_0" "(unknown)") ( - Connect("U7-41") + Connect("U7-67") Connect("U20-1") Connect("U20-2") Connect("U20-19") Connect("U20-20") - ) - Net("com_1" "(unknown)") - ( - Connect("U7-42") Connect("U21-1") Connect("U21-2") Connect("U21-19") Connect("U21-20") - ) - Net("com_2" "(unknown)") - ( - Connect("U7-43") Connect("U22-1") Connect("U22-2") Connect("U22-19") @@ -3338,7 +2781,7 @@ NetList() Net("fire" "(unknown)") ( Connect("J9-3") - Connect("U7-25") + Connect("U7-4") ) Net("GND" "(unknown)") ( @@ -3415,11 +2858,12 @@ NetList() Connect("S2-C") Connect("U1-2") Connect("U2-2") - Connect("U7-12") - Connect("U7-18") - Connect("U7-31") - Connect("U7-47") - Connect("U7-63") + Connect("U7-10") + Connect("U7-19") + Connect("U7-27") + Connect("U7-49") + Connect("U7-74") + Connect("U7-99") Connect("U8-1") Connect("U9-37") Connect("U11-3") @@ -3431,35 +2875,35 @@ NetList() Net("led_green" "(unknown)") ( Connect("R53-2") - Connect("U7-39") + Connect("U7-65") ) Net("led_red" "(unknown)") ( Connect("R52-2") - Connect("U7-38") + Connect("U7-64") ) Net("miso2" "(unknown)") ( Connect("R107-1") - Connect("U9-34") + Connect("U9-35") ) Net("mosi2" "(unknown)") ( Connect("C108-2") Connect("R108-1") - Connect("U9-35") + Connect("U9-34") ) Net("pad_a" "(unknown)") ( Connect("C3-2") Connect("R7-1") - Connect("U7-11") + Connect("U7-2") ) Net("pad_b" "(unknown)") ( Connect("C4-2") Connect("R10-2") - Connect("U7-10") + Connect("U7-1") ) Net("radio_int" "(unknown)") ( @@ -3471,95 +2915,159 @@ NetList() Connect("C610-2") Connect("J3-2") Connect("J6-2") - Connect("U7-7") + Connect("U7-14") Connect("U9-31") Connect("U11-1") ) - Net("seg_a" "(unknown)") + Net("seg_box0_a" "(unknown)") ( - Connect("U7-15") - Connect("U20-15") - Connect("U20-16") + Connect("U7-47") Connect("U21-15") Connect("U21-16") - Connect("U22-15") - Connect("U22-16") ) - Net("seg_b" "(unknown)") + Net("seg_box0_b" "(unknown)") ( - Connect("U7-16") - Connect("U20-13") - Connect("U20-14") + Connect("U7-48") Connect("U21-13") Connect("U21-14") - Connect("U22-13") - Connect("U22-14") ) - Net("seg_c" "(unknown)") + Net("seg_box0_c" "(unknown)") ( - Connect("U7-17") - Connect("U20-7") - Connect("U20-8") + Connect("U7-16") Connect("U21-7") Connect("U21-8") - Connect("U22-7") - Connect("U22-8") ) - Net("seg_d" "(unknown)") + Net("seg_box0_d" "(unknown)") ( - Connect("U7-22") - Connect("U20-5") - Connect("U20-6") + Connect("U7-17") Connect("U21-5") Connect("U21-6") - Connect("U22-5") - Connect("U22-6") ) - Net("seg_dp" "(unknown)") + Net("seg_box0_dp" "(unknown)") ( - Connect("U7-55") - Connect("U20-9") - Connect("U20-10") + Connect("U7-15") Connect("U21-9") Connect("U21-10") - Connect("U22-9") - Connect("U22-10") ) - Net("seg_e" "(unknown)") + Net("seg_box0_e" "(unknown)") ( - Connect("U7-23") - Connect("U20-3") - Connect("U20-4") + Connect("U7-18") Connect("U21-3") Connect("U21-4") - Connect("U22-3") - Connect("U22-4") ) - Net("seg_f" "(unknown)") + Net("seg_box0_f" "(unknown)") ( - Connect("U7-26") - Connect("U20-17") - Connect("U20-18") + Connect("U7-36") Connect("U21-17") Connect("U21-18") - Connect("U22-17") - Connect("U22-18") ) - Net("seg_g" "(unknown)") + Net("seg_box0_g" "(unknown)") ( - Connect("U7-27") - Connect("U20-11") - Connect("U20-12") + Connect("U7-51") Connect("U21-11") Connect("U21-12") + ) + Net("seg_box1_a" "(unknown)") + ( + Connect("U7-33") + Connect("U22-15") + Connect("U22-16") + ) + Net("seg_box1_b" "(unknown)") + ( + Connect("U7-34") + Connect("U22-13") + Connect("U22-14") + ) + Net("seg_box1_c" "(unknown)") + ( + Connect("U7-25") + Connect("U22-7") + Connect("U22-8") + ) + Net("seg_box1_d" "(unknown)") + ( + Connect("U7-26") + Connect("U22-5") + Connect("U22-6") + ) + Net("seg_box1_dp" "(unknown)") + ( + Connect("U7-24") + Connect("U22-9") + Connect("U22-10") + ) + Net("seg_box1_e" "(unknown)") + ( + Connect("U7-31") + Connect("U22-3") + Connect("U22-4") + ) + Net("seg_box1_f" "(unknown)") + ( + Connect("U7-32") + Connect("U22-17") + Connect("U22-18") + ) + Net("seg_box1_g" "(unknown)") + ( + Connect("U7-35") Connect("U22-11") Connect("U22-12") ) + Net("seg_pad_a" "(unknown)") + ( + Connect("U7-53") + Connect("U20-15") + Connect("U20-16") + ) + Net("seg_pad_b" "(unknown)") + ( + Connect("U7-54") + Connect("U20-13") + Connect("U20-14") + ) + Net("seg_pad_c" "(unknown)") + ( + Connect("U7-90") + Connect("U20-7") + Connect("U20-8") + ) + Net("seg_pad_d" "(unknown)") + ( + Connect("U7-91") + Connect("U20-5") + Connect("U20-6") + ) + Net("seg_pad_dp" "(unknown)") + ( + Connect("U7-89") + Connect("U20-9") + Connect("U20-10") + ) + Net("seg_pad_e" "(unknown)") + ( + Connect("U7-95") + Connect("U20-3") + Connect("U20-4") + ) + Net("seg_pad_f" "(unknown)") + ( + Connect("U7-52") + Connect("U20-17") + Connect("U20-18") + ) + Net("seg_pad_g" "(unknown)") + ( + Connect("U7-77") + Connect("U20-11") + Connect("U20-12") + ) Net("sense_batt" "(unknown)") ( Connect("R4-2") Connect("R5-1") - Connect("U7-14") + Connect("U7-23") ) Net("serial_rx" "(unknown)") ( @@ -3574,268 +3082,444 @@ NetList() Net("swclk" "(unknown)") ( Connect("J3-4") - Connect("U7-49") + Connect("U7-76") ) Net("swdio" "(unknown)") ( Connect("J3-3") - Connect("U7-46") + Connect("U7-72") ) Net("unnamed_net1" "(unknown)") ( - Connect("U7-37") + Connect("U7-63") Connect("U8-2") ) Net("unnamed_net2" "(unknown)") ( Connect("C33-1") - Connect("U7-6") + Connect("U7-13") Connect("X2-3") ) Net("unnamed_net3" "(unknown)") ( Connect("C32-1") - Connect("U7-5") + Connect("U7-12") Connect("X2-1") ) Net("unnamed_net4" "(unknown)") ( - Connect("R401-1") - Connect("U7-28") + Connect("J5-4") ) Net("unnamed_net5" "(unknown)") + ( + Connect("R401-1") + Connect("U7-37") + ) + Net("unnamed_net6" "(unknown)") ( Connect("D2-1") Connect("R52-1") ) - Net("unnamed_net6" "(unknown)") + Net("unnamed_net7" "(unknown)") ( Connect("D2-3") Connect("R53-1") ) - Net("unnamed_net7" "(unknown)") + Net("unnamed_net8" "(unknown)") ( Connect("U1-4") ) - Net("unnamed_net8" "(unknown)") + Net("unnamed_net9" "(unknown)") ( Connect("R1-2") Connect("R2-1") Connect("S1-A") ) - Net("unnamed_net9" "(unknown)") + Net("unnamed_net10" "(unknown)") ( Connect("R3-1") Connect("R6-1") Connect("S1-B") ) - Net("unnamed_net10" "(unknown)") + Net("unnamed_net11" "(unknown)") ( Connect("R7-2") Connect("R8-1") Connect("S2-A") ) - Net("unnamed_net11" "(unknown)") + Net("unnamed_net12" "(unknown)") ( Connect("R9-1") Connect("R10-1") Connect("S2-B") ) - Net("unnamed_net12" "(unknown)") + Net("unnamed_net13" "(unknown)") ( Connect("D3-1") Connect("R54-1") ) - Net("unnamed_net13" "(unknown)") + Net("unnamed_net14" "(unknown)") ( Connect("D4-1") Connect("R55-1") ) - Net("unnamed_net14" "(unknown)") + Net("unnamed_net15" "(unknown)") ( Connect("D5-1") Connect("R56-1") ) - Net("unnamed_net15" "(unknown)") + Net("unnamed_net16" "(unknown)") ( Connect("D6-1") Connect("R57-1") ) - Net("unnamed_net16" "(unknown)") + Net("unnamed_net17" "(unknown)") ( Connect("D7-1") Connect("R58-1") ) - Net("unnamed_net17" "(unknown)") + Net("unnamed_net18" "(unknown)") ( Connect("R54-2") - Connect("U7-2") + Connect("U7-7") ) - Net("unnamed_net18" "(unknown)") + Net("unnamed_net19" "(unknown)") ( Connect("R55-2") - Connect("U7-53") + Connect("U7-80") ) - Net("unnamed_net19" "(unknown)") + Net("unnamed_net20" "(unknown)") ( Connect("R56-2") - Connect("U7-52") + Connect("U7-79") ) - Net("unnamed_net20" "(unknown)") + Net("unnamed_net21" "(unknown)") ( Connect("R57-2") - Connect("U7-51") + Connect("U7-78") ) - Net("unnamed_net21" "(unknown)") + Net("unnamed_net22" "(unknown)") ( Connect("R58-2") - Connect("U7-40") + Connect("U7-66") ) - Net("unnamed_net22" "(unknown)") + Net("unnamed_net23" "(unknown)") ( Connect("D9-1") Connect("D9-4") Connect("U2-1") ) - Net("unnamed_net23" "(unknown)") + Net("unnamed_net24" "(unknown)") ( Connect("R15-2") Connect("U2-5") ) - Net("unnamed_net24" "(unknown)") + Net("unnamed_net25" "(unknown)") ( Connect("D9-2") Connect("R11-1") ) - Net("unnamed_net25" "(unknown)") + Net("unnamed_net26" "(unknown)") ( Connect("D9-3") Connect("R14-2") ) - Net("unnamed_net26" "(unknown)") - ( - Connect("R101-2") - Connect("U7-44") - ) Net("unnamed_net27" "(unknown)") ( - Connect("R102-2") - Connect("U7-45") + Connect("R101-2") + Connect("U7-70") ) Net("unnamed_net28" "(unknown)") ( - Connect("C603-2") - Connect("U7-1") + Connect("R102-2") + Connect("U7-71") ) Net("unnamed_net29" "(unknown)") ( - Connect("C109-2") - Connect("R109-2") - Connect("U7-3") + Connect("C603-2") + Connect("U7-6") ) Net("unnamed_net30" "(unknown)") ( - Connect("C107-2") - Connect("R107-2") - Connect("U7-35") + Connect("C30-1") + Connect("U9-21") + Connect("X1-3") ) Net("unnamed_net31" "(unknown)") ( - Connect("R106-2") - Connect("U7-34") + Connect("C31-1") + Connect("U9-20") + Connect("X1-1") ) Net("unnamed_net32" "(unknown)") ( - Connect("R105-2") - Connect("U7-33") + Connect("R16-1") + Connect("U9-27") ) Net("unnamed_net33" "(unknown)") ( - Connect("R108-2") - Connect("U7-36") + Connect("U9-17") ) Net("unnamed_net34" "(unknown)") ( - Connect("C30-1") - Connect("U9-21") - Connect("X1-3") + Connect("U9-18") ) Net("unnamed_net35" "(unknown)") ( - Connect("C31-1") - Connect("U9-20") - Connect("X1-1") + Connect("U9-11") ) Net("unnamed_net36" "(unknown)") - ( - Connect("R16-1") - Connect("U9-27") - ) - Net("unnamed_net37" "(unknown)") ( Connect("C22-1") Connect("L4-1") Connect("U9-24") ) - Net("unnamed_net38" "(unknown)") + Net("unnamed_net37" "(unknown)") ( Connect("C25-1") Connect("L1-2") Connect("U9-23") ) + Net("unnamed_net38" "(unknown)") + ( + Connect("U9-10") + ) Net("unnamed_net39" "(unknown)") + ( + Connect("U9-8") + ) + Net("unnamed_net40" "(unknown)") + ( + Connect("U9-7") + ) + Net("unnamed_net41" "(unknown)") + ( + Connect("U9-6") + ) + Net("unnamed_net42" "(unknown)") + ( + Connect("U9-5") + ) + Net("unnamed_net43" "(unknown)") + ( + Connect("U9-32") + ) + Net("unnamed_net44" "(unknown)") ( Connect("R12-1") Connect("U9-3") ) - Net("unnamed_net40" "(unknown)") + Net("unnamed_net45" "(unknown)") ( Connect("R13-1") Connect("U9-4") ) - Net("unnamed_net41" "(unknown)") + Net("unnamed_net46" "(unknown)") + ( + Connect("U9-14") + ) + Net("unnamed_net47" "(unknown)") ( Connect("C19-2") Connect("U9-30") ) - Net("unnamed_net42" "(unknown)") + Net("unnamed_net48" "(unknown)") ( Connect("C25-2") Connect("L2-1") Connect("L4-2") ) - Net("unnamed_net43" "(unknown)") + Net("unnamed_net49" "(unknown)") ( Connect("C23-1") Connect("L2-2") Connect("L3-1") ) - Net("unnamed_net44" "(unknown)") + Net("unnamed_net50" "(unknown)") ( Connect("C26-1") Connect("L1-1") ) - Net("unnamed_net45" "(unknown)") + Net("unnamed_net51" "(unknown)") ( Connect("C24-1") Connect("C27-1") Connect("L3-2") ) - Net("unnamed_net46" "(unknown)") + Net("unnamed_net52" "(unknown)") ( Connect("C27-2") Connect("J8-1") ) - Net("unnamed_net47" "(unknown)") + Net("unnamed_net53" "(unknown)") ( Connect("D1-1") Connect("R13-2") ) - Net("unnamed_net48" "(unknown)") + Net("unnamed_net54" "(unknown)") ( Connect("D8-1") Connect("R12-2") ) + Net("unnamed_net55" "(unknown)") + ( + Connect("C107-2") + Connect("R107-2") + Connect("U7-84") + ) + Net("unnamed_net56" "(unknown)") + ( + Connect("R108-2") + Connect("U7-85") + ) + Net("unnamed_net57" "(unknown)") + ( + Connect("R106-2") + Connect("U7-82") + ) + Net("unnamed_net58" "(unknown)") + ( + Connect("R105-2") + Connect("U7-81") + ) + Net("unnamed_net59" "(unknown)") + ( + Connect("C109-2") + Connect("R109-2") + Connect("U7-8") + ) + Net("unnamed_net60" "(unknown)") + ( + Connect("U7-20") + ) + Net("unnamed_net61" "(unknown)") + ( + Connect("U7-21") + ) + Net("unnamed_net62" "(unknown)") + ( + Connect("U7-5") + ) + Net("unnamed_net63" "(unknown)") + ( + Connect("U7-9") + ) + Net("unnamed_net64" "(unknown)") + ( + Connect("U7-43") + ) + Net("unnamed_net65" "(unknown)") + ( + Connect("U7-44") + ) + Net("unnamed_net66" "(unknown)") + ( + Connect("U7-45") + ) + Net("unnamed_net67" "(unknown)") + ( + Connect("U7-39") + ) + Net("unnamed_net68" "(unknown)") + ( + Connect("U7-40") + ) + Net("unnamed_net69" "(unknown)") + ( + Connect("U7-42") + ) + Net("unnamed_net70" "(unknown)") + ( + Connect("U7-41") + ) + Net("unnamed_net71" "(unknown)") + ( + Connect("U7-38") + ) + Net("unnamed_net72" "(unknown)") + ( + Connect("U7-46") + ) + Net("unnamed_net73" "(unknown)") + ( + Connect("U7-29") + ) + Net("unnamed_net74" "(unknown)") + ( + Connect("U7-30") + ) + Net("unnamed_net75" "(unknown)") + ( + Connect("U7-68") + ) + Net("unnamed_net76" "(unknown)") + ( + Connect("U7-69") + ) + Net("unnamed_net77" "(unknown)") + ( + Connect("U7-60") + ) + Net("unnamed_net78" "(unknown)") + ( + Connect("U7-61") + ) + Net("unnamed_net79" "(unknown)") + ( + Connect("U7-62") + ) + Net("unnamed_net80" "(unknown)") + ( + Connect("U7-57") + ) + Net("unnamed_net81" "(unknown)") + ( + Connect("U7-56") + ) + Net("unnamed_net82" "(unknown)") + ( + Connect("U7-55") + ) + Net("unnamed_net83" "(unknown)") + ( + Connect("U7-58") + ) + Net("unnamed_net84" "(unknown)") + ( + Connect("U7-73") + ) + Net("unnamed_net85" "(unknown)") + ( + Connect("U7-59") + ) + Net("unnamed_net86" "(unknown)") + ( + Connect("U7-93") + ) + Net("unnamed_net87" "(unknown)") + ( + Connect("U7-92") + ) + Net("unnamed_net88" "(unknown)") + ( + Connect("U7-88") + ) + Net("unnamed_net89" "(unknown)") + ( + Connect("U7-86") + ) + Net("unnamed_net90" "(unknown)") + ( + Connect("U7-87") + ) + Net("unnamed_net91" "(unknown)") + ( + Connect("U7-96") + ) + Net("unnamed_net92" "(unknown)") + ( + Connect("U7-83") + ) Net("usbdm" "(unknown)") ( Connect("J1-2") @@ -3876,6 +3560,6 @@ NetList() Connect("C601-1") Connect("C602-1") Connect("L600-2") - Connect("U7-13") + Connect("U7-22") ) ) diff --git a/telelco.sch b/telelco.sch index cc1f126..06878fe 100644 --- a/telelco.sch +++ b/telelco.sch @@ -196,16 +196,6 @@ N 52200 73100 53600 73100 4 T 52300 73200 5 10 1 1 0 0 1 netname=boot0 } -N 53600 67500 52300 67500 4 -{ -T 52300 67600 5 10 1 1 0 0 1 -netname=com_1 -} -N 53600 67100 52300 67100 4 -{ -T 52300 67200 5 10 1 1 0 0 1 -netname=com_2 -} N 53600 65900 52300 65900 4 { T 52300 66000 5 10 1 1 0 0 1 @@ -309,22 +299,22 @@ C 51500 71100 1 0 0 gnd.sym N 53600 70700 52300 70700 4 { T 52300 70800 5 10 1 1 0 0 1 -netname=seg_a +netname=seg_box1_dp } N 53600 70300 52300 70300 4 { T 52300 70400 5 10 1 1 0 0 1 -netname=seg_b +netname=seg_box1_c } N 53600 69900 52300 69900 4 { T 52300 70000 5 10 1 1 0 0 1 -netname=seg_c +netname=seg_box1_d } N 53600 63500 52300 63500 4 { -T 52900 63600 5 10 1 1 0 6 1 -netname=seg_dp +T 53350 63600 5 10 1 1 0 6 1 +netname=seg_pad_dp } C 66000 74000 1 180 0 resistor.sym { @@ -375,24 +365,24 @@ N 66600 71500 66600 73100 4 N 53600 64700 52300 64700 4 { T 52300 64800 5 10 1 1 0 0 1 -netname=seg_f +netname=seg_box1_g } N 53600 64300 52300 64300 4 { T 52300 64400 5 10 1 1 0 0 1 -netname=seg_g +netname=seg_box0_f } N 52300 68300 53600 68300 4 { T 52300 68400 5 10 1 1 0 0 1 -netname=seg_e +netname=seg_box1_f } N 52300 68700 53600 68700 4 { T 52300 68800 5 10 1 1 0 0 1 -netname=seg_d +netname=seg_box1_e } -N 63100 71100 64400 71100 4 +N 63100 71100 68600 71100 4 C 73000 71500 1 0 0 lcd-digit.sym { T 117500 103555 5 10 0 1 0 0 1 @@ -451,169 +441,169 @@ netname=com_0 } N 74300 77500 74300 78500 4 { -T 73800 78000 5 10 1 1 0 0 1 -netname=seg_a +T 73300 78000 5 10 1 1 0 0 1 +netname=seg_box1_a } N 75700 77500 75700 78500 4 { T 75800 78000 5 10 1 1 0 0 1 -netname=seg_a +netname=seg_box1_a } N 75400 77500 74800 77500 4 N 74800 77500 74800 78500 4 { T 74900 78000 5 10 1 1 0 0 1 -netname=com_2 +netname=com_0 } N 73000 74800 73000 76200 4 N 73000 76200 72000 76200 4 { T 72100 76200 5 10 1 1 0 0 1 -netname=seg_f +netname=seg_box1_f } N 77000 76200 77000 74800 4 N 77000 74800 78000 74800 4 { T 77400 74800 5 10 1 1 0 0 1 -netname=seg_b +netname=seg_box1_b } N 79000 74800 79000 76200 4 N 79000 76200 78000 76200 4 { T 78100 76200 5 10 1 1 0 0 1 -netname=seg_f +netname=seg_box0_f } N 77000 74200 77000 72800 4 N 77000 72800 78000 72800 4 { T 77400 72800 5 10 1 1 0 0 1 -netname=seg_c +netname=seg_box1_c } N 76200 71500 77000 71500 4 N 77000 71500 77000 72300 4 N 77000 72300 78000 72300 4 { T 77400 72300 5 10 1 1 0 0 1 -netname=seg_dp +netname=seg_box1_dp } N 73000 74500 72000 74500 4 { T 72100 74500 5 10 1 1 0 0 1 -netname=seg_g +netname=seg_box1_g } -N 77000 74500 79000 74500 4 +N 77000 74500 78000 74500 4 { T 77400 74500 5 10 1 1 0 0 1 -netname=seg_g +netname=seg_box1_g } -N 83000 74500 85000 74500 4 +N 83000 74500 84000 74500 4 { T 83400 74500 5 10 1 1 0 0 1 -netname=seg_g +netname=seg_box0_g } N 89000 74500 90000 74500 4 { T 89400 74500 5 10 1 1 0 0 1 -netname=seg_g +netname=seg_pad_g } N 83000 74200 83000 72800 4 N 83000 72800 84000 72800 4 { T 83400 72800 5 10 1 1 0 0 1 -netname=seg_c +netname=seg_box0_c } N 85000 72800 85000 74200 4 N 85000 74200 84000 74200 4 { T 84100 74200 5 10 1 1 0 0 1 -netname=seg_e +netname=seg_pad_e } N 85000 74800 85000 76200 4 N 85000 76200 84000 76200 4 { T 84100 76200 5 10 1 1 0 0 1 -netname=seg_f +netname=seg_pad_f } N 83000 76200 83000 74800 4 N 83000 74800 84000 74800 4 { T 83400 74800 5 10 1 1 0 0 1 -netname=seg_b +netname=seg_box0_b } N 89000 76200 89000 74800 4 N 89000 74800 90000 74800 4 { T 89400 74800 5 10 1 1 0 0 1 -netname=seg_b +netname=seg_pad_b } N 89000 74200 89000 72800 4 N 89000 72800 90000 72800 4 { T 89400 72800 5 10 1 1 0 0 1 -netname=seg_c +netname=seg_pad_c } N 88200 71500 89000 71500 4 N 89000 71500 89000 72300 4 N 89000 72300 90000 72300 4 { T 89400 72300 5 10 1 1 0 0 1 -netname=seg_dp +netname=seg_pad_dp } N 74800 71500 75200 71500 4 N 75200 71500 75200 70500 4 { T 74600 70800 5 10 1 1 0 0 1 -netname=com_2 +netname=com_0 } N 75700 71500 75700 70500 4 { T 75800 70800 5 10 1 1 0 0 1 -netname=seg_d +netname=seg_box1_d } N 74300 71500 74300 70500 4 { -T 73800 70800 5 10 1 1 0 0 1 -netname=seg_d +T 73200 70800 5 10 1 1 0 0 1 +netname=seg_box1_d } N 73000 72800 73000 74200 4 N 73000 74200 72000 74200 4 { T 72100 74200 5 10 1 1 0 0 1 -netname=seg_e +netname=seg_box1_e } N 79000 72800 79000 74200 4 N 79000 74200 78000 74200 4 { T 78100 74200 5 10 1 1 0 0 1 -netname=seg_e +netname=seg_box0_e } N 80300 71500 80300 70500 4 { -T 79800 70800 5 10 1 1 0 0 1 -netname=seg_d +T 79300 70800 5 10 1 1 0 0 1 +netname=seg_box0_d } N 80800 71500 81200 71500 4 N 81200 71500 81200 70500 4 { T 80600 70800 5 10 1 1 0 0 1 -netname=com_1 +netname=com_0 } N 81700 71500 81700 70500 4 { T 81800 70800 5 10 1 1 0 0 1 -netname=seg_d +netname=seg_box0_d } N 82200 71500 83000 71500 4 N 83000 71500 83000 72300 4 N 83000 72300 84000 72300 4 { T 83400 72300 5 10 1 1 0 0 1 -netname=seg_dp +netname=seg_box0_dp } N 86300 71500 86300 70500 4 { -T 85800 70800 5 10 1 1 0 0 1 -netname=seg_d +T 85300 70800 5 10 1 1 0 0 1 +netname=seg_pad_d } N 86800 71500 87200 71500 4 N 87200 71500 87200 70500 4 @@ -624,28 +614,28 @@ netname=com_0 N 87700 71500 87700 70500 4 { T 87800 70800 5 10 1 1 0 0 1 -netname=seg_d +netname=seg_pad_d } N 80300 77500 80300 78500 4 { -T 79800 78000 5 10 1 1 0 0 1 -netname=seg_a +T 79300 78000 5 10 1 1 0 0 1 +netname=seg_box0_a } N 81400 77500 80800 77500 4 N 80800 77500 80800 78500 4 { T 80900 78000 5 10 1 1 0 0 1 -netname=com_1 +netname=com_0 } N 81700 77500 81700 78500 4 { T 81800 78000 5 10 1 1 0 0 1 -netname=seg_a +netname=seg_box0_a } N 86300 77500 86300 78500 4 { -T 85800 78000 5 10 1 1 0 0 1 -netname=seg_a +T 85400 78000 5 10 1 1 0 0 1 +netname=seg_pad_a } N 87400 77500 86800 77500 4 N 86800 77500 86800 78500 4 @@ -656,7 +646,7 @@ netname=com_0 N 87700 77500 87700 78500 4 { T 87800 78000 5 10 1 1 0 0 1 -netname=seg_a +netname=seg_pad_a } C 56200 48500 1 0 0 gnd.sym N 54500 48800 58150 48800 4 @@ -1066,24 +1056,24 @@ N 89550 67300 90650 67300 4 T 90150 67400 5 10 1 1 0 0 1 netname=pad_b } -N 63100 76700 64400 76700 4 +N 63100 63900 64400 63900 4 { -T 63900 76800 5 10 1 1 0 0 1 +T 63900 64000 5 10 1 1 0 0 1 netname=box_b } -N 64400 76300 63100 76300 4 +N 64400 63500 63100 63500 4 { -T 63900 76400 5 10 1 1 0 0 1 +T 63900 63600 5 10 1 1 0 0 1 netname=box_a } -N 63100 75900 64400 75900 4 +N 63100 63100 64400 63100 4 { -T 63900 76000 5 10 1 1 0 0 1 +T 63900 63200 5 10 1 1 0 0 1 netname=pad_b } -N 63100 75500 64400 75500 4 +N 63100 62700 64400 62700 4 { -T 63900 75600 5 10 1 1 0 0 1 +T 63900 62800 5 10 1 1 0 0 1 netname=pad_a } C 74300 62000 1 0 0 switch-spst.sym @@ -1136,14 +1126,14 @@ loadstatus=noload T 74300 62800 5 10 0 0 0 0 1 graphical=1 } -N 63100 75100 64400 75100 4 +N 63100 62300 64400 62300 4 { -T 64100 75200 5 10 1 1 0 0 1 +T 64100 62400 5 10 1 1 0 0 1 netname=arm } -N 63100 74700 64400 74700 4 +N 63100 61900 64400 61900 4 { -T 64100 74800 5 10 1 1 0 0 1 +T 64100 62000 5 10 1 1 0 0 1 netname=fire } T 66075 74300 9 10 1 0 0 0 1 @@ -1777,23 +1767,6 @@ T 49600 64325 5 10 0 1 0 0 1 loadstatus=smt } C 58200 77800 1 0 0 gnd.sym -C 53600 57100 1 0 0 STM32L152-64.sym -{ -T 47200 55500 5 10 0 0 0 0 1 -device=IC -T 54000 77200 5 10 1 1 0 0 1 -refdes=U7 -T 53600 57100 5 10 0 0 0 0 1 -footprint=lqfp64 -T 53600 57100 5 10 0 0 0 0 1 -vendor=digikey -T 53600 57100 5 10 0 0 0 0 1 -vendor_part_number=497-11199-ND -T 53600 57100 5 10 0 0 0 0 1 -loadstatus=smt -T 53600 57100 5 10 0 0 0 0 1 -value=CPU -} N 63100 74300 65000 74300 4 N 65000 74300 65000 75100 4 N 65000 75100 65800 75100 4 @@ -2328,12 +2301,12 @@ netname=debug_data N 79400 50900 78100 50900 4 { T 78100 51000 5 10 1 1 0 0 1 -netname=miso2 +netname=mosi2 } N 78100 51300 79400 51300 4 { T 78100 51400 5 10 1 1 0 0 1 -netname=mosi2 +netname=miso2 } N 79400 51700 78100 51700 4 { @@ -2526,215 +2499,215 @@ T 41750 55700 5 10 0 0 0 0 1 device=CONNECTOR } C 78000 46600 1 0 0 gnd.sym -C 52900 57800 1 90 0 capacitor.sym +C 63800 67800 1 270 1 capacitor.sym { -T 52200 58000 5 10 0 0 90 0 1 +T 64500 68000 5 10 0 0 90 2 1 device=CAPACITOR -T 52600 58500 5 10 1 1 180 0 1 +T 64100 68500 5 10 1 1 180 6 1 refdes=C108 -T 52000 58000 5 10 0 0 90 0 1 +T 64700 68000 5 10 0 0 90 2 1 symversion=0.1 -T 52900 57800 5 10 0 0 0 0 1 +T 63800 67800 5 10 0 0 0 6 1 footprint=0402 -T 52200 57900 5 10 1 1 0 0 1 +T 64500 67900 5 10 1 1 0 6 1 value=47pF -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53200 5 10 0 2 0 6 1 loadstatus=smt -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53200 5 10 0 2 0 6 1 vendor=digikey -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53200 5 10 0 2 0 6 1 vendor_part_number=399-1019-1-ND } -C 52100 58200 1 90 0 capacitor.sym +C 64600 68200 1 270 1 capacitor.sym { -T 51400 58400 5 10 0 0 90 0 1 +T 65300 68400 5 10 0 0 90 2 1 device=CAPACITOR -T 51700 58900 5 10 1 1 180 0 1 +T 65000 68900 5 10 1 1 180 6 1 refdes=C107 -T 51200 58400 5 10 0 0 90 0 1 +T 65500 68400 5 10 0 0 90 2 1 symversion=0.1 -T 52100 58200 5 10 0 0 0 0 1 +T 64600 68200 5 10 0 0 0 6 1 footprint=0402 -T 51300 58300 5 10 1 1 0 0 1 +T 65400 68300 5 10 1 1 0 6 1 value=47pF -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53200 5 10 0 2 0 6 1 loadstatus=smt -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53200 5 10 0 2 0 6 1 vendor=digikey -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53200 5 10 0 2 0 6 1 vendor_part_number=399-1019-1-ND } -C 50400 58600 1 90 0 capacitor.sym +C 66300 69000 1 270 1 capacitor.sym { -T 49700 58800 5 10 0 0 90 0 1 +T 67000 69200 5 10 0 0 90 2 1 device=CAPACITOR -T 50100 59300 5 10 1 1 180 0 1 +T 66600 69700 5 10 1 1 180 6 1 refdes=C106 -T 49500 58800 5 10 0 0 90 0 1 +T 67200 69200 5 10 0 0 90 2 1 symversion=0.1 -T 50400 58600 5 10 0 0 0 0 1 +T 66300 69000 5 10 0 0 0 6 1 footprint=0402 -T 49700 58800 5 10 1 1 0 0 1 +T 67000 69200 5 10 1 1 0 6 1 value=47pF -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53600 5 10 0 2 0 6 1 loadstatus=smt -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53600 5 10 0 2 0 6 1 vendor=digikey -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53600 5 10 0 2 0 6 1 vendor_part_number=399-1019-1-ND } -C 49600 59000 1 90 0 capacitor.sym +C 67100 69400 1 270 1 capacitor.sym { -T 48900 59200 5 10 0 0 90 0 1 +T 67800 69600 5 10 0 0 90 2 1 device=CAPACITOR -T 49300 59700 5 10 1 1 180 0 1 +T 67400 70100 5 10 1 1 180 6 1 refdes=C105 -T 48700 59200 5 10 0 0 90 0 1 +T 68000 69600 5 10 0 0 90 2 1 symversion=0.1 -T 49600 59000 5 10 0 0 0 0 1 +T 67100 69400 5 10 0 0 0 6 1 footprint=0402 -T 48900 59200 5 10 1 1 0 0 1 +T 67800 69600 5 10 1 1 0 6 1 value=47pF -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53600 5 10 0 2 0 6 1 loadstatus=smt -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53600 5 10 0 2 0 6 1 vendor=digikey -T 48800 43200 5 10 0 2 0 0 1 +T 67900 53600 5 10 0 2 0 6 1 vendor_part_number=399-1019-1-ND } -C 49300 58700 1 0 0 gnd.sym -C 50100 58300 1 0 0 gnd.sym -C 51800 57900 1 0 0 gnd.sym -C 52600 57500 1 0 0 gnd.sym -C 52700 58600 1 0 0 resistor.sym +C 67400 69100 1 0 1 gnd.sym +C 66600 68700 1 0 1 gnd.sym +C 64900 67900 1 0 1 gnd.sym +C 64100 67500 1 0 1 gnd.sym +C 64000 68600 1 0 1 resistor.sym { -T 53000 59000 5 10 0 0 0 0 1 +T 63700 69000 5 10 0 0 0 6 1 device=RESISTOR -T 52800 58800 5 10 1 1 0 0 1 +T 63900 68800 5 10 1 1 0 6 1 refdes=R108 -T 52700 58600 5 10 0 0 0 0 1 +T 64000 68600 5 10 0 0 0 6 1 footprint=0402 -T 53300 58800 5 10 1 1 0 0 1 +T 63400 68800 5 10 1 1 0 6 1 value=330 -T 66500 53400 5 10 0 1 0 0 1 +T 50200 63400 5 10 0 1 0 6 1 loadstatus=smt -T 66500 53400 5 10 0 1 0 0 1 +T 50200 63400 5 10 0 1 0 6 1 vendor=digikey -T 66500 53400 5 10 0 1 0 0 1 -vendor_part_number=311-330CRCT-ND +T 50200 63400 5 10 0 1 0 6 1 +vendor_part_number=311-330LRCT-ND } -N 52700 58700 52200 58700 4 +N 64000 68700 64500 68700 4 { -T 52200 58800 5 10 1 1 0 0 1 +T 64500 68800 5 10 1 1 0 6 1 netname=mosi2 } -N 53600 59100 51900 59100 4 -C 51000 59000 1 0 0 resistor.sym +N 63100 69100 64800 69100 4 +C 65700 69000 1 0 1 resistor.sym { -T 51300 59400 5 10 0 0 0 0 1 +T 65400 69400 5 10 0 0 0 6 1 device=RESISTOR -T 51100 59200 5 10 1 1 0 0 1 +T 65600 69200 5 10 1 1 0 6 1 refdes=R107 -T 51000 59000 5 10 0 0 0 0 1 +T 65700 69000 5 10 0 0 0 6 1 footprint=0402 -T 51600 59200 5 10 1 1 0 0 1 +T 65100 69200 5 10 1 1 0 6 1 value=330 -T 66500 53400 5 10 0 1 0 0 1 +T 50200 63400 5 10 0 1 0 6 1 loadstatus=smt -T 66500 53400 5 10 0 1 0 0 1 +T 50200 63400 5 10 0 1 0 6 1 vendor=digikey -T 66500 53400 5 10 0 1 0 0 1 -vendor_part_number=311-330CRCT-ND +T 50200 63400 5 10 0 1 0 6 1 +vendor_part_number=311-330LRCT-ND } -N 51000 59100 50500 59100 4 +N 65700 69100 66200 69100 4 { -T 50500 59200 5 10 1 1 0 0 1 +T 66200 69200 5 10 1 1 0 6 1 netname=miso2 } -C 52700 59400 1 0 0 resistor.sym +C 64000 69800 1 0 1 resistor.sym { -T 53000 59800 5 10 0 0 0 0 1 +T 63700 70200 5 10 0 0 0 6 1 device=RESISTOR -T 52600 59600 5 10 1 1 0 0 1 +T 64100 70000 5 10 1 1 0 6 1 refdes=R106 -T 52700 59400 5 10 0 0 0 0 1 +T 64000 69800 5 10 0 0 0 6 1 footprint=0402 -T 53100 59600 5 10 1 1 0 0 1 +T 63600 70000 5 10 1 1 0 6 1 value=330 -T 66500 53400 5 10 0 1 0 0 1 +T 50200 63800 5 10 0 1 0 6 1 loadstatus=smt -T 66500 53400 5 10 0 1 0 0 1 +T 50200 63800 5 10 0 1 0 6 1 vendor=digikey -T 66500 53400 5 10 0 1 0 0 1 -vendor_part_number=311-330CRCT-ND +T 50200 63800 5 10 0 1 0 6 1 +vendor_part_number=311-330LRCT-ND } -C 52700 59800 1 0 0 resistor.sym +C 64000 70200 1 0 1 resistor.sym { -T 53000 60200 5 10 0 0 0 0 1 +T 63700 70600 5 10 0 0 0 6 1 device=RESISTOR -T 52600 60000 5 10 1 1 0 0 1 +T 64100 70400 5 10 1 1 0 6 1 refdes=R105 -T 52700 59800 5 10 0 0 0 0 1 +T 64000 70200 5 10 0 0 0 6 1 footprint=0402 -T 53100 60000 5 10 1 1 0 0 1 +T 63600 70400 5 10 1 1 0 6 1 value=330 -T 66500 53400 5 10 0 1 0 0 1 +T 50200 63800 5 10 0 1 0 6 1 loadstatus=smt -T 66500 53400 5 10 0 1 0 0 1 +T 50200 63800 5 10 0 1 0 6 1 vendor=digikey -T 66500 53400 5 10 0 1 0 0 1 -vendor_part_number=311-330CRCT-ND +T 50200 63800 5 10 0 1 0 6 1 +vendor_part_number=311-330LRCT-ND } -N 52700 59500 49700 59500 4 +N 64000 69900 67000 69900 4 { -T 49700 59600 5 10 1 1 0 0 1 +T 67000 70000 5 10 1 1 0 6 1 netname=c2 } -N 52700 59900 48900 59900 4 +N 64000 70300 67800 70300 4 { -T 48900 60000 5 10 1 1 0 0 1 +T 67800 70400 5 10 1 1 0 6 1 netname=cs_radio } -C 64600 70200 1 90 0 capacitor.sym +C 68800 70200 1 90 0 capacitor.sym { -T 63900 70400 5 10 0 0 90 0 1 +T 68100 70400 5 10 0 0 90 0 1 device=CAPACITOR -T 64300 70900 5 10 1 1 180 0 1 +T 68500 70900 5 10 1 1 180 0 1 refdes=C109 -T 63700 70400 5 10 0 0 90 0 1 +T 67900 70400 5 10 0 0 90 0 1 symversion=0.1 -T 64600 70200 5 10 0 0 0 0 1 +T 68800 70200 5 10 0 0 0 0 1 footprint=0402 -T 63900 70400 5 10 1 1 0 0 1 +T 68100 70400 5 10 1 1 0 0 1 value=47pF -T 48800 43200 5 10 0 2 0 0 1 +T 53000 43200 5 10 0 2 0 0 1 loadstatus=smt -T 48800 43200 5 10 0 2 0 0 1 +T 53000 43200 5 10 0 2 0 0 1 vendor=digikey -T 48800 43200 5 10 0 2 0 0 1 +T 53000 43200 5 10 0 2 0 0 1 vendor_part_number=399-1019-1-ND } -C 65300 71200 1 180 0 resistor.sym +C 69500 71200 1 180 0 resistor.sym { -T 65000 70800 5 10 0 0 180 0 1 +T 69200 70800 5 10 0 0 180 0 1 device=RESISTOR -T 65100 71400 5 10 1 1 180 0 1 +T 69300 71400 5 10 1 1 180 0 1 refdes=R109 -T 65300 71200 5 10 0 0 0 0 1 +T 69500 71200 5 10 0 0 0 0 1 footprint=0402 -T 64700 70800 5 10 1 1 0 0 1 +T 68900 70800 5 10 1 1 0 0 1 value=330 -T 66500 53400 5 10 0 1 0 0 1 +T 70700 53400 5 10 0 1 0 0 1 loadstatus=smt -T 66500 53400 5 10 0 1 0 0 1 +T 70700 53400 5 10 0 1 0 0 1 vendor=digikey -T 66500 53400 5 10 0 1 0 0 1 -vendor_part_number=311-330CRCT-ND +T 70700 53400 5 10 0 1 0 0 1 +vendor_part_number=311-330LRCT-ND } -C 64300 69900 1 0 0 gnd.sym -N 65300 71100 65800 71100 4 +C 68500 69900 1 0 0 gnd.sym +N 69500 71100 70000 71100 4 { -T 65300 70900 5 10 1 1 0 0 1 +T 69500 70900 5 10 1 1 0 0 1 netname=radio_int } C 56900 77600 1 90 0 capacitor.sym @@ -2912,13 +2885,6 @@ value=NoConnection T 84400 49000 5 10 0 0 0 0 1 device=DRC_Directive } -C 63100 69400 1 0 0 nc-right-1.sym -{ -T 63200 69900 5 10 0 0 0 0 1 -value=NoConnection -T 63200 70100 5 10 0 0 0 0 1 -device=DRC_Directive -} C 63100 70600 1 0 0 nc-right-1.sym { T 63200 71100 5 10 0 0 0 0 1 @@ -2947,20 +2913,6 @@ value=NoConnection T 53100 69800 5 10 0 0 0 0 1 device=DRC_Directive } -C 53100 63000 1 0 0 nc-left-1.sym -{ -T 53100 63400 5 10 0 0 0 0 1 -value=NoConnection -T 53100 63800 5 10 0 0 0 0 1 -device=DRC_Directive -} -C 53100 62600 1 0 0 nc-left-1.sym -{ -T 53100 63000 5 10 0 0 0 0 1 -value=NoConnection -T 53100 63400 5 10 0 0 0 0 1 -device=DRC_Directive -} C 53100 62200 1 0 0 nc-left-1.sym { T 53100 62600 5 10 0 0 0 0 1 @@ -2975,13 +2927,6 @@ value=NoConnection T 53100 62600 5 10 0 0 0 0 1 device=DRC_Directive } -C 53100 61400 1 0 0 nc-left-1.sym -{ -T 53100 61800 5 10 0 0 0 0 1 -value=NoConnection -T 53100 62200 5 10 0 0 0 0 1 -device=DRC_Directive -} C 53100 61000 1 0 0 nc-left-1.sym { T 53100 61400 5 10 0 0 0 0 1 @@ -2989,20 +2934,6 @@ value=NoConnection T 53100 61800 5 10 0 0 0 0 1 device=DRC_Directive } -C 53100 60600 1 0 0 nc-left-1.sym -{ -T 53100 61000 5 10 0 0 0 0 1 -value=NoConnection -T 53100 61400 5 10 0 0 0 0 1 -device=DRC_Directive -} -C 53100 60200 1 0 0 nc-left-1.sym -{ -T 53100 60600 5 10 0 0 0 0 1 -value=NoConnection -T 53100 61000 5 10 0 0 0 0 1 -device=DRC_Directive -} C 78900 54400 1 0 0 nc-left-1.sym { T 78900 54800 5 10 0 0 0 0 1 @@ -3059,10 +2990,295 @@ value=NoConnection T 78900 46800 5 10 0 0 0 0 1 device=DRC_Directive } -C 53100 65000 1 0 0 nc-left-1.sym +N 53600 63100 52300 63100 4 +{ +T 52350 63200 5 10 1 1 0 0 1 +netname=seg_pad_c +} +N 53600 62700 52300 62700 4 +{ +T 52350 62800 5 10 1 1 0 0 1 +netname=seg_pad_d +} +N 53600 60700 52300 60700 4 +{ +T 52350 60800 5 10 1 1 0 0 1 +netname=seg_box0_a +} +N 53600 60300 52300 60300 4 +{ +T 52350 60400 5 10 1 1 0 0 1 +netname=seg_box0_b +} +C 53600 57100 1 0 0 STM32L152-100.sym +{ +T 47200 55500 5 10 0 0 0 0 1 +device=STM32L152-100 +T 54000 77200 5 10 1 1 0 0 1 +refdes=U7 +T 53600 57100 5 10 0 0 0 0 1 +footprint=lqfp100 +} +N 53600 59900 52300 59900 4 +{ +T 52350 60000 5 10 1 1 0 0 1 +netname=seg_box0_g +} +N 53600 59500 52300 59500 4 +{ +T 52350 59600 5 10 1 1 0 0 1 +netname=seg_pad_f +} +N 53600 59100 52300 59100 4 +{ +T 52350 59200 5 10 1 1 0 0 1 +netname=seg_pad_a +} +N 53600 58700 52300 58700 4 +{ +T 52350 58800 5 10 1 1 0 0 1 +netname=seg_pad_b +} +N 53600 61500 52300 61500 4 +{ +T 52350 61600 5 10 1 1 0 0 1 +netname=seg_pad_e +} +N 53600 65100 52300 65100 4 +{ +T 52300 65200 5 10 1 1 0 0 1 +netname=seg_pad_g +} +N 63100 76700 64400 76700 4 +{ +T 63100 76700 5 10 1 1 0 0 1 +netname=seg_box0_dp +} +N 63100 76300 64400 76300 4 +{ +T 63100 76300 5 10 1 1 0 0 1 +netname=seg_box0_c +} +N 63100 75900 64400 75900 4 +{ +T 63100 75900 5 10 1 1 0 0 1 +netname=seg_box0_d +} +N 63100 75500 64400 75500 4 +{ +T 63100 75500 5 10 1 1 0 0 1 +netname=seg_box0_e +} +N 63100 75100 64400 75100 4 +{ +T 63100 75100 5 10 1 1 0 0 1 +netname=seg_box1_a +} +N 63100 74700 64400 74700 4 +{ +T 63100 74700 5 10 1 1 0 0 1 +netname=seg_box1_b +} +C 63100 68200 1 0 0 nc-right-1.sym +{ +T 63200 68700 5 10 0 0 0 0 1 +value=NoConnection +T 63200 68900 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 67800 1 0 0 nc-right-1.sym { -T 53100 65400 5 10 0 0 0 0 1 +T 63200 68300 5 10 0 0 0 0 1 value=NoConnection -T 53100 65800 5 10 0 0 0 0 1 +T 63200 68500 5 10 0 0 0 0 1 device=DRC_Directive } +C 63100 67400 1 0 0 nc-right-1.sym +{ +T 63200 67900 5 10 0 0 0 0 1 +value=NoConnection +T 63200 68100 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 67000 1 0 0 nc-right-1.sym +{ +T 63200 67500 5 10 0 0 0 0 1 +value=NoConnection +T 63200 67700 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 66600 1 0 0 nc-right-1.sym +{ +T 63200 67100 5 10 0 0 0 0 1 +value=NoConnection +T 63200 67300 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 66200 1 0 0 nc-right-1.sym +{ +T 63200 66700 5 10 0 0 0 0 1 +value=NoConnection +T 63200 66900 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 65800 1 0 0 nc-right-1.sym +{ +T 63200 66300 5 10 0 0 0 0 1 +value=NoConnection +T 63200 66500 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 65400 1 0 0 nc-right-1.sym +{ +T 63200 65900 5 10 0 0 0 0 1 +value=NoConnection +T 63200 66100 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 65000 1 0 0 nc-right-1.sym +{ +T 63200 65500 5 10 0 0 0 0 1 +value=NoConnection +T 63200 65700 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 64600 1 0 0 nc-right-1.sym +{ +T 63200 65100 5 10 0 0 0 0 1 +value=NoConnection +T 63200 65300 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 64200 1 0 0 nc-right-1.sym +{ +T 63200 64700 5 10 0 0 0 0 1 +value=NoConnection +T 63200 64900 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 61400 1 0 0 nc-right-1.sym +{ +T 63200 61900 5 10 0 0 0 0 1 +value=NoConnection +T 63200 62100 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 61000 1 0 0 nc-right-1.sym +{ +T 63200 61500 5 10 0 0 0 0 1 +value=NoConnection +T 63200 61700 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 60600 1 0 0 nc-right-1.sym +{ +T 63200 61100 5 10 0 0 0 0 1 +value=NoConnection +T 63200 61300 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 60200 1 0 0 nc-right-1.sym +{ +T 63200 60700 5 10 0 0 0 0 1 +value=NoConnection +T 63200 60900 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 59800 1 0 0 nc-right-1.sym +{ +T 63200 60300 5 10 0 0 0 0 1 +value=NoConnection +T 63200 60500 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 59400 1 0 0 nc-right-1.sym +{ +T 63200 59900 5 10 0 0 0 0 1 +value=NoConnection +T 63200 60100 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 59000 1 0 0 nc-right-1.sym +{ +T 63200 59500 5 10 0 0 0 0 1 +value=NoConnection +T 63200 59700 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 58600 1 0 0 nc-right-1.sym +{ +T 63200 59100 5 10 0 0 0 0 1 +value=NoConnection +T 63200 59300 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 58200 1 0 0 nc-right-1.sym +{ +T 63200 58700 5 10 0 0 0 0 1 +value=NoConnection +T 63200 58900 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 57800 1 0 0 nc-right-1.sym +{ +T 63200 58300 5 10 0 0 0 0 1 +value=NoConnection +T 63200 58500 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 53100 67400 1 0 0 nc-left-1.sym +{ +T 53100 67800 5 10 0 0 0 0 1 +value=NoConnection +T 53100 68200 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 53100 67000 1 0 0 nc-left-1.sym +{ +T 53100 67400 5 10 0 0 0 0 1 +value=NoConnection +T 53100 67800 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 69400 1 0 0 nc-right-1.sym +{ +T 63200 69900 5 10 0 0 0 0 1 +value=NoConnection +T 63200 70100 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 53100 76200 1 0 0 nc-left-1.sym +{ +T 53100 76600 5 10 0 0 0 0 1 +value=NoConnection +T 53100 77000 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 53100 75800 1 0 0 nc-left-1.sym +{ +T 53100 76200 5 10 0 0 0 0 1 +value=NoConnection +T 53100 76600 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 53100 73800 1 0 0 nc-left-1.sym +{ +T 53100 74200 5 10 0 0 0 0 1 +value=NoConnection +T 53100 74600 5 10 0 0 0 0 1 +device=DRC_Directive +} +N 84000 75200 84900 75200 4 +{ +T 84000 75200 5 10 1 1 0 0 1 +netname=seg_pad_g +} +N 84900 75200 84900 74500 4 +N 84900 74500 85000 74500 4 +N 78000 75200 78900 75200 4 +{ +T 78000 75200 5 10 1 1 0 0 1 +netname=seg_box0_g +} +N 78900 75200 78900 74500 4 +N 78900 74500 79000 74500 4 -- 2.30.2