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+}
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+T 54450 44250 8 10 0 0 0 0 1
+net=GND:1
+]
N 52450 44500 56550 44500 4
-C 52650 44500 1 90 0 capacitor.sym
+C 52650 44500 1 90 0 EMBEDDEDcapacitor.sym
+[
+P 52450 44500 52450 44700 1 0 0
+{
+T 52400 44650 5 8 0 1 90 6 1
+pinnumber=1
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+pinlabel=1
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+pintype=pas
+}
+P 52450 45400 52450 45200 1 0 0
+{
+T 52400 45250 5 8 0 1 90 0 1
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+}
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+device=CAPACITOR
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+refdes=C?
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+description=capacitor
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+numslots=0
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+symversion=0.1
+]
{
T 51950 44700 5 10 0 0 90 0 1
device=CAPACITOR
}
N 52450 45800 52450 45400 4
N 54250 44500 54250 44900 4
-C 51500 43550 1 90 0 resistor.sym
+C 51500 43550 1 90 0 EMBEDDEDresistor.sym
+[
+L 51300 44150 51500 44050 3 0 0 0 -1 -1
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+}
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+}
+L 51300 43751 51400 43700 3 0 0 0 -1 -1
+T 51200 43750 8 10 0 1 90 0 1
+refdes=R?
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+pins=2
+T 51500 43550 8 10 0 1 90 0 1
+class=DISCRETE
+]
{
T 51100 43850 5 10 0 0 90 0 1
device=RESISTOR
T 51500 43550 5 10 0 0 0 0 1
footprint=0402
}
-C 51500 42450 1 90 0 resistor.sym
+C 51500 42450 1 90 0 EMBEDDEDresistor.sym
+[
+L 51300 43050 51500 42950 3 0 0 0 -1 -1
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+pintype=pas
+}
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+}
+L 51300 42651 51400 42600 3 0 0 0 -1 -1
+T 51200 42650 8 10 0 1 90 0 1
+refdes=R?
+T 51500 42450 8 10 0 1 90 0 1
+pins=2
+T 51500 42450 8 10 0 1 90 0 1
+class=DISCRETE
+]
{
T 51100 42750 5 10 0 0 90 0 1
device=RESISTOR
T 52400 43550 5 10 1 1 0 0 1
netname=sense_batt
}
-C 51300 42150 1 0 0 gnd.sym
+C 51300 42150 1 0 0 EMBEDDEDgnd.sym
+[
+P 51400 42250 51400 42450 1 0 1
+{
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+pintype=pwr
+}
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+T 51600 42200 8 10 0 0 0 0 1
+net=GND:1
+]
N 53150 45400 53050 45400 4
N 53050 45400 53050 45800 4
N 51400 44450 51400 45800 4
Make it possible to sample
battery voltage with ADC
N 55250 45800 56550 45800 4
-C 56350 45800 1 0 0 3.3V-plus.sym
+C 56350 45800 1 0 0 EMBEDDED3.3V-plus.sym
+[
+P 56550 45800 56550 46000 1 0 0
+{
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+}
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++3.3V
+T 56650 45800 8 8 0 0 0 0 1
+net=+3.3V:1
+]
N 48100 64700 46700 64700 4
{
T 46700 64800 5 10 1 1 0 0 1
netname=sense_batt
}
-C 43100 52100 1 90 0 resistor.sym
+C 43100 52100 1 90 0 EMBEDDEDresistor.sym
+[
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+}
+P 43000 52100 43000 52252 1 0 0
+{
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+}
+L 42900 52301 43000 52250 3 0 0 0 -1 -1
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+refdes=R?
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+pins=2
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+class=DISCRETE
+]
{
T 42700 52400 5 10 0 0 90 0 1
device=RESISTOR
T 44600 64000 5 10 1 1 0 0 1
netname=fire
}
-C 44500 58000 1 180 0 led.sym
+C 44500 58000 1 180 0 EMBEDDEDled.sym
+[
+T 44550 57700 8 10 0 1 180 0 1
+refdes=D?
+T 44600 57400 8 10 0 0 180 0 1
+device=LED
+P 44500 57900 44350 57900 1 0 0
+{
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+}
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+}
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+]
{
T 44100 57950 5 10 1 1 0 6 1
refdes=D3
T 44550 57950 5 10 1 1 0 0 1
value=red
}
-C 61350 70400 1 180 1 led.sym
+C 61350 70400 1 180 1 EMBEDDEDled.sym
+[
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+refdes=D?
+T 61250 69800 8 10 0 0 180 6 1
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+P 61350 70300 61500 70300 1 0 0
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+}
+P 61750 70300 61600 70300 1 0 0
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+pintype=pas
+}
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+]
{
T 61800 70350 5 10 1 1 0 0 1
refdes=D4
T 61400 70400 5 10 1 1 0 6 1
value=green
}
-C 61400 65200 1 180 1 led.sym
+C 61400 65200 1 180 1 EMBEDDEDled.sym
+[
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+refdes=D?
+T 61300 64600 8 10 0 0 180 6 1
+device=LED
+P 61400 65100 61550 65100 1 0 0
+{
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+pinnumber=1
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+pintype=pas
+}
+P 61800 65100 61650 65100 1 0 0
+{
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+pinnumber=2
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+}
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+]
{
T 61850 65150 5 10 1 1 0 0 1
refdes=D5
T 61450 65200 5 10 1 1 0 6 1
value=green
}
-C 61400 65600 1 180 1 led.sym
+C 61400 65600 1 180 1 EMBEDDEDled.sym
+[
+T 61350 65300 8 10 0 1 180 6 1
+refdes=D?
+T 61300 65000 8 10 0 0 180 6 1
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+P 61400 65500 61550 65500 1 0 0
+{
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+}
+P 61800 65500 61650 65500 1 0 0
+{
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+}
+L 61550 65400 61650 65500 3 0 0 0 -1 -1
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+]
{
T 61850 65550 5 10 1 1 0 0 1
refdes=D6
T 61450 65600 5 10 1 1 0 6 1
value=green
}
-C 61400 66000 1 180 1 led.sym
+C 61400 66000 1 180 1 EMBEDDEDled.sym
+[
+T 61350 65700 8 10 0 1 180 6 1
+refdes=D?
+T 61300 65400 8 10 0 0 180 6 1
+device=LED
+P 61400 65900 61550 65900 1 0 0
+{
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+pinnumber=1
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+pinseq=1
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+pintype=pas
+}
+P 61800 65900 61650 65900 1 0 0
+{
+T 61600 65850 5 8 0 1 180 6 1
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+T 61600 65850 5 8 0 0 180 6 1
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+pintype=pas
+}
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+]
{
T 61850 65950 5 10 1 1 0 0 1
refdes=D7
T 61450 66000 5 10 1 1 0 6 1
value=green
}
-C 45350 58000 1 180 1 resistor.sym
+C 45350 58000 1 180 1 EMBEDDEDresistor.sym
+[
+L 45950 57800 45850 58000 3 0 0 0 -1 -1
+L 45850 58000 45750 57800 3 0 0 0 -1 -1
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+P 46250 57900 46100 57900 1 0 0
+{
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+pinnumber=2
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+pintype=pas
+}
+P 45350 57900 45502 57900 1 0 0
+{
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+pintype=pas
+}
+L 45551 57800 45500 57900 3 0 0 0 -1 -1
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+refdes=R?
+T 45350 58000 8 10 0 1 180 6 1
+pins=2
+T 45350 58000 8 10 0 1 180 6 1
+class=DISCRETE
+]
{
T 45650 57600 5 10 0 0 180 6 1
device=RESISTOR
T 45350 58000 5 10 0 0 180 6 1
footprint=0402
}
-C 60450 70400 1 180 0 resistor.sym
+C 60450 70400 1 180 0 EMBEDDEDresistor.sym
+[
+L 59850 70200 59950 70400 3 0 0 0 -1 -1
+L 59950 70400 60050 70200 3 0 0 0 -1 -1
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+P 59550 70300 59700 70300 1 0 0
+{
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+pinnumber=2
+T 59650 70250 5 8 0 0 180 0 1
+pinseq=2
+T 59650 70250 5 8 0 1 180 0 1
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+T 59650 70250 5 8 0 1 180 0 1
+pintype=pas
+}
+P 60450 70300 60298 70300 1 0 0
+{
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+}
+L 60249 70200 60300 70300 3 0 0 0 -1 -1
+T 60250 70100 8 10 0 1 180 0 1
+refdes=R?
+T 60450 70400 8 10 0 1 180 0 1
+pins=2
+T 60450 70400 8 10 0 1 180 0 1
+class=DISCRETE
+]
{
T 60150 70000 5 10 0 0 180 0 1
device=RESISTOR
T 60450 70400 5 10 0 0 180 0 1
footprint=0402
}
-C 60500 65200 1 180 0 resistor.sym
+C 60500 65200 1 180 0 EMBEDDEDresistor.sym
+[
+L 59900 65000 60000 65200 3 0 0 0 -1 -1
+L 60000 65200 60100 65000 3 0 0 0 -1 -1
+L 60100 65000 60200 65200 3 0 0 0 -1 -1
+L 60200 65200 60300 65000 3 0 0 0 -1 -1
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+device=RESISTOR
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+P 59600 65100 59750 65100 1 0 0
+{
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+pinnumber=2
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+pintype=pas
+}
+P 60500 65100 60348 65100 1 0 0
+{
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+pinnumber=1
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+pinseq=1
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+pintype=pas
+}
+L 60299 65000 60350 65100 3 0 0 0 -1 -1
+T 60300 64900 8 10 0 1 180 0 1
+refdes=R?
+T 60500 65200 8 10 0 1 180 0 1
+pins=2
+T 60500 65200 8 10 0 1 180 0 1
+class=DISCRETE
+]
{
T 60200 64800 5 10 0 0 180 0 1
device=RESISTOR
T 60500 65200 5 10 0 0 180 0 1
footprint=0402
}
-C 60500 65600 1 180 0 resistor.sym
+C 60500 65600 1 180 0 EMBEDDEDresistor.sym
+[
+L 59900 65400 60000 65600 3 0 0 0 -1 -1
+L 60000 65600 60100 65400 3 0 0 0 -1 -1
+L 60100 65400 60200 65600 3 0 0 0 -1 -1
+L 60200 65600 60300 65400 3 0 0 0 -1 -1
+T 60200 65200 5 10 0 0 180 0 1
+device=RESISTOR
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+P 59600 65500 59750 65500 1 0 0
+{
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+pinseq=2
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+}
+P 60500 65500 60348 65500 1 0 0
+{
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+}
+L 60299 65400 60350 65500 3 0 0 0 -1 -1
+T 60300 65300 8 10 0 1 180 0 1
+refdes=R?
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+pins=2
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+class=DISCRETE
+]
{
T 60200 65200 5 10 0 0 180 0 1
device=RESISTOR
T 60500 65600 5 10 0 0 180 0 1
footprint=0402
}
-C 60500 66000 1 180 0 resistor.sym
+C 60500 66000 1 180 0 EMBEDDEDresistor.sym
+[
+L 59900 65800 60000 66000 3 0 0 0 -1 -1
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+L 60200 66000 60300 65800 3 0 0 0 -1 -1
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{
T 78000 57400 5 10 0 0 270 0 1
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T 77300 57600 5 10 0 0 0 0 1
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}
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{
T 76700 57400 5 10 0 0 270 0 1
device=CAPACITOR
T 76000 57600 5 10 0 0 0 0 1
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}
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N 77500 57600 77500 58000 4
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+}
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+}
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{
T 69900 58800 5 10 1 1 0 0 1
refdes=U6
T 72000 58800 5 10 1 1 0 0 1
value=CC1200
}
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-C 73700 51000 1 90 0 inductor.sym
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T 73200 51200 5 10 0 0 90 0 1
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T 73700 51000 5 10 0 1 0 0 1
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}
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{
T 73300 50200 5 10 0 0 90 0 1
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T 73700 49900 5 10 0 1 0 0 1
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T 75000 49900 5 10 0 1 0 0 1
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T 74300 49000 5 10 0 0 90 0 1
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T 68100 55800 5 10 1 1 180 0 1
value=0.22uF
}
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N 69500 56400 68100 56400 4
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-C 67700 58400 1 0 0 3.3V-plus.sym
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N 69500 58400 67900 58400 4
N 69500 56800 67400 56800 4
-C 68100 57500 1 90 0 capacitor.sym
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+}
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{
T 67400 57700 5 10 0 0 90 0 1
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T 67800 57700 5 10 1 1 180 0 1
value=47nF
}
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-C 67200 56800 1 0 0 3.3V-plus.sym
-C 67600 55900 1 90 0 capacitor.sym
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+}
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+}
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+}
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{
T 66900 56100 5 10 0 0 90 0 1
device=CAPACITOR
T 67300 56100 5 10 1 1 180 0 1
value=47nF
}
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-C 68100 52800 1 0 0 3.3V-plus.sym
-C 68500 51900 1 90 0 capacitor.sym
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+}
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{
T 67800 52100 5 10 0 0 90 0 1
device=CAPACITOR
T 68200 52100 5 10 1 1 180 0 1
value=47nF
}
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-C 67200 53600 1 0 0 3.3V-plus.sym
-C 67600 52700 1 90 0 capacitor.sym
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+}
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+}
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{
T 66900 52900 5 10 0 0 90 0 1
device=CAPACITOR
T 67300 52900 5 10 1 1 180 0 1
value=47nF
}
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N 69500 52800 68300 52800 4
N 68900 52200 68900 53200 4
N 68900 53200 69500 53200 4
N 69500 54000 68800 54000 4
N 69500 53600 67400 53600 4
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N 73100 58400 73500 58400 4
N 68800 54000 68800 53600 4
N 69500 57200 68500 57200 4
T 79300 49400 9 10 1 0 0 0 2
SMA is optional
default is wire whip
-C 69000 54700 1 0 0 nc-left.sym
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{
T 69000 55100 5 10 0 0 0 0 1
value=NoConnection
T 69000 55500 5 10 0 0 0 0 1
device=DRC_Directive
}
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+]
{
T 69000 52700 5 10 0 0 0 0 1
value=NoConnection
T 69000 53100 5 10 0 0 0 0 1
device=DRC_Directive
}
-C 76500 57200 1 0 0 ABM8.sym
+C 76500 57200 1 0 0 EMBEDDEDABM8.sym
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+}
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+}
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+}
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+}
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{
T 76700 57700 5 10 0 0 0 0 1
device=CRYSTAL
T 76500 57200 5 10 0 0 0 0 1
footprint=NDK32
}
-C 44500 52350 1 180 1 conn-6.sym
+C 44500 52350 1 180 1 EMBEDDEDconn-6.sym
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+}
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+}
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+}
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+}
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+refdes=J?
+]
{
T 44755 52555 5 10 1 1 180 6 1
refdes=J100
T 44600 49850 5 10 1 1 0 0 1
value=encoder
}
-C 43900 52100 1 90 0 resistor.sym
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+}
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+}
+L 43700 52301 43800 52250 3 0 0 0 -1 -1
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+refdes=R?
+T 43900 52100 8 10 0 1 90 0 1
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{
T 43500 52400 5 10 0 0 90 0 1
device=RESISTOR
T 44100 52400 5 10 1 1 90 0 1
value=2.2k
}
-C 44000 53250 1 0 0 3.3V-plus.sym
-C 44100 49750 1 0 0 gnd.sym
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+}
+L 44050 53450 44350 53450 3 0 0 0 -1 -1
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++3.3V
+T 44300 53250 8 8 0 0 0 0 1
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+}
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N 44500 50250 44200 50250 4
N 44200 50050 44200 50650 4
N 44500 52250 44200 52250 4
T 41700 51150 5 10 1 1 0 0 1
netname=encoder_select
}
-C 44500 59400 1 0 1 led.sym
+C 44500 59400 1 0 1 EMBEDDEDled.sym
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+}
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{
T 44600 60000 5 10 0 0 0 6 1
device=LED
T 44450 59600 5 10 1 1 0 0 1
value=yellow
}
-C 46200 59400 1 0 1 resistor.sym
+C 46200 59400 1 0 1 EMBEDDEDresistor.sym
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+}
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+}
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{
T 45900 59800 5 10 0 0 0 6 1
device=RESISTOR
value=360
}
N 44500 59500 45300 59500 4
-C 44500 61400 1 0 1 led.sym
+C 44500 61400 1 0 1 EMBEDDEDled.sym
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+}
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+}
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{
T 44600 62000 5 10 0 0 0 6 1
device=LED
T 44450 61600 5 10 1 1 0 0 1
value=yellow
}
-C 46200 61400 1 0 1 resistor.sym
+C 46200 61400 1 0 1 EMBEDDEDresistor.sym
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+}
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+}
+L 45999 61600 46050 61500 3 0 0 0 -1 -1
+T 46000 61700 8 10 0 1 0 6 1
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{
T 45900 61800 5 10 0 0 0 6 1
device=RESISTOR
T 46700 61600 5 10 1 1 0 0 1
netname=select_bank
}
-C 62300 64600 1 0 0 gnd.sym
+C 62300 64600 1 0 0 EMBEDDEDgnd.sym
+[
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+}
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N 44100 59500 43700 59500 4
N 44100 61500 43600 61500 4
N 42050 60300 42050 59900 4
T 61400 55600 9 10 1 0 0 0 1
On / Off
-C 44750 44900 1 180 1 led.sym
+C 44750 44900 1 180 1 EMBEDDEDled.sym
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+T 44650 44300 8 10 0 0 180 6 1
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+}
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+}
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{
T 44650 44300 5 10 0 0 180 6 1
device=LED
T 44650 44600 5 10 1 1 0 0 1
refdes=D1
}
-C 44750 44400 1 180 1 led.sym
+C 44750 44400 1 180 1 EMBEDDEDled.sym
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+}
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+}
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{
T 44650 43800 5 10 0 0 180 6 1
device=LED
N 45150 44800 45350 44800 4
N 45150 44300 46250 44300 4
N 44750 44300 44450 44300 4
-C 56750 44500 1 90 0 capacitor.sym
+C 56750 44500 1 90 0 EMBEDDEDcapacitor.sym
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+}
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+}
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{
T 56050 44700 5 10 0 0 90 0 1
device=CAPACITOR
value=1uF
}
N 56550 45800 56550 45400 4
-C 44500 58800 1 180 0 led.sym
+C 44500 58800 1 180 0 EMBEDDEDled.sym
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+}
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+}
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{
T 44600 58200 5 10 0 0 180 0 1
device=LED
T 44500 58800 5 10 1 1 0 0 1
value=green
}
-C 44550 65200 1 180 0 led.sym
+C 44550 65200 1 180 0 EMBEDDEDled.sym
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+}
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{
T 44650 64600 5 10 0 0 180 0 1
device=LED
T 44500 65200 5 10 1 1 0 0 1
value=green
}
-C 44550 65600 1 180 0 led.sym
+C 44550 65600 1 180 0 EMBEDDEDled.sym
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{
T 44650 65000 5 10 0 0 180 0 1
device=LED
T 44500 65600 5 10 1 1 0 0 1
value=green
}
-C 61350 70000 1 180 1 led.sym
+C 61350 70000 1 180 1 EMBEDDEDled.sym
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{
T 61250 69400 5 10 0 0 180 6 1
device=LED
T 61400 70000 5 10 1 1 0 6 1
value=green
}
-C 45300 58800 1 180 1 resistor.sym
+C 45300 58800 1 180 1 EMBEDDEDresistor.sym
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+}
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+]
{
T 45600 58400 5 10 0 0 180 6 1
device=RESISTOR
T 45450 58750 5 10 1 1 0 6 1
value=140
}
-C 45300 65200 1 180 1 resistor.sym
+C 45300 65200 1 180 1 EMBEDDEDresistor.sym
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+}
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{
T 45600 64800 5 10 0 0 180 6 1
device=RESISTOR
T 46100 65200 5 10 1 1 0 6 1
value=140
}
-C 45300 65600 1 180 1 resistor.sym
+C 45300 65600 1 180 1 EMBEDDEDresistor.sym
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Copyright 2023 by Bdale Garbee and Keith Packard
License: TAPR Open Hardware License
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T 59000 66800 5 10 1 1 0 6 1
netname=cs_companion1
}
-C 57600 63800 1 0 0 nc-right.sym
+C 57600 63800 1 0 0 EMBEDDEDnc-right.sym
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+}
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{
T 57700 64300 5 10 0 0 0 0 1
value=NoConnection
netname=spare4
}
N 53700 72000 53700 71900 4
-C 43500 61200 1 0 0 gnd.sym
+C 43500 61200 1 0 0 EMBEDDEDgnd.sym
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N 62350 69700 62350 70300 4
N 44150 65500 43600 65500 4
-C 62250 69400 1 0 0 gnd.sym
+C 62250 69400 1 0 0 EMBEDDEDgnd.sym
+[
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+}
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+L 62330 69410 62370 69410 3 0 0 0 -1 -1
+T 62550 69450 8 10 0 0 0 0 1
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+]
N 43600 65500 43600 61500 4
-C 47600 61800 1 0 0 nc-left.sym
+C 47600 61800 1 0 0 EMBEDDEDnc-left.sym
+[
+P 48100 61900 47900 61900 1 0 0
+{
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+}
+L 47900 61800 47900 62000 3 0 0 0 -1 -1
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+]
{
T 47600 62200 5 10 0 0 0 0 1
value=NoConnection
T 47600 62600 5 10 0 0 0 0 1
device=DRC_Directive
}
-C 40950 59000 1 0 0 nc-bottom.sym
+C 40950 59000 1 0 0 EMBEDDEDnc-bottom.sym
+[
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+{
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+}
+L 41300 59200 41000 59200 3 0 0 0 -1 -1
+T 41150 59150 9 10 1 0 180 3 1
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+T 40950 60000 8 10 0 0 0 0 1
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+graphical=1
+]
{
T 40950 59600 5 10 0 0 0 0 1
value=NoConnection
T 40950 60000 5 10 0 0 0 0 1
device=DRC_Directive
}
-C 53150 44900 1 0 0 TLV733.sym
+C 53150 44900 1 0 0 EMBEDDEDTLV733.sym
+[
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+{
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+}
+P 53150 45400 53450 45400 1 0 0
+{
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+}
+P 55250 45800 54950 45800 1 0 0
+{
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+pinnumber=5
+}
+P 54250 44900 54250 45200 1 0 0
+{
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+T 54455 44950 5 10 1 1 0 6 1
+pinnumber=2
+}
+B 53450 45200 1500 800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 53445 46095 8 10 0 1 0 0 1
+refdes=U?
+T 54955 46095 8 10 0 1 0 6 1
+value=TLV73333
+T 53445 46595 8 10 0 0 0 0 1
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+P 55250 45400 54950 45400 1 0 0
+{
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+}
+T 53445 46795 8 10 0 0 0 0 1
+datasheet=ti/tlv733p-q1.pdf
+T 53445 46395 8 10 0 0 0 0 1
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+]
{
T 53445 46095 5 10 1 1 0 0 1
refdes=U1
T 53445 46395 5 10 0 0 0 0 1
device=IC
}
-C 55150 45100 1 0 0 gnd.sym
-C 64100 68400 1 0 1 beeper-2khz.sym
+C 55150 45100 1 0 0 EMBEDDEDgnd.sym
+[
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+}
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+L 55205 45150 55295 45150 3 0 0 0 -1 -1
+L 55230 45110 55270 45110 3 0 0 0 -1 -1
+T 55450 45150 8 10 0 0 0 0 1
+net=GND:1
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+C 64100 68400 1 0 1 EMBEDDEDbeeper-2khz.sym
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+}
+P 63100 68700 63300 68700 1 0 0
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+T 63250 68550 9 8 1 1 0 6 1
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+}
+T 63800 69300 5 10 0 0 0 6 1
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+T 63800 69100 8 10 0 1 0 6 1
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+V 63600 68700 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 63800 69900 5 10 0 0 0 6 1
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+T 63800 69700 5 10 0 0 0 6 1
+numslots=0
+T 63800 69500 5 10 0 0 0 6 1
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+T 63823 68655 9 8 1 0 0 6 1
+Beeper
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+]
{
T 63800 69300 5 10 0 0 0 6 1
device=BEEPER
T 64100 68400 5 10 1 1 0 0 1
value=AT1220
}
-C 60500 57400 1 0 0 conn-9.sym
+C 60500 57400 1 0 0 EMBEDDEDconn-9.sym
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+}
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+}
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+}
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+}
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+}
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+}
+P 60500 57900 60800 57900 1 0 0
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+}
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+T 60855 60895 8 10 0 1 0 0 1
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{
T 60500 57400 5 10 0 0 0 0 1
footprint=282834-9
T 60600 57200 5 10 1 1 0 0 1
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}
-C 60000 57000 1 0 0 gnd.sym
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N 60500 60300 60100 60300 4
N 60100 60300 60100 57300 4
N 60500 57900 60100 57900 4
T 58700 57600 5 10 1 1 0 0 1
netname=spare3
}
-C 45900 68700 1 0 0 ABM8.sym
+C 45900 68700 1 0 0 EMBEDDEDABM8.sym
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+}
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{
T 46100 69200 5 10 0 0 0 0 1
device=CRYSTAL
projects / hw / telelco / blobdiff