T 59600 43200 5 10 0 1 90 0 1
symversion=0.1
T 60400 43100 5 10 1 1 0 0 1
-value=1uF
+value=2.2uF
T 60500 43000 5 10 0 1 0 0 1
footprint=0402
}
C 60200 42700 1 0 0 gnd.sym
-C 59100 43500 1 270 0 capacitor.sym
-{
-T 59800 43300 5 10 0 1 270 0 1
-device=CAPACITOR
-T 59500 43300 5 10 1 1 0 0 1
-refdes=C38
-T 60000 43300 5 10 0 1 270 0 1
-symversion=0.1
-T 59500 42700 5 10 1 1 0 0 1
-value=10nF
-T 59100 43500 5 10 0 1 270 0 1
-footprint=0402
-}
C 56900 43000 1 0 0 TC2185.sym
{
T 57195 44195 5 10 1 1 0 0 1
T 56895 42995 5 10 0 1 0 0 1
footprint=SOT23-5
T 58700 44200 5 10 1 1 0 6 1
-value=TC2185-3.3
+value=LD2980-3.3
}
-C 59200 42300 1 0 0 gnd.sym
-N 59000 43500 59300 43500 4
C 56600 42400 1 90 0 capacitor.sym
{
T 55900 42600 5 10 0 1 90 0 1
T 55700 42600 5 10 0 1 90 0 1
symversion=0.1
T 56500 42500 5 10 1 1 0 0 1
-value=1uF
+value=2.2uF
T 56600 42400 5 10 0 1 0 0 1
footprint=0402
}
T 62395 60195 5 10 0 1 0 0 1
device=IC
T 64600 60900 5 10 1 1 0 6 1
-value=MAX-8Q
+value=MAX-10
}
N 62900 55400 62900 55600 4
N 62900 55500 63300 55500 4
device=DRC_Directive
}
T 66800 40800 9 10 1 0 0 0 2
- Copyright 2022 by Bdale Garbee <bdale@gag.com>
+ Copyright 2023 by Bdale Garbee <bdale@gag.com>
Licensed under the TAPR Open Hardware License, http://www.tapr.org/OHL
C 45500 49800 1 0 0 lpc11u2x_bga.sym
{
T 60400 60300 5 10 0 0 0 0 1
device=DRC_Directive
}
+C 59000 43400 1 0 0 nc-right.sym
+{
+T 59100 43900 5 10 0 0 0 0 1
+value=NoConnection
+T 59100 44100 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+T 58500 42600 9 10 1 0 0 0 2
+pin 4 is NC
+on LP2980