From: Keith Packard Date: Sat, 25 Oct 2014 05:59:11 +0000 (-0700) Subject: Initial teledongle v2.0 bits X-Git-Tag: fab-v1.9~3 X-Git-Url: https://git.gag.com/?p=hw%2Fteledongle;a=commitdiff_plain;h=189ee9d67bb3cfec729ff21c28f751ee90809032 Initial teledongle v2.0 bits --- 189ee9d67bb3cfec729ff21c28f751ee90809032 diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..1146bfc --- /dev/null +++ b/.gitignore @@ -0,0 +1,14 @@ +*.bak +*.bom +*.cnc +*.cmd +*.drc +*.net +*- +*~ +partslist* +*.xy +*.zip +*.gbr +*.new.pcb +labeldata.csv diff --git a/License.pdf b/License.pdf new file mode 100644 index 0000000..01fceb2 Binary files /dev/null and b/License.pdf differ diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..462d78c --- /dev/null +++ b/Makefile @@ -0,0 +1,79 @@ +PROJECT=teledongle +AM=../altusmetrum +SCHEME=$(AM)/scheme + +# intentionally want to rebuild drc and bom on every invocation +all: drc partslist partslist.csv pcb + +drc: $(PROJECT).sch Makefile + -gnetlist -g drc2 $(PROJECT).sch -o $(PROJECT).drc + +partslist: $(PROJECT).sch Makefile + gnetlist -g bom -o $(PROJECT).unsorted $(PROJECT).sch + head -n1 $(PROJECT).unsorted > partslist + tail -n+2 $(PROJECT).unsorted | sort >> partslist + rm -f $(PROJECT).unsorted + +partslist.csv: $(PROJECT).sch Makefile + gnetlist -L $(SCHEME) -g partslistgag -o $(PROJECT).csvtmp $(PROJECT).sch + (head -n1 $(PROJECT).csvtmp; tail -n+2 $(PROJECT).csvtmp | sort -t \, -k 8) > $@ && rm -f $(PROJECT).csvtmp + + +partslist.dk: $(PROJECT).sch Makefile $(SCHEME)/gnet-partslist-bom.scm + gnetlist -L $(SCHEME) -g partslist-bom -Ovendor=digikey -o $@ $(PROJECT).sch + +partslist.mouser: $(PROJECT).sch Makefile $(SCHEME)/gnet-partslist-bom.scm + gnetlist -L $(SCHEME) -g partslist-bom -Ovendor=mouser -o $@ $(PROJECT).sch + +pcb: $(PROJECT).sch project Makefile + gsch2pcb project + +$(PROJECT).xy: $(PROJECT).pcb + pcb -x bom $(PROJECT).pcb + +$(PROJECT).bottom.gbr: $(PROJECT).pcb + pcb -x gerber $(PROJECT).pcb + +zip: $(PROJECT).bottom.gbr $(PROJECT).bottommask.gbr $(PROJECT).fab.gbr $(PROJECT).top.gbr $(PROJECT).topmask.gbr $(PROJECT).toppaste.gbr $(PROJECT).topsilk.gbr $(PROJECT).group2.gbr $(PROJECT).group3.gbr $(PROJECT).plated-drill.cnc $(PROJECT).xy Makefile # $(PROJECT).xls + zip $(PROJECT).zip $(PROJECT).*.gbr $(PROJECT).*.cnc $(PROJECT).xy # $(PROJECT).xls + +oshpark: $(PROJECT).bottom.gbr $(PROJECT).bottommask.gbr $(PROJECT).top.gbr $(PROJECT).topmask.gbr $(PROJECT).topsilk.gbr $(PROJECT).plated-drill.cnc + mv $(PROJECT).bottom.gbr bottom\ layer.ger + mv $(PROJECT).bottommask.gbr bottom\ solder\ mask.ger + mv $(PROJECT).bottomsilk.gbr bottom\ silk\ screen.ger + mv $(PROJECT).outline.gbr board\ outline.ger + mv $(PROJECT).top.gbr top\ layer.ger + mv $(PROJECT).topmask.gbr top\ solder\ mask.ger + mv $(PROJECT).topsilk.gbr top\ silk\ screen.ger + mv $(PROJECT).plated-drill.cnc drills.xln + mv $(PROJECT).group2.gbr internal\ plane\ 1.ger + mv $(PROJECT).group3.gbr internal\ plane\ 2.ger + zip $(PROJECT)-oshpark.zip *.ger *.xln + +stencil: $(PROJECT).bottom.gbr $(PROJECT).toppaste.gbr $(PROJECT).outline.gbr + zip $(PROJECT)-stencil.zip $(PROJECT).toppaste.gbr $(PROJECT).outline.gbr + +clean: + rm -f *.bom *.drc *.log *~ $(PROJECT).ps *.gbr *.cnc *bak* *- *.zip + rm -f *.net *.xy *.cmd *.png partslist partslist.csv *.ger *.xln + rm -f *.partslist *.new.pcb *.unsorted $(PROJECT).xls muffin-5267.pdf + +muffins: partslist.csv $(AM)/glabels/muffin-short-5267.glabels + glabels-3-batch $(AM)/glabels/muffin-short-5267.glabels \ + -i partslist.csv -o muffin-5267.ps >/dev/null && \ + ps2pdf muffin-5267.ps && rm muffin-5267.ps + +$(PROJECT)-sch.ps: $(PROJECT).sch + gschem -p -o $(PROJECT)-sch.ps -s /usr/share/gEDA/scheme/print.scm $(PROJECT).sch + +$(PROJECT)-sch.pdf: $(PROJECT)-sch.ps + ps2pdf $(PROJECT)-sch.ps + +$(PROJECT)-pcb.ps: $(PROJECT).pcb + pcb -x ps --psfile $(PROJECT)-pcb.ps --media Letter $(PROJECT).pcb + +$(PROJECT)-pcb.pdf: $(PROJECT)-pcb.ps + ps2pdf $(PROJECT)-pcb.ps + +pdf: $(PROJECT)-sch.pdf $(PROJECT)-pcb.pdf + diff --git a/attribs b/attribs new file mode 100644 index 0000000..92a91e7 --- /dev/null +++ b/attribs @@ -0,0 +1,6 @@ +value +vendor +vendor_part_number +footprint +loadstatus +device diff --git a/gafrc b/gafrc new file mode 100644 index 0000000..9e10ee9 --- /dev/null +++ b/gafrc @@ -0,0 +1,3 @@ +; empty the library path and populate it with only our own symbols +(reset-component-library) +(load "../altusmetrum/gafrc") diff --git a/project b/project new file mode 100644 index 0000000..fdbcff4 --- /dev/null +++ b/project @@ -0,0 +1,12 @@ +# List all the schematics to be netlisted and laid out on the pc board +schematics teledongle.sch + +# for an output-name of foo, gsch2pcb generates files foo.net, foo.pcb, +# and foo.new.pcb. if there is no output name specified, the file names +# are derived from the first listed schematic... +output-name teledongle + +elements-dir ../altusmetrum/packages + +# stick to newlib elements, don't use the older/odder m4 stuff +skip-m4 diff --git a/teledongle.pcb b/teledongle.pcb new file mode 100644 index 0000000..5e225a3 --- /dev/null +++ b/teledongle.pcb @@ -0,0 +1,4942 @@ +# release: pcb 20110918 + +# To read pcb files, the pcb version (or the git source date) must be >= the file version +FileVersion[20070407] + +PCB["TeleMega" 325000 125000] + +Grid[100.0 0 0 0] +Cursor[0 7700 0.000000] +PolyArea[200000000.000000] +Thermal[0.500000] +DRC[600 1000 600 500 1500 700] +Flags("showdrc,nameonpcb,clearnew,snappin,liveroute,hidenames") +Groups("1,c:4,s:2:3:5") +Styles["Signal,1000,800,400,800:Power,2500,800,400,1000:Fat,4000,800,400,1000:Medium,1500,800,400,600"] + +Symbol[' ' 1800] +( +) +Symbol['!' 1200] +( + SymbolLine[0 4500 0 5000 800] + SymbolLine[0 1000 0 3500 800] +) +Symbol['"' 1200] +( + SymbolLine[0 1000 0 2000 800] + SymbolLine[1000 1000 1000 2000 800] +) +Symbol['#' 1200] +( + SymbolLine[0 3500 2000 3500 800] + SymbolLine[0 2500 2000 2500 800] + SymbolLine[1500 2000 1500 4000 800] + SymbolLine[500 2000 500 4000 800] +) +Symbol['$' 1200] +( + SymbolLine[1500 1500 2000 2000 800] + SymbolLine[500 1500 1500 1500 800] + SymbolLine[0 2000 500 1500 800] + SymbolLine[0 2000 0 2500 800] + SymbolLine[0 2500 500 3000 800] + SymbolLine[500 3000 1500 3000 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[2000 3500 2000 4000 800] + SymbolLine[1500 4500 2000 4000 800] + SymbolLine[500 4500 1500 4500 800] + SymbolLine[0 4000 500 4500 800] + SymbolLine[1000 1000 1000 5000 800] +) +Symbol['%' 1200] +( + SymbolLine[0 1500 0 2000 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 1000 1000 800] + SymbolLine[1000 1000 1500 1500 800] + SymbolLine[1500 1500 1500 2000 800] + SymbolLine[1000 2500 1500 2000 800] + SymbolLine[500 2500 1000 2500 800] + SymbolLine[0 2000 500 2500 800] + SymbolLine[0 5000 4000 1000 800] + SymbolLine[3500 5000 4000 4500 800] + SymbolLine[4000 4000 4000 4500 800] + SymbolLine[3500 3500 4000 4000 800] + SymbolLine[3000 3500 3500 3500 800] + SymbolLine[2500 4000 3000 3500 800] + SymbolLine[2500 4000 2500 4500 800] + SymbolLine[2500 4500 3000 5000 800] + SymbolLine[3000 5000 3500 5000 800] +) +Symbol['&' 1200] +( + SymbolLine[0 4500 500 5000 800] + SymbolLine[0 1500 0 2500 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[0 3500 1500 2000 800] + SymbolLine[500 5000 1000 5000 800] + SymbolLine[1000 5000 2000 4000 800] + SymbolLine[0 2500 2500 5000 800] + SymbolLine[500 1000 1000 1000 800] + SymbolLine[1000 1000 1500 1500 800] + SymbolLine[1500 1500 1500 2000 800] + SymbolLine[0 3500 0 4500 800] +) +Symbol[''' 1200] +( + SymbolLine[0 2000 1000 1000 800] +) +Symbol['(' 1200] +( + SymbolLine[0 4500 500 5000 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[0 1500 0 4500 800] +) +Symbol[')' 1200] +( + SymbolLine[0 1000 500 1500 800] + SymbolLine[500 1500 500 4500 800] + SymbolLine[0 5000 500 4500 800] +) +Symbol['*' 1200] +( + SymbolLine[0 2000 2000 4000 800] + SymbolLine[0 4000 2000 2000 800] + SymbolLine[0 3000 2000 3000 800] + SymbolLine[1000 2000 1000 4000 800] +) +Symbol['+' 1200] +( + SymbolLine[0 3000 2000 3000 800] + SymbolLine[1000 2000 1000 4000 800] +) +Symbol[',' 1200] +( + SymbolLine[0 6000 1000 5000 800] +) +Symbol['-' 1200] +( + SymbolLine[0 3000 2000 3000 800] +) +Symbol['.' 1200] +( + SymbolLine[0 5000 500 5000 800] +) +Symbol['/' 1200] +( + SymbolLine[0 4500 3000 1500 800] +) +Symbol['0' 1200] +( + SymbolLine[0 4500 500 5000 800] + SymbolLine[0 1500 0 4500 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 1500 1000 800] + SymbolLine[1500 1000 2000 1500 800] + SymbolLine[2000 1500 2000 4500 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[0 4000 2000 2000 800] +) +Symbol['1' 1200] +( + SymbolLine[500 5000 1500 5000 800] + SymbolLine[1000 1000 1000 5000 800] + SymbolLine[0 2000 1000 1000 800] +) +Symbol['2' 1200] +( + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 2000 1000 800] + SymbolLine[2000 1000 2500 1500 800] + SymbolLine[2500 1500 2500 2500 800] + SymbolLine[0 5000 2500 2500 800] + SymbolLine[0 5000 2500 5000 800] +) +Symbol['3' 1200] +( + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 1500 1000 800] + SymbolLine[1500 1000 2000 1500 800] + SymbolLine[2000 1500 2000 4500 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[500 3000 2000 3000 800] +) +Symbol['4' 1200] +( + SymbolLine[0 3000 2000 1000 800] + SymbolLine[0 3000 2500 3000 800] + SymbolLine[2000 1000 2000 5000 800] +) +Symbol['5' 1200] +( + SymbolLine[0 1000 2000 1000 800] + SymbolLine[0 1000 0 3000 800] + SymbolLine[0 3000 500 2500 800] + SymbolLine[500 2500 1500 2500 800] + SymbolLine[1500 2500 2000 3000 800] + SymbolLine[2000 3000 2000 4500 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[0 4500 500 5000 800] +) +Symbol['6' 1200] +( + SymbolLine[1500 1000 2000 1500 800] + SymbolLine[500 1000 1500 1000 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[0 1500 0 4500 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[0 3000 1500 3000 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[2000 3500 2000 4500 800] +) +Symbol['7' 1200] +( + SymbolLine[0 5000 2500 2500 800] + SymbolLine[2500 1000 2500 2500 800] + SymbolLine[0 1000 2500 1000 800] +) +Symbol['8' 1200] +( + SymbolLine[0 4500 500 5000 800] + SymbolLine[0 3500 0 4500 800] + SymbolLine[0 3500 500 3000 800] + SymbolLine[500 3000 1500 3000 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[2000 3500 2000 4500 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[0 2500 500 3000 800] + SymbolLine[0 1500 0 2500 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 1500 1000 800] + SymbolLine[1500 1000 2000 1500 800] + SymbolLine[2000 1500 2000 2500 800] + SymbolLine[1500 3000 2000 2500 800] +) +Symbol['9' 1200] +( + SymbolLine[0 5000 2000 3000 800] + SymbolLine[2000 1500 2000 3000 800] + SymbolLine[1500 1000 2000 1500 800] + SymbolLine[500 1000 1500 1000 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[0 1500 0 2500 800] + SymbolLine[0 2500 500 3000 800] + SymbolLine[500 3000 2000 3000 800] +) +Symbol[':' 1200] +( + SymbolLine[0 2500 500 2500 800] + SymbolLine[0 3500 500 3500 800] +) +Symbol[';' 1200] +( + SymbolLine[0 5000 1000 4000 800] + SymbolLine[1000 2500 1000 3000 800] +) +Symbol['<' 1200] +( + SymbolLine[0 3000 1000 2000 800] + SymbolLine[0 3000 1000 4000 800] +) +Symbol['=' 1200] +( + SymbolLine[0 2500 2000 2500 800] + SymbolLine[0 3500 2000 3500 800] +) +Symbol['>' 1200] +( + SymbolLine[0 2000 1000 3000 800] + SymbolLine[0 4000 1000 3000 800] +) +Symbol['?' 1200] +( + SymbolLine[1000 3000 1000 3500 800] + SymbolLine[1000 4500 1000 5000 800] + SymbolLine[0 1500 0 2000 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 1500 1000 800] + SymbolLine[1500 1000 2000 1500 800] + SymbolLine[2000 1500 2000 2000 800] + SymbolLine[1000 3000 2000 2000 800] +) +Symbol['@' 1200] +( + SymbolLine[0 1000 0 4000 800] + SymbolLine[0 4000 1000 5000 800] + SymbolLine[1000 5000 4000 5000 800] + SymbolLine[5000 3500 5000 1000 800] + SymbolLine[5000 1000 4000 0 800] + SymbolLine[4000 0 1000 0 800] + SymbolLine[1000 0 0 1000 800] + SymbolLine[1500 2000 1500 3000 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[2000 3500 3000 3500 800] + SymbolLine[3000 3500 3500 3000 800] + SymbolLine[3500 3000 4000 3500 800] + SymbolLine[3500 3000 3500 1500 800] + SymbolLine[3500 2000 3000 1500 800] + SymbolLine[2000 1500 3000 1500 800] + SymbolLine[2000 1500 1500 2000 800] + SymbolLine[4000 3500 5000 3500 800] +) +Symbol['A' 1200] +( + SymbolLine[0 1500 0 5000 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 2000 1000 800] + SymbolLine[2000 1000 2500 1500 800] + SymbolLine[2500 1500 2500 5000 800] + SymbolLine[0 3000 2500 3000 800] +) +Symbol['B' 1200] +( + SymbolLine[0 5000 2000 5000 800] + SymbolLine[2000 5000 2500 4500 800] + SymbolLine[2500 3500 2500 4500 800] + SymbolLine[2000 3000 2500 3500 800] + SymbolLine[500 3000 2000 3000 800] + SymbolLine[500 1000 500 5000 800] + SymbolLine[0 1000 2000 1000 800] + SymbolLine[2000 1000 2500 1500 800] + SymbolLine[2500 1500 2500 2500 800] + SymbolLine[2000 3000 2500 2500 800] +) +Symbol['C' 1200] +( + SymbolLine[500 5000 2000 5000 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[0 1500 0 4500 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 2000 1000 800] +) +Symbol['D' 1200] +( + SymbolLine[500 1000 500 5000 800] + SymbolLine[2000 1000 2500 1500 800] + SymbolLine[2500 1500 2500 4500 800] + SymbolLine[2000 5000 2500 4500 800] + SymbolLine[0 5000 2000 5000 800] + SymbolLine[0 1000 2000 1000 800] +) +Symbol['E' 1200] +( + SymbolLine[0 3000 1500 3000 800] + SymbolLine[0 5000 2000 5000 800] + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 1000 2000 1000 800] +) +Symbol['F' 1200] +( + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 1000 2000 1000 800] + SymbolLine[0 3000 1500 3000 800] +) +Symbol['G' 1200] +( + SymbolLine[2000 1000 2500 1500 800] + SymbolLine[500 1000 2000 1000 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[0 1500 0 4500 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[500 5000 2000 5000 800] + SymbolLine[2000 5000 2500 4500 800] + SymbolLine[2500 3500 2500 4500 800] + SymbolLine[2000 3000 2500 3500 800] + SymbolLine[1000 3000 2000 3000 800] +) +Symbol['H' 1200] +( + SymbolLine[0 1000 0 5000 800] + SymbolLine[2500 1000 2500 5000 800] + SymbolLine[0 3000 2500 3000 800] +) +Symbol['I' 1200] +( + SymbolLine[0 1000 1000 1000 800] + SymbolLine[500 1000 500 5000 800] + SymbolLine[0 5000 1000 5000 800] +) +Symbol['J' 1200] +( + SymbolLine[0 1000 1500 1000 800] + SymbolLine[1500 1000 1500 4500 800] + SymbolLine[1000 5000 1500 4500 800] + SymbolLine[500 5000 1000 5000 800] + SymbolLine[0 4500 500 5000 800] +) +Symbol['K' 1200] +( + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 3000 2000 1000 800] + SymbolLine[0 3000 2000 5000 800] +) +Symbol['L' 1200] +( + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 5000 2000 5000 800] +) +Symbol['M' 1200] +( + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 1000 1500 2500 800] + SymbolLine[1500 2500 3000 1000 800] + SymbolLine[3000 1000 3000 5000 800] +) +Symbol['N' 1200] +( + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 1000 0 1500 800] + SymbolLine[0 1500 2500 4000 800] + SymbolLine[2500 1000 2500 5000 800] +) +Symbol['O' 1200] +( + SymbolLine[0 1500 0 4500 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 1500 1000 800] + SymbolLine[1500 1000 2000 1500 800] + SymbolLine[2000 1500 2000 4500 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[0 4500 500 5000 800] +) +Symbol['P' 1200] +( + SymbolLine[500 1000 500 5000 800] + SymbolLine[0 1000 2000 1000 800] + SymbolLine[2000 1000 2500 1500 800] + SymbolLine[2500 1500 2500 2500 800] + SymbolLine[2000 3000 2500 2500 800] + SymbolLine[500 3000 2000 3000 800] +) +Symbol['Q' 1200] +( + SymbolLine[0 1500 0 4500 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 1500 1000 800] + SymbolLine[1500 1000 2000 1500 800] + SymbolLine[2000 1500 2000 4500 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[1000 4000 2000 5000 800] +) +Symbol['R' 1200] +( + SymbolLine[0 1000 2000 1000 800] + SymbolLine[2000 1000 2500 1500 800] + SymbolLine[2500 1500 2500 2500 800] + SymbolLine[2000 3000 2500 2500 800] + SymbolLine[500 3000 2000 3000 800] + SymbolLine[500 1000 500 5000 800] + SymbolLine[500 3000 2500 5000 800] +) +Symbol['S' 1200] +( + SymbolLine[2000 1000 2500 1500 800] + SymbolLine[500 1000 2000 1000 800] + SymbolLine[0 1500 500 1000 800] + SymbolLine[0 1500 0 2500 800] + SymbolLine[0 2500 500 3000 800] + SymbolLine[500 3000 2000 3000 800] + SymbolLine[2000 3000 2500 3500 800] + SymbolLine[2500 3500 2500 4500 800] + SymbolLine[2000 5000 2500 4500 800] + SymbolLine[500 5000 2000 5000 800] + SymbolLine[0 4500 500 5000 800] +) +Symbol['T' 1200] +( + SymbolLine[0 1000 2000 1000 800] + SymbolLine[1000 1000 1000 5000 800] +) +Symbol['U' 1200] +( + SymbolLine[0 1000 0 4500 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[2000 1000 2000 4500 800] +) +Symbol['V' 1200] +( + SymbolLine[0 1000 0 4000 800] + SymbolLine[0 4000 1000 5000 800] + SymbolLine[1000 5000 2000 4000 800] + SymbolLine[2000 1000 2000 4000 800] +) +Symbol['W' 1200] +( + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 5000 1500 3500 800] + SymbolLine[1500 3500 3000 5000 800] + SymbolLine[3000 1000 3000 5000 800] +) +Symbol['X' 1200] +( + SymbolLine[0 1000 0 1500 800] + SymbolLine[0 1500 2500 4000 800] + SymbolLine[2500 4000 2500 5000 800] + SymbolLine[0 4000 0 5000 800] + SymbolLine[0 4000 2500 1500 800] + SymbolLine[2500 1000 2500 1500 800] +) +Symbol['Y' 1200] +( + SymbolLine[0 1000 0 1500 800] + SymbolLine[0 1500 1000 2500 800] + SymbolLine[1000 2500 2000 1500 800] + SymbolLine[2000 1000 2000 1500 800] + SymbolLine[1000 2500 1000 5000 800] +) +Symbol['Z' 1200] +( + SymbolLine[0 1000 2500 1000 800] + SymbolLine[2500 1000 2500 1500 800] + SymbolLine[0 4000 2500 1500 800] + SymbolLine[0 4000 0 5000 800] + SymbolLine[0 5000 2500 5000 800] +) +Symbol['[' 1200] +( + SymbolLine[0 1000 500 1000 800] + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 5000 500 5000 800] +) +Symbol['\' 1200] +( + SymbolLine[0 1500 3000 4500 800] +) +Symbol[']' 1200] +( + SymbolLine[0 1000 500 1000 800] + SymbolLine[500 1000 500 5000 800] + SymbolLine[0 5000 500 5000 800] +) +Symbol['^' 1200] +( + SymbolLine[0 1500 500 1000 800] + SymbolLine[500 1000 1000 1500 800] +) +Symbol['_' 1200] +( + SymbolLine[0 5000 2000 5000 800] +) +Symbol['`' 1200] +( + SymbolLine[5000 0 6500 1500 800] + SymbolLine[6500 5000 5000 6500 800] + SymbolLine[5000 6500 1500 6500 800] + SymbolLine[1500 6500 0 5000 800] + SymbolLine[0 5000 0 1500 800] + SymbolLine[0 1500 1500 0 800] + SymbolLine[1500 0 5000 0 800] + SymbolLine[6500 1500 6500 5000 800] + SymbolLine[2500 2500 4000 2500 800] + SymbolLine[2000 3000 2500 2500 800] + SymbolLine[2000 3000 2000 4000 800] + SymbolLine[2000 4000 2500 4500 800] + SymbolLine[2500 4500 4000 4500 800] +) +Symbol['a' 1200] +( + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[500 3000 1500 3000 800] + SymbolLine[0 3500 500 3000 800] + SymbolLine[0 3500 0 4500 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[2000 3000 2000 4500 800] + SymbolLine[2000 4500 2500 5000 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[1500 5000 2000 4500 800] +) +Symbol['b' 1200] +( + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[2000 3500 2000 4500 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[500 3000 1500 3000 800] + SymbolLine[0 3500 500 3000 800] +) +Symbol['c' 1200] +( + SymbolLine[500 3000 2000 3000 800] + SymbolLine[0 3500 500 3000 800] + SymbolLine[0 3500 0 4500 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[500 5000 2000 5000 800] +) +Symbol['d' 1200] +( + SymbolLine[2000 1000 2000 5000 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[0 3500 0 4500 800] + SymbolLine[0 3500 500 3000 800] + SymbolLine[500 3000 1500 3000 800] + SymbolLine[1500 3000 2000 3500 800] +) +Symbol['e' 1200] +( + SymbolLine[500 5000 2000 5000 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[0 3500 0 4500 800] + SymbolLine[0 3500 500 3000 800] + SymbolLine[500 3000 1500 3000 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[0 4000 2000 4000 800] + SymbolLine[2000 4000 2000 3500 800] +) +Symbol['f' 1000] +( + SymbolLine[500 1500 500 5000 800] + SymbolLine[500 1500 1000 1000 800] + SymbolLine[1000 1000 1500 1000 800] + SymbolLine[0 3000 1000 3000 800] +) +Symbol['g' 1200] +( + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[500 3000 1500 3000 800] + SymbolLine[0 3500 500 3000 800] + SymbolLine[0 3500 0 4500 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[0 6000 500 6500 800] + SymbolLine[500 6500 1500 6500 800] + SymbolLine[1500 6500 2000 6000 800] + SymbolLine[2000 3000 2000 6000 800] +) +Symbol['h' 1200] +( + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 3500 500 3000 800] + SymbolLine[500 3000 1500 3000 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[2000 3500 2000 5000 800] +) +Symbol['i' 1000] +( + SymbolLine[0 2000 0 2500 800] + SymbolLine[0 3500 0 5000 800] +) +Symbol['j' 1000] +( + SymbolLine[500 2000 500 2500 800] + SymbolLine[500 3500 500 6000 800] + SymbolLine[0 6500 500 6000 800] +) +Symbol['k' 1200] +( + SymbolLine[0 1000 0 5000 800] + SymbolLine[0 3500 1500 5000 800] + SymbolLine[0 3500 1000 2500 800] +) +Symbol['l' 1000] +( + SymbolLine[0 1000 0 4500 800] + SymbolLine[0 4500 500 5000 800] +) +Symbol['m' 1200] +( + SymbolLine[500 3500 500 5000 800] + SymbolLine[500 3500 1000 3000 800] + SymbolLine[1000 3000 1500 3000 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[2000 3500 2000 5000 800] + SymbolLine[2000 3500 2500 3000 800] + SymbolLine[2500 3000 3000 3000 800] + SymbolLine[3000 3000 3500 3500 800] + SymbolLine[3500 3500 3500 5000 800] + SymbolLine[0 3000 500 3500 800] +) +Symbol['n' 1200] +( + SymbolLine[500 3500 500 5000 800] + SymbolLine[500 3500 1000 3000 800] + SymbolLine[1000 3000 1500 3000 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[2000 3500 2000 5000 800] + SymbolLine[0 3000 500 3500 800] +) +Symbol['o' 1200] +( + SymbolLine[0 3500 0 4500 800] + SymbolLine[0 3500 500 3000 800] + SymbolLine[500 3000 1500 3000 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[2000 3500 2000 4500 800] + SymbolLine[1500 5000 2000 4500 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[0 4500 500 5000 800] +) +Symbol['p' 1200] +( + SymbolLine[500 3500 500 6500 800] + SymbolLine[0 3000 500 3500 800] + SymbolLine[500 3500 1000 3000 800] + SymbolLine[1000 3000 2000 3000 800] + SymbolLine[2000 3000 2500 3500 800] + SymbolLine[2500 3500 2500 4500 800] + SymbolLine[2000 5000 2500 4500 800] + SymbolLine[1000 5000 2000 5000 800] + SymbolLine[500 4500 1000 5000 800] +) +Symbol['q' 1200] +( + SymbolLine[2000 3500 2000 6500 800] + SymbolLine[1500 3000 2000 3500 800] + SymbolLine[500 3000 1500 3000 800] + SymbolLine[0 3500 500 3000 800] + SymbolLine[0 3500 0 4500 800] + SymbolLine[0 4500 500 5000 800] + SymbolLine[500 5000 1500 5000 800] + SymbolLine[1500 5000 2000 4500 800] +) +Symbol['r' 1200] +( + SymbolLine[500 3500 500 5000 800] + SymbolLine[500 3500 1000 3000 800] + SymbolLine[1000 3000 2000 3000 800] + SymbolLine[0 3000 500 3500 800] +) +Symbol['s' 1200] +( + SymbolLine[500 5000 2000 5000 800] + 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0 0 "GND" "33" "square,edge2,nopaste"] + Pad[0 -2597 0 -2597 2598 0 2598 "GND" "33" "square,edge2,nopaste"] + Pad[0 -2597 0 -2597 1500 0 2598 "GND" "33" "square,edge2"] + Pad[0 0 0 0 2598 0 0 "GND" "33" "square,edge2,nopaste"] + Pad[0 2598 0 2598 2598 0 2598 "GND" "33" "square,edge2,nopaste"] + Pad[0 2598 0 2598 1500 0 2598 "GND" "33" "square,edge2"] + Pad[0 5197 0 5197 2598 0 0 "GND" "33" "square,edge2,nopaste"] + Pad[-2598 -5196 -2598 -5196 2598 0 2598 "GND" "33" "square,nopaste"] + Pad[-2598 -5196 -2598 -5196 1500 0 2598 "GND" "33" "square"] + Pad[-2598 -2597 -2598 -2597 2598 0 2598 "GND" "33" "square,nopaste"] + Pad[-2598 -2597 -2598 -2597 1500 0 2598 "GND" "33" "square"] + Pad[-2598 0 -2598 0 2598 0 2598 "GND" "33" "square,nopaste"] + Pad[-2598 0 -2598 0 1500 0 2598 "GND" "33" "square"] + Pad[-2598 2598 -2598 2598 2598 0 2598 "GND" "33" "square,nopaste"] + Pad[-2598 2598 -2598 2598 1500 0 2598 "GND" "33" "square"] + Pad[-2598 5197 -2598 5197 2598 0 2598 "GND" "33" "square,nopaste"] + Pad[-2598 5197 -2598 5197 1500 0 2598 "GND" "33" "square"] + Pad[-5197 -5196 -5197 -5196 2598 0 0 "GND" "33" "square,nopaste"] + Pad[-5197 -2597 -5197 -2597 2598 0 2598 "GND" "33" "square,nopaste"] + Pad[-5197 -2597 -5197 -2597 1500 0 2598 "GND" "33" "square"] + Pad[-5197 0 -5197 0 2598 0 0 "GND" "33" "square,nopaste"] + Pad[-5197 2598 -5197 2598 2598 0 2598 "GND" "33" "square,nopaste"] + Pad[-5197 2598 -5197 2598 1500 0 2598 "GND" "33" "square"] + Pad[-5197 5197 -5197 5197 2598 0 0 "GND" "33" "square,nopaste"] + Pad[8621 -6889 10865 -6889 1102 866 1654 "LPF1" "24" "edge2"] + Pad[-10866 -6889 -8622 -6889 1102 866 1654 "VDD_GUARD" "1" ""] + Pad[6889 8622 6889 10866 1102 866 1654 "NC" "16" "edge2"] + Pad[6889 -10865 6889 -8621 1102 866 1654 "AVDD_PFD_CHP" "25" ""] + Pad[8621 -4920 10865 -4920 1102 866 1654 "LPF0" "23" "edge2"] + Pad[-10866 -4920 -8622 -4920 1102 866 1654 "RESET_N" "2" ""] + Pad[4920 8622 4920 10866 1102 866 1654 "AVDD_RF" "15" "edge2"] + Pad[4920 -10865 4920 -8621 1102 866 1654 "DCPL_PFD_CHP" "26" ""] + Pad[8621 -2952 10865 -2952 1102 866 1654 "AVDD_SYNTH1" "22" "edge2"] + Pad[-10866 -2952 -8622 -2952 1102 866 1654 "GPIO3" "3" ""] + Pad[2952 8622 2952 10866 1102 866 1654 "RBIAS" "14" "edge2"] + Pad[2952 -10865 2952 -8621 1102 866 1654 "AVDD_SYNTH2" "27" ""] + Pad[8621 -983 10865 -983 1102 866 1654 "DCPL_VCO" "21" "edge2"] + Pad[-10866 -983 -8622 -983 1102 866 1654 "GPIO2" "4" ""] + Pad[983 8622 983 10866 1102 866 1654 "AVDD_IF" "13" "edge2"] + Pad[983 -10865 983 -8621 1102 866 1654 "AVDD_XOSC" "28" ""] + Pad[8621 984 10865 984 1102 866 1654 "LNA_N" "20" "edge2"] + Pad[-10866 984 -8622 984 1102 866 1654 "DVDD" "5" ""] + Pad[-984 8622 -984 10866 1102 866 1654 "DVDD" "12" "edge2"] + Pad[-984 -10865 -984 -8621 1102 866 1654 "DCPL_XOSC" "29" ""] + Pad[8621 2953 10865 2953 1102 866 1654 "LNA_P" "19" "edge2"] + Pad[-10866 2953 -8622 2953 1102 866 1654 "DCPL" "6" ""] + Pad[-2953 8622 -2953 10866 1102 866 1654 "CS_N" "11" "edge2"] + Pad[-2953 -10865 -2953 -8621 1102 866 1654 "XOSC_Q1" "30" ""] + Pad[8621 4921 10865 4921 1102 866 1654 "TRX_SW" "18" "edge2"] + Pad[-10866 4921 -8622 4921 1102 866 1654 "SI" "7" ""] + Pad[-4921 8622 -4921 10866 1102 866 1654 "GPIO0" "10" "edge2"] + Pad[-4921 -10865 -4921 -8621 1102 866 1654 "XOSC_Q2" "31" ""] + Pad[8621 6890 10865 6890 1102 866 1654 "PA" "17" "edge2"] + Pad[-10866 6890 -8622 6890 1102 866 1654 "SCLK" "8" ""] + Pad[-6890 8622 -6890 10866 1102 866 1654 "SO/GPIO1" "9" "edge2"] + Pad[-6890 -10865 -6890 -8621 1102 866 1654 "EXT_XOSC" "32" ""] + ElementArc [-10236 -10235 500 500 270 360 1000] + + ) + +Element["hidename" "0402" "C45" "47nF" 267300 53874 -3150 13650 1 100 ""] +( + Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "C47" "47nF" 275000 53900 -3150 13624 1 100 ""] +( + Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "C43" "47nF" 251100 25700 -14050 -2950 0 100 ""] +( + Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "R30" "56k" 271200 53874 3150 4228 3 100 ""] +( + Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "NDK32" "X1" "32mhz" 253400 12500 2522 -2542 3 100 ""] +( + Pad[-3150 3936 -3150 4723 4724 0 5324 "2" "2" "square,edge2"] + Pad[-3150 -4724 -3150 -3937 4724 0 5324 "1" "1" "square"] + Pad[3149 -4724 3149 -3937 4724 0 5324 "4" "4" "square"] + Pad[3149 3936 3149 4723 4724 0 5324 "3" "3" "square,edge2"] + ElementArc [-6614 -7717 500 500 180 360 1000] + + ) + +Element["hidename" "0402" "C30" "10pF" 253550 21870 3255 -612 2 100 ""] +( + Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] + Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "R104" "0" 200000 18000 -3150 -3150 0 100 ""] +( + Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "C404" "47pF" 193874 18000 -3150 -3150 0 100 ""] +( + Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "R105" "0" 195600 26000 -3150 -3150 0 100 ""] +( + Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "C405" "47pF" 187500 24326 3150 -3150 3 100 ""] +( + Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "R103" "0" 212600 32000 3150 3150 2 100 ""] +( + Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] + Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "C403" "47pF" 221126 32000 3150 3150 2 100 ""] +( + Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] + Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "AN3111" "U3" "MMA6555" 109300 107500 0 0 3 100 ""] +( + Pad[0 0 0 0 15748 0 16339 "VSS" "17" "square,edge2,nopaste"] + Pad[5511 -5511 5511 -5511 3937 0 3937 "VSS" "17" "square,edge2"] + Pad[5511 0 5511 0 3937 0 3937 "VSS" "17" "square,edge2"] + Pad[5511 5512 5511 5512 3937 0 3937 "VSS" "17" "square,edge2"] + Pad[0 -5511 0 -5511 3937 0 3937 "VSS" "17" "square,edge2"] + Pad[0 0 0 0 3937 0 3937 "VSS" "17" "square,edge2"] + Pad[0 5512 0 5512 3937 0 3937 "VSS" "17" "square,edge2"] + Pad[-5512 -5511 -5512 -5511 3937 0 3937 "VSS" "17" "square"] + Pad[-5512 0 -5512 0 3937 0 3937 "VSS" "17" "square"] + Pad[-5512 5512 -5512 5512 3937 0 3937 "VSS" "17" "square"] + Pad[-10413 10413 -10413 10413 2165 0 2756 "NC" "NC" "square"] + Pad[10412 10413 10412 10413 2165 0 2756 "NC" "NC" "square,edge2"] + Pad[-10413 -10412 -10413 -10412 2165 0 2756 "NC" "NC" "square"] + Pad[10412 -10412 10412 -10412 2165 0 2756 "NC" "NC" "square,edge2"] + Pad[10629 -5905 12007 -5905 1969 0 2559 "CS" "12" "square,edge2"] + Pad[-12008 -5905 -10630 -5905 1969 0 2559 "VREGA" "1" "square"] + Pad[5905 10630 5905 12008 1969 0 2559 "MISO" "8" "square,edge2"] + Pad[5905 -12007 5905 -10629 1969 0 2559 "VSSA" "13" "square"] + Pad[10629 -1968 12007 -1968 1969 0 2559 "MOSI" "11" "square,edge2"] + Pad[-12008 -1968 -10630 -1968 1969 0 2559 "VSS" "2" "square"] + Pad[1968 10630 1968 12008 1969 0 2559 "VPP/TEST" "7" "square,edge2"] + Pad[1968 -12007 1968 -10629 1969 0 2559 "pin14" "14" "square"] + Pad[10629 1969 12007 1969 1969 0 2559 "SCLK" "10" "square,edge2"] + Pad[-12008 1969 -10630 1969 1969 0 2559 "VREG" "3" "square"] + Pad[-1969 10630 -1969 12008 1969 0 2559 "ARM" "6" "square,edge2"] + Pad[-1969 -12007 -1969 -10629 1969 0 2559 "pin15" "15" "square"] + Pad[10629 5906 12007 5906 1969 0 2559 "VCC" "9" "square,edge2"] + Pad[-12008 5906 -10630 5906 1969 0 2559 "VSS" "4" "square"] + Pad[-5906 10630 -5906 12008 1969 0 2559 "pin5" "5" "square,edge2"] + Pad[-5906 -12007 -5906 -10629 1969 0 2559 "VSSA" "16" "square"] + ElementArc [-12598 -12597 500 500 270 360 1000] + + ) + +Element["hidename" "0402" "C103" "1uF" 91600 101600 -2224 350 0 100 ""] +( + Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "C102" "1uF" 91600 109500 15476 3450 2 100 ""] +( + Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "MPU6000" "U12" "MPU-6000" 142500 107500 4400 3200 2 100 ""] +( + Pad[4920 6849 4920 8897 1102 866 1654 "GND" "18" "edge2"] + Pad[4920 -8898 4920 -6850 1102 866 1654 "CLKIN" "1" ""] + Pad[-8898 4920 -6850 4920 1102 866 1654 "INT" "12" ""] + Pad[6849 4920 8897 4920 1102 866 1654 "pin19" "19" "edge2"] + Pad[2952 6849 2952 8897 1102 866 1654 "pin17" "17" "edge2"] + Pad[2952 -8898 2952 -6850 1102 866 1654 "pin2" "2" ""] + Pad[-8898 2952 -6850 2952 1102 866 1654 "FSYNC" "11" ""] + Pad[6849 2952 8897 2952 1102 866 1654 "CPOUT" "20" "edge2"] + Pad[983 6849 983 8897 1102 866 1654 "pin16" "16" "edge2"] + Pad[983 -8898 983 -6850 1102 866 1654 "pin3" "3" ""] + Pad[-8898 983 -6850 983 1102 866 1654 "REGOUT" "10" ""] + Pad[6849 983 8897 983 1102 866 1654 "pin21" "21" "edge2"] + Pad[-984 6849 -984 8897 1102 866 1654 "pin15" "15" "edge2"] + Pad[-984 -8898 -984 -6850 1102 866 1654 "pin4" "4" ""] + Pad[-8898 -984 -6850 -984 1102 866 1654 "AD0/SDO" "9" ""] + Pad[6849 -984 8897 -984 1102 866 1654 "pin22" "22" "edge2"] + Pad[-2953 6849 -2953 8897 1102 866 1654 "pin14" "14" "edge2"] + Pad[-2953 -8898 -2953 -6850 1102 866 1654 "pin5" "5" ""] + Pad[-8898 -2953 -6850 -2953 1102 866 1654 "CS" "8" ""] + Pad[6849 -2953 8897 -2953 1102 866 1654 "SCL/SCLK" "23" "edge2"] + Pad[-4921 6849 -4921 8897 1102 866 1654 "VDD" "13" "edge2"] + Pad[-4921 -8898 -4921 -6850 1102 866 1654 "AUX_DA" "6" ""] + Pad[-8898 -4921 -6850 -4921 1102 866 1654 "AUX_CL" "7" ""] + Pad[6849 -4921 8897 -4921 1102 866 1654 "SDA/SDI" "24" "edge2"] + ElementArc [9448 -9449 500 500 180 360 1000] + + ) + +Element["hidename" "0402" "C303" "10nF" 152300 120100 3498 -1050 0 100 ""] +( + Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"] + Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "C101" "0.1uF" 142500 120100 -5202 -6750 0 100 ""] +( + Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] + Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "SOIJ8" "U5" "W25Q64" 236900 45600 -8011 2461 1 100 ""] +( + Pad[-7499 -15845 -7499 -11712 2559 2441 3159 "VCC" "8" "square"] + Pad[-7499 11713 -7499 15846 2559 2441 3159 "CS" "1" "square,edge2"] + Pad[-2499 -15845 -2499 -11712 2559 2441 3159 "HOLD" "7" "square"] + Pad[-2499 11713 -2499 15846 2559 2441 3159 "SO" "2" "square,edge2"] + Pad[2500 -15845 2500 -11712 2559 2441 3159 "SCK" "6" "square"] + Pad[2500 11713 2500 15846 2559 2441 3159 "WP" "3" "square,edge2"] + Pad[7500 -15845 7500 -11712 2559 2441 3159 "SI" "5" "square"] + Pad[7500 11713 7500 15846 2559 2441 3159 "VSS" "4" "square,edge2"] + ElementLine [-10491 -10590 -10491 10591 1000] + ElementLine [-10491 10591 10492 10591 1000] + ElementLine [10492 -10590 10492 10591 1000] + ElementLine [-10491 -10590 10492 -10590 1000] + ElementArc [-7499 8760 500 500 0 360 1000] + + ) + +Element["hidename,onsolder" "TDK_PS12" "U8" "TDK_PS12" 135500 62542 8100 -3316 1 100 "auto"] +( + Pin[0 9842 7874 3937 8661 2756 "1" "1" "square,thermal(1X,3X)"] + Pin[0 -9843 7874 3937 8661 2756 "2" "2" ""] + ElementArc [0 0 24016 24016 90 360 1000] + + ) + +Element["hidename" "0402" "C44" "47nF" 249900 39026 -2950 13350 1 100 ""] +( + Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "C42" "0.22uF" 249874 45126 3050 -13350 3 100 ""] +( + Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "sma-edge" "J8" "SMA" 304900 62500 0 0 1 10 ""] +( + Pad[6500 13500 12500 13500 13000 0 13600 "pin2" "2" "square,nopaste"] + Pad[6500 13500 12500 13500 13000 0 13600 "pin2" "2" "onsolder,square,nopaste"] + Pad[3000 0 16000 0 6000 0 6600 "pin1" "1" "square,nopaste"] + Pad[6500 -13500 12500 -13500 13000 0 13600 "pin2" "2" "square,nopaste"] + Pad[6500 -13500 12500 -13500 13000 0 13600 "pin2" "2" "onsolder,square,nopaste"] + + ) + +Element["hidename" "0402" "L191" "56nH" 291100 36900 -3050 -5650 1 100 ""] +( + Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "C171" "10nF" 289548 59174 -8150 14350 1 100 ""] +( + Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"] + Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "0402" "C172" "100pF" 291500 54400 6498 -150 2 100 ""] +( + Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"] + Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"] + + ) + +Element["hidename" "1212-8" "Q3" "Si7232DN" 64208 89494 -10161 -12011 0 100 ""] +( + Pad[-3838 -6800 -3838 -4497 1594 965 2194 "pin8" "8" "square"] + Pad[-3838 4498 -3838 6801 1594 965 2194 "pin1" "1" "square,edge2"] + Pad[-1279 -6800 -1279 -4497 1594 965 2194 "pin7" "7" "square"] + Pad[-1279 4498 -1279 6801 1594 965 2194 "pin2" "2" "square,edge2"] + Pad[1280 -6800 1280 -4497 1594 965 2194 "pin6" "6" "square"] + Pad[1280 4498 1280 6801 1594 965 2194 "pin3" "3" "square,edge2"] + Pad[3839 -6800 3839 -4497 1594 965 2194 "pin5" "5" "square"] + Pad[3839 4498 3839 6801 1594 965 2194 "pin4" "4" "square,edge2"] + Pad[-2391 -3641 -2391 -747 3898 -3011 4498 "pin8" "8" "square"] + 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Connect("U10-6") + ) + Net("unnamed_net47" "(unknown)") + ( + Connect("C20-1") + Connect("U9-12") + ) + Net("unnamed_net48" "(unknown)") + ( + Connect("C20-2") + Connect("U9-8") + ) + Net("unnamed_net49" "(unknown)") + ( + Connect("C21-2") + Connect("U9-10") + ) + Net("unnamed_net50" "(unknown)") + ( + Connect("A1-1") + Connect("S1-1") + ) + Net("usbdm" "(unknown)") + ( + Connect("R54-1") + Connect("U7-70") + ) + Net("usbdp" "(unknown)") + ( + Connect("R55-1") + Connect("U7-71") + ) + Net("v_batt" "(unknown)") + ( + Connect("R25-1") + Connect("R26-2") + Connect("U7-35") + ) + Net("v_charge" "(unknown)") + ( + Connect("B1-1") + Connect("C5-2") + Connect("J2-1") + Connect("R32-2") + Connect("U2-3") + ) + Net("v_ldo_in" "(unknown)") + ( + Connect("C39-2") + Connect("D3-2") + Connect("R36-2") + Connect("U1-1") + Connect("U1-3") + ) + Net("v_lipo" "(unknown)") + ( + Connect("D3-1") + Connect("J1-7") + Connect("J2-2") + Connect("J9-8") + Connect("R25-2") + ) + Net("v_pbatt" "(unknown)") + ( + Connect("R27-1") + Connect("R28-2") + Connect("U7-36") + ) + Net("v_pyro" "(unknown)") + ( + Connect("J1-1") + Connect("J1-3") + Connect("J1-5") + Connect("J1-8") + Connect("J2-5") + Connect("J2-7") + Connect("J2-9") + Connect("R27-2") + ) + Net("v_usb" "(unknown)") + ( + Connect("C4-2") + Connect("J5-1") + Connect("R50-2") + Connect("U2-4") + ) + Net("vdda" "(unknown)") + ( + Connect("C601-1") + Connect("C602-1") + Connect("L600-2") + Connect("U7-22") + ) +) diff --git a/teledongle.sch b/teledongle.sch new file mode 100644 index 0000000..d51d9fa --- /dev/null +++ b/teledongle.sch @@ -0,0 +1,4005 @@ +v 20130925 2 +C 40000 40000 0 0 0 title-E-bdale.sym +N 51400 61900 50600 61900 4 +{ +T 50900 62000 5 10 1 1 0 0 1 +netname=v_usb +} +N 59400 44000 56300 44000 4 +{ +T 56300 44100 5 10 1 1 0 0 1 +netname=v_usb +} +C 61700 41300 1 0 0 gnd.sym +N 61800 43200 61800 41600 4 +C 57500 42400 1 90 0 capacitor.sym +{ +T 56800 42600 5 10 0 0 90 0 1 +device=CAPACITOR +T 57100 43100 5 10 1 1 180 0 1 +refdes=C4 +T 56600 42600 5 10 0 0 90 0 1 +symversion=0.1 +T 56700 42500 5 10 1 1 0 0 1 +value=4.7uF +T 57500 42400 5 10 0 0 0 0 1 +vendor_part_number=445-5947-1-ND +T 57500 42400 5 10 0 0 0 0 1 +footprint=0402 +T 57500 42400 5 10 0 0 0 0 1 +vendor=digikey +T 57500 42400 5 10 0 1 0 0 1 +loadstatus=smt +} +N 57300 42400 57300 41600 4 +N 57300 41600 69100 41600 4 +N 63000 44000 63000 43000 4 +C 63600 43500 1 270 0 battery.sym +{ +T 64500 43200 5 10 0 1 270 0 1 +device=CONNECTOR +T 64100 43400 5 10 1 1 0 0 1 +refdes=B1 +T 64900 43200 5 10 0 0 270 0 1 +symversion=0.1 +T 64100 43000 5 10 1 1 0 0 1 +value=LiPo +T 63600 43500 5 10 0 0 0 0 1 +footprint=B2B-PH +T 63600 43500 5 10 0 0 0 0 1 +vendor_part_number=A100034-ND +T 63600 43500 5 10 0 0 0 0 1 +loadstatus=throughhole +T 63600 43500 5 10 0 0 0 0 1 +vendor=digikey +T 63600 43500 5 10 0 1 0 0 1 +device=CONNECTOR +} +N 63000 42100 63000 41600 4 +N 69100 41600 69100 43100 4 +C 82300 46800 1 0 0 conn-2.sym +{ +T 81900 47400 5 10 0 0 0 0 1 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46300 49800 47300 49800 4 +{ +T 46600 49900 5 10 1 1 0 0 1 +netname=sense_a +} +T 13300 -8600 8 10 0 1 0 0 1 +vendor_part_number=MMA7260QT-ND +T 13300 -8600 8 10 0 1 0 0 1 +vendor_part_number=MCP9700-E/TO-ND +N 64500 44000 65000 44000 4 +{ +T 64500 44100 5 10 1 1 0 0 1 +netname=v_lipo +} +N 63800 43500 63800 44000 4 +N 63800 42800 63800 41600 4 +T 63300 44800 9 10 1 0 0 0 2 + external power switch +attached to pyro header +C 63900 48300 1 90 0 resistor.sym +{ +T 63500 48600 5 10 0 0 90 0 1 +device=RESISTOR +T 64400 49000 5 10 1 1 180 0 1 +refdes=R25 +T 64000 48500 5 10 1 1 0 0 1 +value=5.6k +T 63900 48300 5 10 0 1 0 0 1 +footprint=0402 +T 63900 48300 5 10 0 1 0 0 1 +vendor_part_number=P5.60KLCT-ND +T 63900 48300 5 10 0 0 0 0 1 +vendor=digikey +T 63900 48300 5 10 0 1 0 0 1 +loadstatus=smt +} +C 63900 47200 1 90 0 resistor.sym +{ +T 63500 47500 5 10 0 0 90 0 1 +device=RESISTOR +T 64400 47900 5 10 1 1 180 0 1 +refdes=R26 +T 64000 47400 5 10 1 1 0 0 1 +value=10k +T 63900 47200 5 10 0 1 0 0 1 +vendor_part_number=P10.0KLCT-ND +T 63900 47200 5 10 0 1 0 0 1 +footprint=0402 +T 63900 47200 5 10 0 0 0 0 1 +vendor=digikey +T 63900 47200 5 10 0 1 0 0 1 +loadstatus=smt +} +N 63800 48300 63800 48100 4 +N 63800 48200 65100 48200 4 +{ +T 64600 48300 5 10 1 1 0 0 1 +netname=v_batt +} +N 63800 49200 62900 49200 4 +{ +T 62900 49300 5 10 1 1 0 0 1 +netname=v_lipo +} +C 63700 46900 1 0 0 gnd.sym +T 64600 48800 9 10 1 0 0 0 2 +Tolerate up to +5V charging +N 68000 43600 67900 43600 4 +N 67900 43600 67900 44000 4 +T 82400 40400 9 10 1 0 0 0 1 +0.4 +T 80000 40400 9 10 1 0 0 0 1 +1 +T 80600 40400 9 10 1 0 0 0 1 +1 +T 77700 40400 9 10 1 0 0 0 1 +telemega.sch +T 77700 40100 9 10 1 0 0 0 1 +http://altusmetrum.com/TeleMega +N 73200 70200 74600 70200 4 +{ +T 73200 70300 5 10 1 1 0 0 1 +netname=reset_n +} +N 78100 57000 77200 57000 4 +{ +T 77200 57100 5 10 1 1 0 0 1 +netname=miso2 +} +N 78100 57400 77200 57400 4 +{ +T 77200 57500 5 10 1 1 0 0 1 +netname=mosi2 +} +N 78100 57800 77200 57800 4 +{ +T 77200 57900 5 10 1 1 0 0 1 +netname=sck2 +} +C 79100 59500 1 0 0 3.3V-plus.sym +C 79200 55500 1 0 0 gnd.sym +T 13300 -8600 8 10 0 1 0 0 1 +vendor_part_number=MMA7260QT-ND +T 13300 -8600 8 10 0 1 0 0 1 +vendor_part_number=MCP9700-E/TO-ND +C 49200 48100 1 90 0 resistor.sym +{ +T 48800 48400 5 10 0 0 90 0 1 +device=RESISTOR +T 48900 48800 5 10 1 1 180 0 1 +refdes=R1 +T 49200 48095 5 10 0 1 90 0 1 +footprint=0402 +T 48600 48300 5 10 1 1 0 0 1 +value=3.3k +T 49200 48100 5 10 0 1 0 0 1 +vendor_part_number=P3.30KLCT-ND +T 49200 48100 5 10 0 0 0 0 1 +vendor=digikey +T 49200 48100 5 10 0 1 0 0 1 +loadstatus=smt +} +C 49000 47800 1 0 0 gnd.sym +C 42700 47800 1 0 0 gnd.sym +C 80300 63600 1 0 0 hole_plated.sym +{ +T 80400 65400 5 10 0 0 0 0 1 +device=HOLE_PLATED +T 79900 63800 5 10 1 1 0 0 1 +refdes=H1 +T 80300 63600 5 10 0 0 0 0 1 +footprint=hole-M3 +T 80300 63600 5 10 0 1 0 0 1 +loadstatus=noload +T 80300 63600 5 10 0 1 0 0 1 +nobom=1 +} +T 80000 64400 9 10 1 0 0 0 2 +mounting holes +for 4-40 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0 0 90 0 1 +vendor_part_number=P27.0KLCT-ND +T 46700 49100 5 10 1 1 0 0 1 +value=27k +T 46500 48900 5 10 0 0 0 0 1 +vendor=digikey +T 46500 48900 5 10 0 1 0 0 1 +loadstatus=smt +} +C 76800 63600 1 0 0 gnd.sym +N 75500 61900 77200 61900 4 +{ +T 75500 62000 5 10 1 1 0 0 1 +netname=cs_companion0 +} +N 77200 63500 75500 63500 4 +{ +T 75500 63600 5 10 1 1 0 0 1 +netname=sck2 +} +N 75500 63100 77200 63100 4 +{ +T 75500 63200 5 10 1 1 0 0 1 +netname=mosi2 +} +N 77200 62700 75500 62700 4 +{ +T 75500 62800 5 10 1 1 0 0 1 +netname=miso2 +} +N 77200 61100 75500 61100 4 +{ +T 75500 61200 5 10 1 1 0 0 1 +netname=v_lipo +} +N 76900 63900 77200 63900 4 +N 70100 44000 72700 44000 4 +C 50600 48700 1 0 0 FDS9926A.sym +{ +T 50600 49900 5 10 1 1 0 0 1 +refdes=Q1 +T 50638 48708 5 10 0 1 0 0 1 +device=MOSFET +T 50295 48670 5 10 0 1 0 0 1 +footprint=1212-8 +T 50600 48700 5 10 0 0 0 0 1 +slot=1 +T 50600 48700 5 10 0 0 0 0 1 +vendor_part_number=781-SI7232DN-GE3 +T 50600 48700 5 10 1 1 0 0 1 +value=Si7232DN +T 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1 0 0 1 +loadstatus=noload +T 52100 53000 5 10 0 1 0 0 1 +vendor=digikey +T 52100 53000 5 10 0 1 0 0 1 +vendor_part_number=399-1019-1-ND +} +C 52300 53800 1 0 1 resistor.sym +{ +T 52000 54200 5 10 0 0 0 6 1 +device=RESISTOR +T 51700 53600 5 10 1 1 0 6 1 +refdes=R104 +T 52200 53600 5 10 1 1 0 6 1 +value=0 +T 52300 53800 5 10 0 1 0 0 1 +footprint=0402 +T 52300 53800 5 10 0 1 0 0 1 +loadstatus=smt +T 52300 53800 5 10 0 1 0 0 1 +vendor=digikey +T 52300 53800 5 10 0 1 0 0 1 +vendor_part_number=P0.0JCT-ND +} +C 52400 52700 1 0 1 gnd.sym +N 52600 54900 52600 54300 4 +N 52300 53900 54800 53900 4 +N 64300 52700 65600 52700 4 +{ +T 65100 52800 5 10 1 1 0 0 1 +netname=mosi1 +} +N 64300 53500 65600 53500 4 +{ +T 65200 53600 5 10 1 1 0 0 1 +netname=sck1 +} +N 64300 53100 65600 53100 4 +{ +T 65100 53200 5 10 1 1 0 0 1 +netname=miso1 +} +N 80200 48000 79800 48000 4 +N 54800 63100 53500 63100 4 +{ +T 54300 63200 5 10 1 1 0 6 1 +netname=ba_mosi1 +} +N 54800 63900 53500 63900 4 +{ +T 54200 64000 5 10 1 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42600 65500 42500 65500 4 +N 42600 65900 42500 65900 4 +C 40500 68300 1 0 0 3.3V-plus.sym +N 42600 68300 40700 68300 4 +N 40700 67400 40700 64700 4 +N 40700 64700 42500 64700 4 +C 41400 67000 1 90 0 capacitor.sym +{ +T 40700 67200 5 10 0 0 90 0 1 +device=CAPACITOR +T 41700 67800 5 10 1 1 180 0 1 +refdes=C102 +T 40500 67200 5 10 0 0 90 0 1 +symversion=0.1 +T 41300 67100 5 10 1 1 0 0 1 +value=1uF +T 41400 67000 5 10 0 0 0 0 1 +vendor_part_number=490-1320-1-ND +T 41400 67000 5 10 0 0 0 0 1 +footprint=0402 +T 41400 67000 5 10 0 0 0 0 1 +vendor=digikey +T 41400 67000 5 10 0 1 0 0 1 +loadstatus=smt +} +C 42100 66600 1 90 0 capacitor.sym +{ +T 41400 66800 5 10 0 0 90 0 1 +device=CAPACITOR +T 42400 67400 5 10 1 1 180 0 1 +refdes=C103 +T 41200 66800 5 10 0 0 90 0 1 +symversion=0.1 +T 42000 66700 5 10 1 1 0 0 1 +value=1uF +T 42100 66600 5 10 0 0 0 0 1 +vendor_part_number=490-1320-1-ND +T 42100 66600 5 10 0 0 0 0 1 +footprint=0402 +T 42100 66600 5 10 0 0 0 0 1 +vendor=digikey +T 42100 66600 5 10 0 1 0 0 1 +loadstatus=smt +} +N 42600 67900 41200 67900 4 +N 41900 67500 42600 67500 4 +N 41900 66600 41900 64700 4 +N 41200 67000 41200 64700 4 +N 42600 66300 42500 66300 4 +N 46000 67100 44900 67100 4 +{ +T 45550 67200 5 10 1 1 0 0 1 +netname=miso1 +} +N 46000 67500 44900 67500 4 +{ +T 45550 67600 5 10 1 1 0 0 1 +netname=mosi1 +} +N 46000 67900 44900 67900 4 +{ +T 45650 68000 5 10 1 1 0 0 1 +netname=sck1 +} +N 46000 68300 44900 68300 4 +{ +T 45300 68400 5 10 1 1 0 0 1 +netname=cs_accel +} +C 42400 64300 1 0 0 gnd.sym +N 42600 65100 42500 65100 4 +N 64300 63500 65600 63500 4 +{ +T 64900 63600 5 10 1 1 0 0 1 +netname=cs_accel +} +N 64300 71500 65600 71500 4 +{ +T 64500 71600 5 10 1 1 0 0 1 +netname=radio_marc_isr +} +N 70600 53700 71900 53700 4 +{ +T 70600 53800 5 10 1 1 0 0 1 +netname=radio_marc_isr +} +C 74600 66200 1 0 0 UBLOX-MAX.sym +{ +T 74995 71495 5 10 1 1 0 0 1 +refdes=U10 +T 76095 70795 5 10 0 1 0 0 1 +device=IC +T 74600 66200 5 10 0 1 0 0 1 +footprint=UBLOX-MAX +T 74600 66200 5 10 0 1 0 0 1 +loadstatus=smt +T 74600 66200 5 10 0 1 0 0 1 +vendor=u-blox +T 74600 66200 5 10 0 1 0 0 1 +vendor_part_number=MAX-7Q +T 74600 66200 5 10 1 1 0 0 1 +value=MAX-7Q +} +N 76600 66000 76600 66200 4 +N 76600 66100 77000 66100 4 +N 77000 66100 77000 66200 4 +N 76600 66100 76200 66100 4 +N 76200 66100 76200 66200 4 +T 72200 65500 9 10 1 0 0 0 6 +v_charge can be 4.2 volts +v_bckp must be 1.4 - 3.6 volts +i_bckp on the order of 22uA + +56k should drop 1.232 volts, +and consume 27 microwatts +C 73800 67100 1 180 0 resistor.sym +{ +T 73500 66700 5 10 0 0 180 0 1 +device=RESISTOR +T 72900 67200 5 10 1 1 0 0 1 +refdes=R32 +T 73500 67200 5 10 1 1 0 0 1 +value=56k +T 73800 67100 5 10 0 1 180 0 1 +footprint=0402 +T 73800 67100 5 10 0 1 180 0 1 +vendor=digikey +T 73800 67100 5 10 0 1 180 0 1 +vendor_part_number=P56.0KLCT-ND +T 73800 67100 5 10 0 1 90 0 1 +loadstatus=smt +} +N 73800 67000 74600 67000 4 +T 70700 70800 9 10 1 0 0 0 9 +don't drive reset_gps high! + +mcp130t is open drain +with 5k internal pull-up + +do we really want 3.3k +pull-up here? unclear! + +don't use reset_n at all? +T -72100 -78700 8 10 0 1 0 0 1 +vendor_part_number=MMA7260QT-ND +T -72100 -78700 8 10 0 1 0 0 1 +vendor_part_number=MCP9700-E/TO-ND +T -72100 -78700 8 10 0 1 0 0 1 +vendor_part_number=MMA7260QT-ND +T -72100 -78700 8 10 0 1 0 0 1 +vendor_part_number=MCP9700-E/TO-ND +T -29500 -72800 8 10 0 1 0 0 1 +vendor_part_number=MMA7260QT-ND +T -29500 -72800 8 10 0 1 0 0 1 +vendor_part_number=MCP9700-E/TO-ND +T -29500 -72800 8 10 0 1 0 0 1 +vendor_part_number=MMA7260QT-ND +T -29500 -72800 8 10 0 1 0 0 1 +vendor_part_number=MCP9700-E/TO-ND +C 43500 63200 1 0 0 3.3V-plus.sym +N 44900 62000 45100 62000 4 +N 45100 62000 45100 63200 4 +N 44900 62400 45100 62400 4 +C 42500 61000 1 90 0 capacitor.sym +{ +T 41800 61200 5 10 0 0 90 0 1 +device=CAPACITOR +T 42200 61800 5 10 1 1 180 0 1 +refdes=C20 +T 41600 61200 5 10 0 0 90 0 1 +symversion=0.1 +T 41600 61100 5 10 1 1 0 0 1 +value=0.22uF +T 42500 61000 5 10 0 1 0 0 1 +footprint=0402 +T 42500 61000 5 10 0 1 0 0 1 +loadstatus=smt +T 42500 61000 5 10 0 1 0 0 1 +vendor=digikey +T 42500 61000 5 10 0 1 0 0 1 +vendor_part_number=587-1228-1-ND +} +C 45800 62000 1 90 0 capacitor.sym +{ +T 45100 62200 5 10 0 0 90 0 1 +device=CAPACITOR +T 46000 62800 5 10 1 1 180 0 1 +refdes=C22 +T 44900 62200 5 10 0 0 90 0 1 +symversion=0.1 +T 45800 62100 5 10 1 1 0 0 1 +value=0.1uF +T 45800 62000 5 10 0 1 0 0 1 +footprint=0402 +T 45800 62000 5 10 0 1 0 0 1 +loadstatus=smt +T 45800 62000 5 10 0 1 0 0 1 +vendor=digikey +T 45800 62000 5 10 0 1 0 0 1 +vendor_part_number=399-3027-1-ND +} +C 42500 59500 1 90 0 capacitor.sym +{ +T 41800 59700 5 10 0 0 90 0 1 +device=CAPACITOR +T 42200 60300 5 10 1 1 180 0 1 +refdes=C21 +T 41600 59700 5 10 0 0 90 0 1 +symversion=0.1 +T 41700 59600 5 10 1 1 0 0 1 +value=4.7uF +T 42500 59500 5 10 0 1 0 0 1 +footprint=0402 +T 42500 59500 5 10 0 1 0 0 1 +loadstatus=smt +T 42500 59500 5 10 0 1 0 0 1 +vendor=digikey +T 42500 59500 5 10 0 1 0 0 1 +vendor_part_number=445-5947-1-ND +} +C 42500 59500 1 0 0 HMC5883L.sym +{ +T 43255 62700 5 10 0 1 0 0 1 +device=IC +T 42805 62945 5 10 1 1 0 0 1 +refdes=U9 +T 42500 59500 5 10 0 0 0 0 1 +footprint=LPCC16 +T 43700 62950 5 10 1 1 0 0 1 +value=HMC5883L +T 42500 59500 5 10 0 1 0 0 1 +loadstatus=smt +T 42500 59500 5 10 0 1 0 0 1 +vendor=digikey +T 42500 59500 5 10 0 1 0 0 1 +vendor_part_number=342-1082-1-ND +} +N 42500 62000 42300 62000 4 +N 42300 62000 42300 61900 4 +N 42300 61000 42300 60800 4 +N 42300 60800 42500 60800 4 +N 42300 60400 42500 60400 4 +C 42200 59200 1 0 0 gnd.sym +C 43200 59200 1 0 0 gnd.sym +C 43900 59200 1 0 0 gnd.sym +C 45500 61700 1 0 0 gnd.sym +N 44900 61200 46500 61200 4 +{ +T 45400 61300 5 10 1 1 0 0 1 +netname=sda1 +} +N 44900 60800 47300 60800 4 +{ +T 45500 60900 5 10 1 1 0 0 1 +netname=scl1 +} +N 42300 63200 45100 63200 4 +N 42500 62400 42300 62400 4 +N 42300 62400 42300 63200 4 +N 45600 62900 45100 62900 4 +N 44900 60400 45800 60400 4 +{ +T 45200 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