X-Git-Url: https://git.gag.com/?p=hw%2Fteledongle;a=blobdiff_plain;f=Makefile;h=140b78a92b6207e378c9634167648e1d96449c8a;hp=42729904247dfd2cdbe6bb1b5d4ee66abdf5fe35;hb=cd30b23a52bbe73116858a8520550ea4acc1bd20;hpb=f63d0f84ecf924673c9f555f9bc5f6786be09803 diff --git a/Makefile b/Makefile index 4272990..140b78a 100644 --- a/Makefile +++ b/Makefile @@ -22,6 +22,9 @@ partslist.csv: $(PROJECT).sch Makefile partslist.dk: $(PROJECT).sch Makefile $(SCHEME)/gnet-partslist-bom.scm gnetlist -L $(SCHEME) -g partslist-bom -Ovendor=digikey -o $@ $(PROJECT).sch +partslist-check.dk: $(PROJECT).sch Makefile $(SCHEME)/gnet-partslist-mfg-bom.scm + gnetlist -L $(SCHEME) -g partslist-mfg-bom -Ovendor=digikey -o $@ $(PROJECT).sch + partslist.mouser: $(PROJECT).sch Makefile $(SCHEME)/gnet-partslist-bom.scm gnetlist -L $(SCHEME) -g partslist-bom -Ovendor=mouser -o $@ $(PROJECT).sch @@ -34,7 +37,7 @@ $(PROJECT).xy: $(PROJECT).pcb $(PROJECT).bottom.gbr: $(PROJECT).pcb pcb -x gerber $(PROJECT).pcb -zip: $(PROJECT).bottom.gbr $(PROJECT).bottommask.gbr $(PROJECT).fab.gbr $(PROJECT).top.gbr $(PROJECT).topmask.gbr $(PROJECT).toppaste.gbr $(PROJECT).topsilk.gbr $(PROJECT).plated-drill.cnc $(PROJECT).xy Makefile # $(PROJECT).xls +zip: $(PROJECT).bottom.gbr $(PROJECT).bottommask.gbr $(PROJECT).fab.gbr $(PROJECT).top.gbr $(PROJECT).topmask.gbr $(PROJECT).toppaste.gbr $(PROJECT).topsilk.gbr $(PROJECT).group2.gbr $(PROJECT).group3.gbr $(PROJECT).plated-drill.cnc $(PROJECT).xy Makefile # $(PROJECT).xls zip $(PROJECT).zip $(PROJECT).*.gbr $(PROJECT).*.cnc $(PROJECT).xy # $(PROJECT).xls oshpark: $(PROJECT).bottom.gbr $(PROJECT).bottommask.gbr $(PROJECT).top.gbr $(PROJECT).topmask.gbr $(PROJECT).topsilk.gbr $(PROJECT).plated-drill.cnc @@ -46,6 +49,8 @@ oshpark: $(PROJECT).bottom.gbr $(PROJECT).bottommask.gbr $(PROJECT).top.gbr $(PR mv $(PROJECT).topmask.gbr top\ solder\ mask.ger mv $(PROJECT).topsilk.gbr top\ silk\ screen.ger mv $(PROJECT).plated-drill.cnc drills.xln + mv $(PROJECT).group2.gbr internal\ plane\ 1.ger + mv $(PROJECT).group3.gbr internal\ plane\ 2.ger zip $(PROJECT)-oshpark.zip *.ger *.xln stencil: $(PROJECT).bottom.gbr $(PROJECT).toppaste.gbr $(PROJECT).outline.gbr @@ -53,11 +58,25 @@ stencil: $(PROJECT).bottom.gbr $(PROJECT).toppaste.gbr $(PROJECT).outline.gbr clean: rm -f *.bom *.drc *.log *~ $(PROJECT).ps *.gbr *.cnc *bak* *- *.zip - rm -f *.net *.xy *.cmd *.png partslist partslist.csv *.ger *.xln + rm -f *.net *.xy *.cmd *.png partslist partslist.* *.ger *.xln rm -f *.partslist *.new.pcb *.unsorted $(PROJECT).xls muffin-5267.pdf -muffins: partslist.csv $(AM)/glabels/muffin-short-5267.glabels - glabels-3-batch $(AM)/glabels/muffin-short-5267.glabels \ +muffins: partslist.csv $(AM)/glabels/muffin-5267.glabels + glabels-3-batch $(AM)/glabels/muffin-5267.glabels \ -i partslist.csv -o muffin-5267.ps >/dev/null && \ ps2pdf muffin-5267.ps && rm muffin-5267.ps +$(PROJECT)-sch.ps: $(PROJECT).sch + gschem -p -o $(PROJECT)-sch.ps -s /usr/share/gEDA/scheme/print.scm $(PROJECT).sch + +$(PROJECT)-sch.pdf: $(PROJECT)-sch.ps + ps2pdf $(PROJECT)-sch.ps + +$(PROJECT)-pcb.ps: $(PROJECT).pcb + pcb -x ps --psfile $(PROJECT)-pcb.ps --media Letter $(PROJECT).pcb + +$(PROJECT)-pcb.pdf: $(PROJECT)-pcb.ps + ps2pdf $(PROJECT)-pcb.ps + +pdf: $(PROJECT)-sch.pdf $(PROJECT)-pcb.pdf +