From: Bdale Garbee Date: Mon, 12 Sep 2011 03:38:09 +0000 (-0600) Subject: fix errant boundary line X-Git-Tag: fab-v0.2~3 X-Git-Url: https://git.gag.com/?p=hw%2Ftelebt;a=commitdiff_plain;h=0049d9164fc8f6bc7410a6af45a3f0dc296645b6 fix errant boundary line --- diff --git a/telebt.pcb b/telebt.pcb index 2a5dd2e..5c5c294 100644 --- a/telebt.pcb +++ b/telebt.pcb @@ -1507,7 +1507,7 @@ Layer(1 "top") Line[24606 133854 24606 121063 600 2000 "clearline,lock"] Line[12795 109252 0 109252 600 2000 "clearline,lock"] Line[3927 0 266732 0 600 2000 "clearline,lock"] - Line[278543 24606 913398 24606 600 2000 "clearline,lock"] + Line[278543 24606 291339 24606 600 2000 "clearline,lock"] Line[266732 0 266732 12795 600 2000 "clearline,lock"] Line[0 109252 0 3937 600 2000 "clearline,lock"] Line[148267 78386 138780 70079 1000 2000 "clearline"]