hw/lipocharger
2022-08-27 Bdale Garbeecomplete first pass at a board we can SMT assemble... openpnp
2022-08-27 Bdale Garbeework in progress
2022-08-25 Bdale Garbeeinitial stab at parts placement
2022-08-25 Bdale Garbeemove to 0603 passives, lepton-eda + pcb-rnd
2022-08-25 Bdale Garbeemove board design tentatively to pcb-rnd
2017-04-27 Bdale Garbeemove to latest footprint versions, particularly LED... master
2017-01-07 Bdale Garbeeswitch to preferred parts
2014-02-04 Bdale Garbeeflush some cruft from the .sch file
2013-07-16 Bdale Garbeeupdate attributes to match what we'll use on the next...
2013-07-16 Bdale Garbeeadd dk target
2013-07-14 Bdale Garbeedon't include top silk, it's a mess fab-1.1
2013-07-14 Bdale Garbeedrag Makefile, kicking and screaming, into the modern era
2013-07-14 Bdale Garbeefix outline layer to not trigger DRC errors
2013-07-14 Bdale Garbeemove caps to make it easier to build these by hand
2013-07-14 Bdale Garbeeswitch to shared symbols and packages
2013-01-21 Bdale Garbeemoving data sheets to central repo
2013-01-15 Bdale Garbeemove to common scheme library
2012-12-11 Bdale Garbeemove to partslistgag
2011-09-20 Bdale Garbeetweak centering of charge rate text
2011-09-20 Bdale Garbeerework silk to make the charge rate (somewhat) easier...
2011-06-07 Bdale Garbeeexplicitly do not include frontsilk in the zip file... fab-1.0
2011-06-06 Bdale Garbeechange version to 1.0 in preparation for requesting...
2011-05-03 Bdale Garbeeclean up silk screen
2011-05-03 Bdale Garbeefix stupidity in the LED circuit .. sigh
2011-04-26 Bdale Garbeeadd more attributes
2011-04-22 Bdale Garbeeadd data sheet for the slide switch we're using fab-v0.2
2011-04-22 Bdale Garbeefix mask clearance on switch mounting holes, fix refdes...
2011-04-19 Bdale Garbeeswitch usb footprint for one without overhang so can...
2011-04-19 Bdale Garbeeshrink length to minimum required including USB overhang
2011-03-10 Bdale Garbeeadd charge rate switch legends to schematic and pcb...
2011-03-10 Bdale Garbeeclearn DRC run except for known bug regarding outline...
2011-03-10 Bdale Garbeefirst draft of a second version
2011-03-10 Bdale Garbeeneed a 10k resistor from the thermistor input to ground
2010-12-06 Bdale Garbeeswitch to 6.3V bulk caps!
2010-11-23 Bdale Garbeemake sure all silk elements are within pcb outline fab-v0.1
2010-11-23 Bdale Garbeetweaking silk and attributes
2010-11-18 Bdale Garbeenew footprint for the IC with vias, DRC clean again origin/master
2010-11-18 Bdale Garbeeadd explicit netlist connection for exposed ground...
2010-11-18 Bdale Garbeemove vias outside the battery connector pads
2010-11-11 Bdale Garbeeadd targets for automating outputs
2010-11-11 Bdale Garbeefix layout name
2010-11-11 Bdale Garbeefix DFM identified soldermask issues
2010-11-11 Bdale Garbeetweaks based on freedfm.com output
2010-11-05 Bdale Garbeeground prog2, fatten supply and output traces
2010-11-05 Bdale Garbeeenabling outline layer causes bogus drc errors, so...
2010-11-04 Bdale Garbeeinitial capture of LiPo charger