update EasyTimer for 2020 copyright and add slots for USB in outline layer

diff --git a/easytimer.lht b/easytimer.lht
index f0dc27088be835714388536fce523f98cc706fa7..17740f480134c1b9eb6d1c2c97677f7a9024be54 100644 (file)
--- a/easytimer.lht
+++ b/easytimer.lht
@@ -34,7 +34,7 @@ ha:pcb-rnd-board-v6 {
     diameter = 27.0mil
     text_scale = 0
     text_thick = 0.0
-    thickness = 6.0mil
+    thickness = 0.45mm
     hole = 13.0mil
     clearance = 6.0mil
    }
@@ -44,7 +44,7 @@ ha:pcb-rnd-board-v6 {
    ha:size {
     thermal_scale = 0.500000
     x = 38.1mm
-    y = 1000.0mil
+    y = 800.0mil
    }
    board_name = EasyTimer
    ha:grid {
@@ -13400,12 +13400,6 @@ ha:pcb-rnd-board-v6 {
          clearline=1
         }
        }
-       ha:line.43223 {
-        x1=871.0mil; y1=185.0mil; x2=897.0mil; y2=159.0mil; thickness=6.0mil; clearance=12.0mil;
-        ha:flags {
-         clearline=1
-        }
-       }
        ha:line.44991 {
         x1=29.7688mm; y1=369.0mil; x2=1.173in; y2=368.0mil; thickness=6.0mil; clearance=12.0mil;
         ha:flags {
@@ -13424,42 +13418,12 @@ ha:pcb-rnd-board-v6 {
          clearline=1
         }
        }
-       ha:line.47959 {
-        x1=717.0mil; y1=320.0mil; x2=717.0mil; y2=478.0mil; thickness=25.0mil; clearance=20.0mil;
-        ha:flags {
-         clearline=1
-        }
-       }
-       ha:line.47962 {
-        x1=717.0mil; y1=478.0mil; x2=726.0mil; y2=487.0mil; thickness=25.0mil; clearance=20.0mil;
-        ha:flags {
-         clearline=1
-        }
-       }
        ha:line.49334 {
         x1=1.337in; y1=410.0mil; x2=33.7058mm; y2=461.0mil; thickness=6.0mil; clearance=12.0mil;
         ha:flags {
          clearline=1
         }
        }
-       ha:line.49355 {
-        x1=27.051mm; y1=370.0mil; x2=27.051mm; y2=449.0mil; thickness=6.0mil; clearance=12.0mil;
-        ha:flags {
-         clearline=1
-        }
-       }
-       ha:line.49358 {
-        x1=27.051mm; y1=449.0mil; x2=27.9654mm; y2=485.0mil; thickness=6.0mil; clearance=12.0mil;
-        ha:flags {
-         clearline=1
-        }
-       }
-       ha:line.49361 {
-        x1=27.9654mm; y1=485.0mil; x2=28.84043mm; y2=485.0mil; thickness=6.0mil; clearance=12.0mil;
-        ha:flags {
-         clearline=1
-        }
-       }
        ha:line.49364 {
         x1=28.84043mm; y1=485.0mil; x2=1.136in; y2=485.55mil; thickness=6.0mil; clearance=12.0mil;
         ha:flags {
@@ -13526,26 +13490,14 @@ ha:pcb-rnd-board-v6 {
          clearline=1
         }
        }
-       ha:line.49523 {
-        x1=897.0mil; y1=159.0mil; x2=30.6324mm; y2=159.0mil; thickness=6.0mil; clearance=12.0mil;
-        ha:flags {
-         clearline=1
-        }
-       }
-       ha:line.49526 {
-        x1=30.6324mm; y1=159.0mil; x2=1.33in; y2=283.0mil; thickness=6.0mil; clearance=12.0mil;
-        ha:flags {
-         clearline=1
-        }
-       }
        ha:line.49529 {
-        x1=1.33in; y1=283.0mil; x2=1.346in; y2=283.0mil; thickness=6.0mil; clearance=12.0mil;
+        x1=1.334in; y1=287.0mil; x2=1.35in; y2=287.0mil; thickness=6.0mil; clearance=12.0mil;
         ha:flags {
          clearline=1
         }
        }
        ha:line.49532 {
-        x1=1.346in; y1=283.0mil; x2=1.364in; y2=301.0mil; thickness=6.0mil; clearance=12.0mil;
+        x1=1.364in; y1=301.0mil; x2=1.35in; y2=287.0mil; thickness=6.0mil; clearance=12.0mil;
         ha:flags {
          clearline=1
         }
@@ -13604,14 +13556,32 @@ ha:pcb-rnd-board-v6 {
          clearline=1
         }
        }
-       ha:line.52747 {
-        x1=1.052in; y1=227.0mil; x2=721.0mil; y2=227.0mil; thickness=25.0mil; clearance=20.0mil;
+       ha:line.54150 {
+        x1=717.0mil; y1=231.0mil; x2=1.052in; y2=227.0mil; thickness=25.0mil; clearance=20.0mil;
+        ha:flags {
+         clearline=1
+        }
+       }
+       ha:line.54153 {
+        x1=717.0mil; y1=320.0mil; x2=725.0mil; y2=487.0mil; thickness=25.0mil; clearance=20.0mil;
+        ha:flags {
+         clearline=1
+        }
+       }
+       ha:line.54156 {
+        x1=871.0mil; y1=185.0mil; x2=1.232in; y2=185.0mil; thickness=6.0mil; clearance=12.0mil;
         ha:flags {
          clearline=1
         }
        }
-       ha:line.52750 {
-        x1=721.0mil; y1=227.0mil; x2=717.0mil; y2=231.0mil; thickness=25.0mil; clearance=20.0mil;
+       ha:line.54165 {
+        x1=1.232in; y1=185.0mil; x2=1.334in; y2=287.0mil; thickness=6.0mil; clearance=12.0mil;
+        ha:flags {
+         clearline=1
+        }
+       }
+       ha:line.55502 {
+        x1=27.051mm; y1=370.0mil; x2=1.136in; y2=485.55mil; thickness=6.0mil; clearance=12.0mil;
         ha:flags {
          clearline=1
         }
@@ -13660,6 +13630,18 @@ ha:pcb-rnd-board-v6 {
          clearline=1
         }
        }
+       ha:line.55505 {
+        x1=23.216108mm; y1=18.320004mm; x2=23.216108mm; y2=764.57mil; thickness=0.45mm; clearance=12.0mil;
+        ha:flags {
+         clearline=1
+        }
+       }
+       ha:line.55508 {
+        x1=1.16598in; y1=18.320004mm; x2=1.16598in; y2=764.57mil; thickness=0.45mm; clearance=12.0mil;
+        ha:flags {
+         clearline=1
+        }
+       }
       }
       color = {#104e8b}
     }
@@ -13741,7 +13723,7 @@ ha:pcb-rnd-board-v6 {
         rot = 180.000000
        }
        ha:text.2185 {
-        string=` 2019; x=18.7583mm; y=635.2mil; scale=90; fid=0;
+        string=` 2020; x=18.7583mm; y=635.2mil; scale=90; fid=0;
         ha:flags {
          clearline=1
          onsolder=1
@@ -16034,11 +16016,11 @@ ha:pcb-rnd-board-v6 {
     min_drill = 0.2540 mm
     text_font_id = 0
     text_scale = 100
-    via_thickness = 31.00 mil
-    via_drilling_hole = 15.00 mil
+    via_thickness = 27.00 mil
+    via_drilling_hole = 13.00 mil
     min_slk = 0.1270 mm
     text_thickness = 0
-    line_thickness = 6.00 mil
+    line_thickness = 450.00 um
     shrink = 0.2540 mm
     poly_isle_area = 12903200000000.000000
     min_wid = 0.1524 mm
@@ -16055,7 +16037,7 @@ ha:pcb-rnd-board-v6 {
     clear_line = true
     show_number = false
     auto_drc = false
-    all_direction_lines = false
+    all_direction_lines = true
     lock_names = false
     unique_names = false
     only_names = false

diff --git a/easytimer.sch b/easytimer.sch
index f5ee9bb5494def017a6603a168d047abd76216a0..6a8b99a8466ad3a494b3bb6caae2c62113c6a261 100644 (file)
--- a/easytimer.sch
+++ b/easytimer.sch
@@ -573,7 +573,7 @@ T 6800 29300 5 10 1 1 0 0 1
 netname=cs_gyro
 }
 T 39000 10900 9 10 1 0 0 0 2
-Copyright 2019 by Bdale Garbee
+Copyright 2020 by Bdale Garbee
   Licensed under the TAPR OHL
 C 3800 24400 1 0 0 conn-5.sym
 {