From: Bdale Garbee <bdale@gag.com>
Date: Fri, 22 Mar 2013 17:02:18 +0000 (-0600)
Subject: move sense_bat divider to v_ldo_in so we can claim reverse polarity protection
X-Git-Tag: fab-v1.90~32
X-Git-Url: https://git.gag.com/?p=hw%2Feasymini;a=commitdiff_plain;h=3595d7d5433f229387473c49222af125d6fa664a

move sense_bat divider to v_ldo_in so we can claim reverse polarity protection
---

diff --git a/easymetrum.pcb b/easymetrum.pcb
index d957628..2f69d18 100644
--- a/easymetrum.pcb
+++ b/easymetrum.pcb
@@ -3,10 +3,10 @@
 # To read pcb files, the pcb version (or the git source date) must be >= the file version
 FileVersion[20091103]
 
-PCB["EasyMetrum" 1500.00mil 1000.00mil]
+PCB["EasyMetrum" 1500.00mil 800.00mil]
 
 Grid[100.000000 0.0000 0.0000 0]
-Cursor[11.00mil 93.00mil 0.000000]
+Cursor[8.00mil 47.00mil 0.000000]
 PolyArea[200000000.000000]
 Thermal[0.500000]
 DRC[6.00mil 10.00mil 6.00mil 5.00mil 10.00mil 7.00mil]
@@ -868,6 +868,8 @@ Via[668.00mil 674.00mil 31.00mil 12.00mil 0.0000 15.00mil "" ""]
 Via[530.00mil 719.00mil 31.00mil 12.00mil 0.0000 15.00mil "" ""]
 Via[685.00mil 639.00mil 31.00mil 12.00mil 0.0000 15.00mil "" ""]
 Via[576.00mil 594.00mil 31.00mil 12.00mil 0.0000 15.00mil "" ""]
+Via[390.00mil 214.00mil 31.00mil 12.00mil 0.0000 15.00mil "" ""]
+Via[80.00mil 290.00mil 31.00mil 12.00mil 0.0000 15.00mil "" ""]
 
 Element["onsolder" "282834-4" "J3" "Terminal-4" 265.94mil 397.95mil 13.00mil -3.00mil 0 100 "auto"]
 (
@@ -1500,7 +1502,6 @@ Layer(1 "top")
 	Line[983.00mil 154.00mil 1014.00mil 123.00mil 10.00mil 12.00mil "clearline"]
 	Line[1014.00mil 123.00mil 1056.00mil 123.00mil 10.00mil 12.00mil "clearline"]
 	Line[425.00mil 2.9144mm 425.00mil 181.52mil 10.00mil 12.00mil "clearline"]
-	Line[425.00mil 213.00mil 425.00mil 270.00mil 10.00mil 12.00mil "clearline"]
 	Line[351.00mil 5.4036mm 351.00mil 244.00mil 10.00mil 12.00mil "clearline"]
 	Line[351.00mil 244.00mil 325.00mil 270.00mil 10.00mil 12.00mil "clearline"]
 	Line[351.00mil 4.6040mm 351.00mil 2.9144mm 10.00mil 12.00mil "clearline"]
@@ -1655,6 +1656,10 @@ Layer(1 "top")
 	Line[623.00mil 719.00mil 488.00mil 719.00mil 10.00mil 12.00mil "clearline"]
 	Line[485.00mil 755.00mil 646.00mil 755.00mil 25.00mil 20.00mil "clearline"]
 	Line[646.00mil 755.00mil 755.00mil 646.00mil 25.00mil 20.00mil "clearline"]
+	Line[425.00mil 213.00mil 391.00mil 213.00mil 10.00mil 12.00mil "clearline"]
+	Line[391.00mil 213.00mil 390.00mil 214.00mil 10.00mil 12.00mil "clearline"]
+	Line[80.00mil 290.00mil 80.00mil 339.61mil 10.00mil 12.00mil "clearline"]
+	Line[80.00mil 339.61mil 79.31mil 8.6437mm 10.00mil 12.00mil "clearline"]
 )
 Layer(2 "bottom")
 (
@@ -1740,6 +1745,9 @@ Layer(2 "bottom")
 	Line[668.00mil 674.00mil 816.00mil 635.00mil 10.00mil 12.00mil "clearline"]
 	Line[249.00mil 754.00mil 530.00mil 719.00mil 10.00mil 12.00mil "clearline"]
 	Line[578.00mil 594.00mil 685.00mil 639.00mil 10.00mil 12.00mil "clearline"]
+	Line[390.00mil 214.00mil 268.00mil 214.00mil 10.00mil 12.00mil "clearline"]
+	Line[268.00mil 214.00mil 192.00mil 290.00mil 10.00mil 12.00mil "clearline"]
+	Line[192.00mil 290.00mil 80.00mil 290.00mil 10.00mil 12.00mil "clearline"]
 	Polygon("clearpoly,lock")
 	(
 		[10.00mil 10.00mil] [1490.00mil 10.00mil] [1490.00mil 790.00mil] [1301.00mil 790.00mil] [1301.00mil 764.00mil] 
@@ -2069,12 +2077,12 @@ NetList()
 		Connect("J2-2")
 		Connect("J3-2")
 		Connect("J3-3")
-		Connect("R12-2")
 	)
 	Net("v_ldo_in" "(unknown)")
 	(
 		Connect("C8-2")
 		Connect("D1-2")
+		Connect("R12-2")
 		Connect("R14-2")
 		Connect("U2-1")
 		Connect("U2-3")
diff --git a/easymetrum.sch b/easymetrum.sch
index d2bd7a3..a0355cc 100644
--- a/easymetrum.sch
+++ b/easymetrum.sch
@@ -796,7 +796,7 @@ value=27k
 N 28900 15300 28200 15300 4
 {
 T 28200 15350 5 10 1 1 0 0 1
-netname=v_bat
+netname=v_ldo_in
 }
 C 30900 15200 1 0 0 hole_plated.sym
 {