route complete, drc clean

[hw/easymega] / Makefile

# name of project, also used for PCB file
PROJECT=easymega

# list of schematic files that make up this design
SCHEMATICS=easymega.sch

# number of PCB layers
LAYERS=4

# sides with silkscreen, can be none|top|bottom|both
SILK=both

include ../altusmetrum/pcb.mk