working on the CC1120's footprint .. currently it's a 32-pin variation on

[hw/bdale] / sym / CC1120.sym

diff --git a/sym/CC1120.sym b/sym/CC1120.sym
new file mode 100644 (file)
index 0000000..2969559
--- /dev/null
+++ b/sym/CC1120.sym
@@ -0,0 +1,364 @@
+v 20110115 2
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+T 100 3100 5 10 1 1 0 0 1
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+pintype=io
+}
+P 0 2600 400 2600 1 0 0
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+}
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+}
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+pintype=pwr
+}
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+pintype=io
+}
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+}
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+}
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+}
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+}
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+}
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+pintype=pwr
+}
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+}
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+}
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+}
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+}
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+}
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+}
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+pinlabel=GPIO2
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+pintype=io
+}
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+pintype=pwr
+}
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+}
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+}
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+}
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+pintype=pwr
+}
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+{
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+pintype=pwr
+}
+B 400 0 2800 6500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 5400 1600 8 10 0 0 0 0 1
+description=TI CC1120 High Performance RF Transceiver
+T 400 6600 8 10 1 1 0 0 1
+refdes=U?
+T 5400 2500 8 10 0 0 0 0 1
+numslots=0
+T 2500 6600 9 10 1 0 0 0 1
+CC1120
+T 5400 2800 8 10 0 0 0 0 1
+slot=1
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+pintype=pwr
+}
+P 3600 4200 3200 4200 1 0 0
+{
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+pinlabel=AVDD_SYNTH2
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+pintype=pwr
+}
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+{
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+pinnumber=26
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+pinlabel=DCPL_PFD_CHP
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+pintype=pwr
+}
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+{
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+pintype=pwr
+}
+P 3600 6200 3200 6200 1 0 0
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+}
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+}
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+pintype=io
+}
+P 3600 5000 3200 5000 1 0 0
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+pinlabel=DCPL_XOSC
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+pintype=pwr
+}