From: Bdale Garbee <bdale@gag.com>
Date: Mon, 9 Dec 2013 23:58:15 +0000 (-0700)
Subject: add VCT6 support (chip_id 0x427) based on upstream patch by Burns
X-Git-Url: https://git.gag.com/?p=fw%2Fstlink;a=commitdiff_plain

add VCT6 support (chip_id 0x427) based on upstream patch by Burns
---

diff --git a/src/stlink-common.c b/src/stlink-common.c
index a73801b..29ca794 100644
--- a/src/stlink-common.c
+++ b/src/stlink-common.c
@@ -841,7 +841,7 @@ on_error:
     return error;
 }
 
-#define IS_STM32L(sl)	((sl)->chip_id == STM32_CHIPID_L1_MEDIUM || (sl)->chip_id == STM32_CHIPID_L1_HIGH)
+#define IS_STM32L(sl)	((sl)->chip_id == STM32_CHIPID_L1_MEDIUM || (sl)->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS || (sl)->chip_id == STM32_CHIPID_L1_HIGH)
 
 int stlink_fread(stlink_t* sl, const char* path, stm32_addr_t addr, size_t size) {
     /* read size bytes from addr to file */
diff --git a/src/stlink-common.h b/src/stlink-common.h
index 2d69935..3c8dbf4 100644
--- a/src/stlink-common.h
+++ b/src/stlink-common.h
@@ -100,6 +100,7 @@ extern "C" {
 #define STM32_CHIPID_F4 0x413
 #define STM32_CHIPID_F1_HIGH 0x414
 #define STM32_CHIPID_L1_MEDIUM 0x416
+#define STM32_CHIPID_L1_MEDIUM_PLUS 0x427
 #define STM32_CHIPID_L1_HIGH 0x436
 #define STM32_CHIPID_F1_CONN 0x418
 #define STM32_CHIPID_F1_VL_MEDIUM 0x420
@@ -205,6 +206,17 @@ extern "C" {
                     .bootrom_base = 0x1ffff000,
                     .bootrom_size = 0x800
         },
+        {
+          // This ignores the EEPROM! (and uses the page erase size,
+          // not the sector write protection...)
+            .chip_id = 0x427,
+                    .description = "L1 Med-density device plus",
+                    .flash_size_reg = 0x1ff800cc,
+                    .flash_pagesize = 0x100,
+                    .sram_size = 0x8000,
+                    .bootrom_base = 0x1ff00000,
+                    .bootrom_size = 0x1000
+        },
         {
             .chip_id = 0x428,
                     .description = "F1 High-density value line device",