X-Git-Url: https://git.gag.com/?p=fw%2Fstlink;a=blobdiff_plain;f=src%2Fstlink-common.c;h=937bf82963bf33ffb1cfa3d5e0de6230df899561;hp=214f6c5735bb4bfd742923cd27699718fad81e05;hb=379fcb3c614d540e2d854700d77c80268b207b3f;hpb=83a5eb2ed34ed78edacd92a69f366b89728ac5d0 diff --git a/src/stlink-common.c b/src/stlink-common.c index 214f6c5..937bf82 100644 --- a/src/stlink-common.c +++ b/src/stlink-common.c @@ -121,29 +121,27 @@ uint32_t read_uint32(const unsigned char *c, const int pt) { } static uint32_t __attribute__((unused)) read_flash_rdp(stlink_t *sl) { - stlink_read_mem32(sl, FLASH_WRPR, sizeof (uint32_t)); - return (*(uint32_t*) sl->q_buf) & 0xff; + return stlink_read_debug32(sl, FLASH_WRPR) & 0xff; } static inline uint32_t read_flash_wrpr(stlink_t *sl) { - stlink_read_mem32(sl, FLASH_WRPR, sizeof (uint32_t)); - return *(uint32_t*) sl->q_buf; + return stlink_read_debug32(sl, FLASH_WRPR); } static inline uint32_t read_flash_obr(stlink_t *sl) { - stlink_read_mem32(sl, FLASH_OBR, sizeof (uint32_t)); - return *(uint32_t*) sl->q_buf; + return stlink_read_debug32(sl, FLASH_OBR); } static inline uint32_t read_flash_cr(stlink_t *sl) { + uint32_t res; if(sl->chip_id==STM32F4_CHIP_ID) - stlink_read_mem32(sl, FLASH_F4_CR, sizeof (uint32_t)); + res = stlink_read_debug32(sl, FLASH_F4_CR); else - stlink_read_mem32(sl, FLASH_CR, sizeof (uint32_t)); + res = stlink_read_debug32(sl, FLASH_CR); #if DEBUG_FLASH - fprintf(stdout, "CR:0x%x\n", *(uint32_t*) sl->q_buf); + fprintf(stdout, "CR:0x%x\n", res); #endif - return *(uint32_t*) sl->q_buf; + return res; } static inline unsigned int is_flash_locked(stlink_t *sl) { @@ -161,16 +159,12 @@ static void unlock_flash(stlink_t *sl) { the FPEC block until next reset. */ if(sl->chip_id==STM32F4_CHIP_ID) { - write_uint32(sl->q_buf, FLASH_KEY1); - stlink_write_mem32(sl, FLASH_F4_KEYR, sizeof (uint32_t)); - write_uint32(sl->q_buf, FLASH_KEY2); - stlink_write_mem32(sl, FLASH_F4_KEYR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_F4_KEYR, FLASH_KEY1); + stlink_write_debug32(sl, FLASH_F4_KEYR, FLASH_KEY2); } else { - write_uint32(sl->q_buf, FLASH_KEY1); - stlink_write_mem32(sl, FLASH_KEYR, sizeof (uint32_t)); - write_uint32(sl->q_buf, FLASH_KEY2); - stlink_write_mem32(sl, FLASH_KEYR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_KEYR, FLASH_KEY1); + stlink_write_debug32(sl, FLASH_KEYR, FLASH_KEY2); } } @@ -192,14 +186,12 @@ static int unlock_flash_if(stlink_t *sl) { static void lock_flash(stlink_t *sl) { if(sl->chip_id==STM32F4_CHIP_ID) { const uint32_t n = read_flash_cr(sl) | (1 << FLASH_F4_CR_LOCK); - write_uint32(sl->q_buf, n); - stlink_write_mem32(sl, FLASH_F4_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_F4_CR, n); } else { /* write to 1 only. reset by hw at unlock sequence */ const uint32_t n = read_flash_cr(sl) | (1 << FLASH_CR_LOCK); - write_uint32(sl->q_buf, n); - stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_CR, n); } } @@ -208,47 +200,40 @@ static void set_flash_cr_pg(stlink_t *sl) { if(sl->chip_id==STM32F4_CHIP_ID) { uint32_t x = read_flash_cr(sl); x |= (1 << FLASH_CR_PG); - write_uint32(sl->q_buf, x); - stlink_write_mem32(sl, FLASH_F4_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_F4_CR, x); } else { const uint32_t n = 1 << FLASH_CR_PG; - write_uint32(sl->q_buf, n); - stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_CR, n); } } static void __attribute__((unused)) clear_flash_cr_pg(stlink_t *sl) { const uint32_t n = read_flash_cr(sl) & ~(1 << FLASH_CR_PG); - write_uint32(sl->q_buf, n); if(sl->chip_id==STM32F4_CHIP_ID) - stlink_write_mem32(sl, FLASH_F4_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_F4_CR, n); else - stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_CR, n); } static void set_flash_cr_per(stlink_t *sl) { const uint32_t n = 1 << FLASH_CR_PER; - write_uint32(sl->q_buf, n); - stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_CR, n); } static void __attribute__((unused)) clear_flash_cr_per(stlink_t *sl) { const uint32_t n = read_flash_cr(sl) & ~(1 << FLASH_CR_PER); - write_uint32(sl->q_buf, n); - stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_CR, n); } static void set_flash_cr_mer(stlink_t *sl) { const uint32_t n = 1 << FLASH_CR_MER; - write_uint32(sl->q_buf, n); - stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_CR, n); } static void __attribute__((unused)) clear_flash_cr_mer(stlink_t *sl) { const uint32_t n = read_flash_cr(sl) & ~(1 << FLASH_CR_MER); - write_uint32(sl->q_buf, n); - stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_CR, n); } static void set_flash_cr_strt(stlink_t *sl) { @@ -256,29 +241,27 @@ static void set_flash_cr_strt(stlink_t *sl) { { uint32_t x = read_flash_cr(sl); x |= (1 << FLASH_F4_CR_STRT); - write_uint32(sl->q_buf, x); - stlink_write_mem32(sl, FLASH_F4_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_F4_CR, x); } else { /* assume come on the flash_cr_per path */ const uint32_t n = (1 << FLASH_CR_PER) | (1 << FLASH_CR_STRT); - write_uint32(sl->q_buf, n); - stlink_write_mem32(sl, FLASH_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_CR, n); } } static inline uint32_t read_flash_acr(stlink_t *sl) { - stlink_read_mem32(sl, FLASH_ACR, sizeof (uint32_t)); - return *(uint32_t*) sl->q_buf; + return stlink_read_debug32(sl, FLASH_ACR); } static inline uint32_t read_flash_sr(stlink_t *sl) { + uint32_t res; if(sl->chip_id==STM32F4_CHIP_ID) - stlink_read_mem32(sl, FLASH_F4_SR, sizeof (uint32_t)); + res = stlink_read_debug32(sl, FLASH_F4_SR); else - stlink_read_mem32(sl, FLASH_SR, sizeof (uint32_t)); + res = stlink_read_debug32(sl, FLASH_SR); //fprintf(stdout, "SR:0x%x\n", *(uint32_t*) sl->q_buf); - return *(uint32_t*) sl->q_buf; + return res; } static inline unsigned int is_flash_busy(stlink_t *sl) { @@ -300,8 +283,7 @@ static inline unsigned int is_flash_eop(stlink_t *sl) { static void __attribute__((unused)) clear_flash_sr_eop(stlink_t *sl) { const uint32_t n = read_flash_sr(sl) & ~(1 << FLASH_SR_EOP); - write_uint32(sl->q_buf, n); - stlink_write_mem32(sl, FLASH_SR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_SR, n); } static void __attribute__((unused)) wait_flash_eop(stlink_t *sl) { @@ -311,8 +293,7 @@ static void __attribute__((unused)) wait_flash_eop(stlink_t *sl) { } static inline void write_flash_ar(stlink_t *sl, uint32_t n) { - write_uint32(sl->q_buf, n); - stlink_write_mem32(sl, FLASH_AR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_AR, n); } static inline void write_flash_cr_psiz(stlink_t *sl, uint32_t n) { @@ -322,8 +303,7 @@ static inline void write_flash_cr_psiz(stlink_t *sl, uint32_t n) { #if DEBUG_FLASH fprintf(stdout, "PSIZ:0x%x 0x%x\n", x, n); #endif - write_uint32(sl->q_buf, x); - stlink_write_mem32(sl, FLASH_F4_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_F4_CR, x); } @@ -335,8 +315,7 @@ static inline void write_flash_cr_snb(stlink_t *sl, uint32_t n) { #if DEBUG_FLASH fprintf(stdout, "SNB:0x%x 0x%x\n", x, n); #endif - write_uint32(sl->q_buf, x); - stlink_write_mem32(sl, FLASH_F4_CR, sizeof (uint32_t)); + stlink_write_debug32(sl, FLASH_F4_CR, x); } #if 0 /* todo */ @@ -359,6 +338,7 @@ void stlink_close(stlink_t *sl) { void stlink_exit_debug_mode(stlink_t *sl) { DLOG("*** stlink_exit_debug_mode ***\n"); + stlink_write_debug32(sl, DHCSR, DBGKEY); sl->backend->exit_debug_mode(sl); } @@ -388,9 +368,7 @@ uint32_t stlink_core_id(stlink_t *sl) { } uint32_t stlink_chip_id(stlink_t *sl) { - stlink_read_mem32(sl, 0xE0042000, 4); - uint32_t chip_id = sl->q_buf[0] | (sl->q_buf[1] << 8) | (sl->q_buf[2] << 16) | - (sl->q_buf[3] << 24); + uint32_t chip_id = stlink_read_debug32(sl, 0xE0042000); return chip_id; } @@ -400,8 +378,7 @@ uint32_t stlink_chip_id(stlink_t *sl) { * @param cpuid pointer to the result object */ void stlink_cpu_id(stlink_t *sl, cortex_m3_cpuid_t *cpuid) { - stlink_read_mem32(sl, CM3_REG_CPUID, 4); - uint32_t raw = read_uint32(sl->q_buf, 0); + uint32_t raw = stlink_read_debug32(sl, CM3_REG_CPUID); cpuid->implementer_id = (raw >> 24) & 0x7f; cpuid->variant = (raw >> 20) & 0xf; cpuid->part = (raw >> 4) & 0xfff; @@ -448,8 +425,7 @@ int stlink_load_device_params(stlink_t *sl) { } else if ((chip_id & 0xFFF) == STM32_CHIPID_F4) { sl->flash_size = 0x100000; //todo: RM0090 error; size register same address as unique ID } else { - stlink_read_mem32(sl, params->flash_size_reg, 4); - uint32_t flash_size = sl->q_buf[0] | (sl->q_buf[1] << 8); + uint32_t flash_size = stlink_read_debug32(sl, params->flash_size_reg) & 0xffff; sl->flash_size = flash_size * 1024; } sl->flash_pgsz = params->flash_pagesize; @@ -457,7 +433,7 @@ int stlink_load_device_params(stlink_t *sl) { sl->sys_base = params->bootrom_base; sl->sys_size = params->bootrom_size; - ILOG("Device connected is: %s\n", params->description); + ILOG("Device connected is: %s, id %#x\n", params->description, chip_id); // TODO make note of variable page size here..... ILOG("SRAM size: %#x bytes (%d KiB), Flash: %#x bytes (%d KiB) in pages of %zd bytes\n", sl->sram_size, sl->sram_size / 1024, sl->flash_size, sl->flash_size / 1024, @@ -470,6 +446,11 @@ void stlink_reset(stlink_t *sl) { sl->backend->reset(sl); } +void stlink_jtag_reset(stlink_t *sl, int value) { + DLOG("*** stlink_jtag_reset ***\n"); + sl->backend->jtag_reset(sl, value); +} + void stlink_run(stlink_t *sl) { DLOG("*** stlink_run ***\n"); sl->backend->run(sl); @@ -524,6 +505,17 @@ void stlink_version(stlink_t *sl) { } } +uint32_t stlink_read_debug32(stlink_t *sl, uint32_t addr) { + uint32_t data = sl->backend->read_debug32(sl, addr); + DLOG("*** stlink_read_debug32 %x is %#x\n", data, addr); + return data; +} + +void stlink_write_debug32(stlink_t *sl, uint32_t addr, uint32_t data) { + DLOG("*** stlink_write_debug32 %x to %#x\n", data, addr); + sl->backend->write_debug32(sl, addr, data); +} + void stlink_write_mem32(stlink_t *sl, uint32_t addr, uint16_t len) { DLOG("*** stlink_write_mem32 %u bytes to %#x\n", len, addr); if (len % 4 != 0) { @@ -811,6 +803,7 @@ int stlink_fread(stlink_t* sl, const char* path, stm32_addr_t addr, size_t size) int error = -1; size_t off; + int num_zero = 0; const int fd = open(path, O_RDWR | O_TRUNC | O_CREAT, 00700); if (fd == -1) { @@ -822,6 +815,7 @@ int stlink_fread(stlink_t* sl, const char* path, stm32_addr_t addr, size_t size) for (off = 0; off < size; off += 1024) { size_t read_size = 1024; size_t rounded_size; + size_t index; if ((off + read_size) > size) read_size = size - off; @@ -832,12 +826,21 @@ int stlink_fread(stlink_t* sl, const char* path, stm32_addr_t addr, size_t size) stlink_read_mem32(sl, addr + off, rounded_size); + for(index = 0; index < read_size; index ++) { + if (sl->q_buf[index] == 0) + num_zero ++; + else + num_zero = 0; + } if (write(fd, sl->q_buf, read_size) != (ssize_t) read_size) { fprintf(stderr, "write() != read_size\n"); goto on_error; } } + /* Ignore NULL Bytes at end of file */ + ftruncate(fd, size - num_zero); + /* success */ error = 0; @@ -918,14 +921,11 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr) uint32_t val; /* disable pecr protection */ - write_uint32(sl->q_buf, 0x89abcdef); - stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t)); - write_uint32(sl->q_buf, 0x02030405); - stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t)); + stlink_write_debug32(sl, STM32L_FLASH_PEKEYR, 0x89abcdef); + stlink_write_debug32(sl, STM32L_FLASH_PEKEYR, 0x02030405); /* check pecr.pelock is cleared */ - stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); - val = read_uint32(sl->q_buf, 0); + val = stlink_read_debug32(sl, STM32L_FLASH_PECR); if (val & (1 << 0)) { WLOG("pecr.pelock not clear (%#x)\n", val); @@ -933,14 +933,11 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr) } /* unlock program memory */ - write_uint32(sl->q_buf, 0x8c9daebf); - stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t)); - write_uint32(sl->q_buf, 0x13141516); - stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t)); + stlink_write_debug32(sl, STM32L_FLASH_PRGKEYR, 0x8c9daebf); + stlink_write_debug32(sl, STM32L_FLASH_PRGKEYR, 0x13141516); /* check pecr.prglock is cleared */ - stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); - val = read_uint32(sl->q_buf, 0); + val = stlink_read_debug32(sl, STM32L_FLASH_PECR); if (val & (1 << 1)) { WLOG("pecr.prglock not clear (%#x)\n", val); @@ -949,14 +946,11 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr) /* unused: unlock the option byte block */ #if 0 - write_uint32(sl->q_buf, 0xfbead9c8); - stlink_write_mem32(sl, STM32L_FLASH_OPTKEYR, sizeof(uint32_t)); - write_uint32(sl->q_buf, 0x24252627); - stlink_write_mem32(sl, STM32L_FLASH_OPTKEYR, sizeof(uint32_t)); + stlink_write_debug32(sl, STM32L_FLASH_OPTKEYR, 0xfbead9c8); + stlink_write_debug32(sl, STM32L_FLASH_OPTKEYR, 0x24252627); /* check pecr.optlock is cleared */ - stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); - val = read_uint32(sl->q_buf, 0); + val = stlink_read_debug32(sl, STM32L_FLASH_PECR); if (val & (1 << 2)) { fprintf(stderr, "pecr.prglock not clear\n"); @@ -966,25 +960,37 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr) /* set pecr.{erase,prog} */ val |= (1 << 9) | (1 << 3); - write_uint32(sl->q_buf, val); - stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); + stlink_write_debug32(sl, STM32L_FLASH_PECR, val); + +#if 0 /* fix_to_be_confirmed */ - /* wait for sr.busy to be cleared */ - while (1) + /* wait for sr.busy to be cleared + MP: Test shows that busy bit is not set here. Perhaps, PM0062 is + wrong and we do not need to wait here for clearing the busy bit. + TEXANE: ok, if experience says so and it works for you, we comment + it. If someone has a problem, please drop an email. + */ + while ((stlink_read_debug32(sl, STM32L_FLASH_SR) & (1 << 0)) != 0) { - stlink_read_mem32(sl, STM32L_FLASH_SR, sizeof(uint32_t)); - if ((read_uint32(sl->q_buf, 0) & (1 << 0)) == 0) break ; } +#endif /* fix_to_be_confirmed */ + /* write 0 to the first word of the page to be erased */ - memset(sl->q_buf, 0, sizeof(uint32_t)); - stlink_write_mem32(sl, flashaddr, sizeof(uint32_t)); + stlink_write_debug32(sl, flashaddr, 0); + + /* MP: It is better to wait for clearing the busy bit after issuing + page erase command, even though PM0062 recommends to wait before it. + Test shows that a few iterations is performed in the following loop + before busy bit is cleared.*/ + while ((stlink_read_debug32(sl, STM32L_FLASH_SR) & (1 << 0)) != 0) + { + } /* reset lock bits */ - stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); - val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2); - write_uint32(sl->q_buf, val); - stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); + val = stlink_read_debug32(sl, STM32L_FLASH_PECR) + | (1 << 0) | (1 << 1) | (1 << 2); + stlink_write_debug32(sl, STM32L_FLASH_PECR, val); } else if (sl->core_id == STM32VL_CORE_ID) { @@ -1148,6 +1154,45 @@ int stlink_fcheck_flash(stlink_t *sl, const char* path, stm32_addr_t addr) { return res; } +/** + * Verify addr..addr+len is binary identical to base...base+len + * @param sl stlink context + * @param address stm device address + * @param data host side buffer to check against + * @param length how much + * @return 0 for success, -ve for failure + */ +int stlink_verify_write_flash(stlink_t *sl, stm32_addr_t address, uint8_t *data, unsigned length) { + size_t off; + if ((sl->chip_id & 0xFFF) == STM32_CHIPID_F4) { + DLOG("(FIXME)Skipping verification for F4, not enough ram (yet)\n"); + return 0; + } + ILOG("Starting verification of write complete\n"); + for (off = 0; off < length; off += sl->flash_pgsz) { + size_t aligned_size; + + /* adjust last page size */ + size_t cmp_size = sl->flash_pgsz; + if ((off + sl->flash_pgsz) > length) + cmp_size = length - off; + + aligned_size = cmp_size; + if (aligned_size & (4 - 1)) + aligned_size = (cmp_size + 4) & ~(4 - 1); + + stlink_read_mem32(sl, address + off, aligned_size); + + if (memcmp(sl->q_buf, data + off, cmp_size)) { + WLOG("Verification of flash failed at offset: %zd\n", off); + return -1; + } + } + ILOG("Flash written and verified! jolly good!\n"); + return 0; + +} + int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned len) { size_t off; flash_loader_t fl; @@ -1202,6 +1247,7 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned #define PROGRESS_CHUNK_SIZE 0x1000 /* write a word in program memory */ for (off = 0; off < len; off += sizeof(uint32_t)) { + uint32_t data; if (sl->verbose >= 1) { if ((off & (PROGRESS_CHUNK_SIZE - 1)) == 0) { /* show progress. writing procedure is slow @@ -1212,8 +1258,8 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned } } - memcpy(sl->q_buf, (const void*)(base + off), sizeof(uint32_t)); - stlink_write_mem32(sl, addr + off, sizeof(uint32_t)); + write_uint32((unsigned char*) &data, *(uint32_t*) (base + off)); + stlink_write_debug32(sl, addr + off, data); /* wait for sr.busy to be cleared */ wait_flash_busy(sl); @@ -1232,7 +1278,6 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned else if (sl->core_id == STM32L_CORE_ID) { /* use fast word write. todo: half page. */ - uint32_t val; #if 0 /* todo: check write operation */ @@ -1244,28 +1289,22 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned #endif /* todo: check write operation */ /* disable pecr protection */ - write_uint32(sl->q_buf, 0x89abcdef); - stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t)); - write_uint32(sl->q_buf, 0x02030405); - stlink_write_mem32(sl, STM32L_FLASH_PEKEYR, sizeof(uint32_t)); + stlink_write_debug32(sl, STM32L_FLASH_PEKEYR, 0x89abcdef); + stlink_write_debug32(sl, STM32L_FLASH_PEKEYR, 0x02030405); /* check pecr.pelock is cleared */ - stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); - val = read_uint32(sl->q_buf, 0); + val = stlink_read_debug32(sl, STM32L_FLASH_PECR); if (val & (1 << 0)) { fprintf(stderr, "pecr.pelock not clear\n"); return -1; } /* unlock program memory */ - write_uint32(sl->q_buf, 0x8c9daebf); - stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t)); - write_uint32(sl->q_buf, 0x13141516); - stlink_write_mem32(sl, STM32L_FLASH_PRGKEYR, sizeof(uint32_t)); + stlink_write_debug32(sl, STM32L_FLASH_PRGKEYR, 0x8c9daebf); + stlink_write_debug32(sl, STM32L_FLASH_PRGKEYR, 0x13141516); /* check pecr.prglock is cleared */ - stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); - val = read_uint32(sl->q_buf, 0); + val = stlink_read_debug32(sl, STM32L_FLASH_PECR); if (val & (1 << 1)) { fprintf(stderr, "pecr.prglock not clear\n"); return -1; @@ -1273,6 +1312,7 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned /* write a word in program memory */ for (off = 0; off < len; off += sizeof(uint32_t)) { + uint32_t data; if (sl->verbose >= 1) { if ((off & (sl->flash_pgsz - 1)) == 0) { /* show progress. writing procedure is slow @@ -1283,20 +1323,18 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned } } - memcpy(sl->q_buf, (const void*)(base + off), sizeof(uint32_t)); - stlink_write_mem32(sl, addr + off, sizeof(uint32_t)); + write_uint32((unsigned char*) &data, *(uint32_t*) (base + off)); + stlink_write_debug32(sl, addr + off, data); /* wait for sr.busy to be cleared */ - while (1) { - stlink_read_mem32(sl, STM32L_FLASH_SR, sizeof(uint32_t)); - if ((read_uint32(sl->q_buf, 0) & (1 << 0)) == 0) break ; + while ((stlink_read_debug32(sl, STM32L_FLASH_SR) & (1 << 0)) != 0) { } #if 0 /* todo: check redo write operation */ /* check written bytes. todo: should be on a per page basis. */ - stlink_read_mem32(sl, addr + off, sizeof(uint32_t)); - if (memcmp(sl->q_buf, base + off, sizeof(uint32_t))) { + data = stlink_read_debug32(sl, addr + off); + if (data == *(uint32_t*)(base + off)) { /* re erase the page and redo the write operation */ uint32_t page; uint32_t val; @@ -1317,10 +1355,9 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned page, addr + off, read_uint32(base + off, 0), read_uint32(sl->q_buf, 0)); /* reset lock bits */ - stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); - val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2); - write_uint32(sl->q_buf, val); - stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); + val = stlink_read_debug32(sl, STM32L_FLASH_PECR) + | (1 << 0) | (1 << 1) | (1 << 2); + stlink_write_debug32(sl, STM32L_FLASH_PECR, val); stlink_erase_flash_page(sl, page); @@ -1333,10 +1370,9 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned #endif /* todo: check redo write operation */ } /* reset lock bits */ - stlink_read_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); - val = read_uint32(sl->q_buf, 0) | (1 << 0) | (1 << 1) | (1 << 2); - write_uint32(sl->q_buf, val); - stlink_write_mem32(sl, STM32L_FLASH_PECR, sizeof(uint32_t)); + val = stlink_read_debug32(sl, STM32L_FLASH_PECR) + | (1 << 0) | (1 << 1) | (1 << 2); + stlink_write_debug32(sl, STM32L_FLASH_PECR, val); } else if (sl->core_id == STM32VL_CORE_ID) { ILOG("Starting Flash write for VL core id\n"); /* flash loader initialization */ @@ -1370,28 +1406,8 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned WLOG("unknown coreid, not sure how to write: %x\n", sl->core_id); return -1; } - - ILOG("Starting verification of write complete\n"); - for (off = 0; off < len; off += sl->flash_pgsz) { - size_t aligned_size; - - /* adjust last page size */ - size_t cmp_size = sl->flash_pgsz; - if ((off + sl->flash_pgsz) > len) - cmp_size = len - off; - - aligned_size = cmp_size; - if (aligned_size & (4 - 1)) - aligned_size = (cmp_size + 4) & ~(4 - 1); - - fprintf(stdout, "AlignedSize:%#zx\n", aligned_size); - stlink_read_mem32(sl, addr + off, aligned_size); - - if (memcmp(sl->q_buf, base + off, cmp_size)) - return -1; - } - ILOG("Flash written and verified! jolly good!\n"); - return 0; + + return stlink_verify_write_flash(sl, addr, base, len); } /** @@ -1404,11 +1420,22 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr) { /* write the file in flash at addr */ int err; + unsigned int num_zero = 0, index; mapped_file_t mf = MAPPED_FILE_INITIALIZER; if (map_file(&mf, path) == -1) { WLOG("map_file() == -1\n"); return -1; } + for(index = 0; index < mf.len; index ++) { + if (mf.base[index] == 0) + num_zero ++; + else + num_zero = 0; + } + if(num_zero != 0) { + ILOG("Ignoring %d bytes of Zeros at end of file\n",num_zero); + mf.len -= num_zero; + } err = stlink_write_flash(sl, addr, mf.base, mf.len); unmap_file(&mf); return err;