#include <stdio.h>
#include <stdlib.h>
-#include <scsi/sg_lib.h>
-#include <scsi/sg_pt.h>
+#include <string.h>
#include "stlink-common.h"
+#include "uglylogging.h"
+
+#define LOG_TAG __FILE__
+#define DLOG(format, args...) ugly_log(UDEBUG, LOG_TAG, format, ## args)
+#define ILOG(format, args...) ugly_log(UINFO, LOG_TAG, format, ## args)
+#define WLOG(format, args...) ugly_log(UWARN, LOG_TAG, format, ## args)
+#define fatal(format, args...) ugly_log(UFATAL, LOG_TAG, format, ## args)
+
+static void __attribute__((unused)) mark_buf(stlink_t *sl) {
+ memset(sl->q_buf, 0, sizeof(sl->q_buf));
+ sl->q_buf[0] = 0xaa;
+ sl->q_buf[1] = 0xbb;
+ sl->q_buf[2] = 0xcc;
+ sl->q_buf[3] = 0xdd;
+ sl->q_buf[4] = 0x11;
+ sl->q_buf[15] = 0x22;
+ sl->q_buf[16] = 0x33;
+ sl->q_buf[63] = 0x44;
+ sl->q_buf[64] = 0x69;
+ sl->q_buf[1024 * 6 - 1] = 0x42; //6kB
+ sl->q_buf[1024 * 8 - 1] = 0x42; //8kB
+}
+
int main(int argc, char *argv[]) {
// set scpi lib debug level: 0 for no debug info, 10 for lots
- const int scsi_verbose = 2;
- char *dev_name;
switch (argc) {
case 1:
fputs(
- "\nUsage: stlink-access-test /dev/sg0, sg1, ...\n"
+ "\nUsage: stlink-access-test [anything at all] ...\n"
"\n*** Notice: The stlink firmware violates the USB standard.\n"
- "*** If you plug-in the discovery's stlink, wait a several\n"
- "*** minutes to let the kernel driver swallow the broken device.\n"
- "*** Watch:\ntail -f /var/log/messages\n"
- "*** This command sequence can shorten the waiting time and fix some issues.\n"
+ "*** Because we just use libusb, we can just tell the kernel's\n"
+ "*** driver to simply ignore the device...\n"
"*** Unplug the stlink and execute once as root:\n"
- "modprobe -r usb-storage && modprobe usb-storage quirks=483:3744:lrwsro\n\n",
+ "modprobe -r usb-storage && modprobe usb-storage quirks=483:3744:i\n\n",
stderr);
return EXIT_FAILURE;
- case 2:
- dev_name = argv[1];
- break;
default:
- return EXIT_FAILURE;
+ break;
}
- fputs("*** stlink access test ***\n", stderr);
- fprintf(stderr, "Using sg_lib %s : scsi_pt %s\n", sg_lib_version(),
- scsi_pt_version());
-
- stlink_t *sl = stlink_quirk_open(dev_name, scsi_verbose);
+ stlink_t *sl = stlink_v1_open(99);
if (sl == NULL)
return EXIT_FAILURE;
-
+
// we are in mass mode, go to swd
stlink_enter_swd_mode(sl);
stlink_current_mode(sl);
//stlink_force_debug(sl);
stlink_reset(sl);
stlink_status(sl);
-#if 0
// core system control block
stlink_read_mem32(sl, 0xe000ed00, 4);
- DD(sl, "cpu id base register: SCB_CPUID = got 0x%08x expect 0x411fc231", read_uint32(sl->q_buf, 0));
+ DLOG("cpu id base register: SCB_CPUID = got 0x%08x expect 0x411fc231\n", read_uint32(sl->q_buf, 0));
// no MPU
stlink_read_mem32(sl, 0xe000ed90, 4);
- DD(sl, "mpu type register: MPU_TYPER = got 0x%08x expect 0x0", read_uint32(sl->q_buf, 0));
+ DLOG("mpu type register: MPU_TYPER = got 0x%08x expect 0x0\n", read_uint32(sl->q_buf, 0));
+#if 0
stlink_read_mem32(sl, 0xe000edf0, 4);
DD(sl, "DHCSR = 0x%08x", read_uint32(sl->q_buf, 0));
#define LED_GREEN (1<<9) // pin 9
stlink_read_mem32(sl, GPIOC_CRH, 4);
uint32_t io_conf = read_uint32(sl->q_buf, 0);
- DD(sl, "GPIOC_CRH = 0x%08x", io_conf);
+ DLOG("GPIOC_CRH = 0x%08x\n", io_conf);
// set: general purpose output push-pull, output mode, max speed 10 MHz.
write_uint32(sl->q_buf, 0x44444411);
stlink_write_mem32(sl, GPIOC_CRH, 4);
- clear_buf(sl);
+ memset(sl->q_buf, 0, sizeof(sl->q_buf));
for (int i = 0; i < 100; i++) {
write_uint32(sl->q_buf, LED_BLUE | LED_GREEN);
stlink_write_mem32(sl, GPIOC_ODR, 4);
/* stlink_read_mem32(sl, 0x4001100c, 4); */
/* DD(sl, "GPIOC_ODR = 0x%08x", read_uint32(sl->q_buf, 0)); */
- delay(100);
+ usleep(100 * 1000);
- clear_buf(sl);
+ memset(sl->q_buf, 0, sizeof(sl->q_buf));
stlink_write_mem32(sl, GPIOC_ODR, 4); // PC lo
- delay(100);
+ usleep(100 * 1000);
}
write_uint32(sl->q_buf, io_conf); // set old state
#if 0
// sram 0x20000000 8kB
fputs("\n++++++++++ read/write 8bit, sram at 0x2000 0000 ++++++++++++++++\n\n", stderr);
- clear_buf(sl);
- stlink_write_mem8(sl, 0x20000000, 16);
+ memset(sl->q_buf, 0, sizeof(sl->q_buf));
+ mark_buf(sl);
+ //stlink_write_mem8(sl, 0x20000000, 16);
- mark_buf(sl);
- stlink_write_mem8(sl, 0x20000000, 1);
- stlink_write_mem8(sl, 0x20000001, 1);
+ //stlink_write_mem8(sl, 0x20000000, 1);
+ //stlink_write_mem8(sl, 0x20000001, 1);
stlink_write_mem8(sl, 0x2000000b, 3);
stlink_read_mem32(sl, 0x20000000, 16);
#endif
#if 0
// a not aligned mem32 access doesn't work indeed
fputs("\n++++++++++ read/write 32bit, sram at 0x2000 0000 ++++++++++++++++\n\n", stderr);
- clear_buf(sl);
- stlink_write_mem8(sl, 0x20000000, 32);
-
+ memset(sl->q_buf, 0, sizeof(sl->q_buf));
mark_buf(sl);
stlink_write_mem32(sl, 0x20000000, 1);
stlink_read_mem32(sl, 0x20000000, 16);
#if 0
// sram 0x20000000 8kB
fputs("++++++++++ read/write 32bit, sram at 0x2000 0000 ++++++++++++\n", stderr);
+ memset(sl->q_buf, 0, sizeof(sl->q_buf));
mark_buf(sl);
stlink_write_mem8(sl, 0x20000000, 64);
stlink_read_mem32(sl, 0x20000000, 64);
stlink_read_mem32(sl, 0x20000000, 1024 * 6);
stlink_read_mem32(sl, 0x20000000 + 1024 * 6, 1024 * 2);
#endif
-#if 0
- stlink_read_all_regs(sl);
+#if 1
+ reg regs;
+ stlink_read_all_regs(sl, ®s);
stlink_step(sl);
fputs("++++++++++ write r0 = 0x12345678\n", stderr);
stlink_write_reg(sl, 0x12345678, 0);
- stlink_read_reg(sl, 0);
- stlink_read_all_regs(sl);
+ stlink_read_reg(sl, 0, ®s);
+ stlink_read_all_regs(sl, ®s);
#endif
#if 0
stlink_run(sl);
stlink_force_debug(sl);
stlink_status(sl);
#endif
-#if 1 /* read the system bootloader */
+#if 0 /* read the system bootloader */
fputs("\n++++++++++ reading bootloader ++++++++++++++++\n\n", stderr);
stlink_fread(sl, "/tmp/barfoo", sl->sys_base, sl->sys_size);
#endif
stlink_run_at(sl, sl->sram_base);
#endif
+#if 0
stlink_run(sl);
stlink_status(sl);
//----------------------------------------------------------------------
stlink_exit_debug_mode(sl);
stlink_current_mode(sl);
stlink_close(sl);
+#endif
//fflush(stderr); fflush(stdout);
return EXIT_SUCCESS;
-}
\ No newline at end of file
+}
projects / fw / stlink / blobdiff