* sim/ucsim/configure.in,

[fw/sdcc] / support / regression / tests / onebyte.c

diff --git a/support/regression/tests/onebyte.c b/support/regression/tests/onebyte.c
index a5fb515d3ffbebab1ae160bc0e1349476b2eb328..1dffcc0feadff7739eb2cfd6106fedc6f3d30824 100644 (file)
--- a/support/regression/tests/onebyte.c
+++ b/support/regression/tests/onebyte.c
@@ -121,3 +121,51 @@ testMod(void)
    r16 = 0;
    cL = -128; ucR =    5; r16 =  cL % ucR; ASSERT(r16 == -3);
 }
+
+void
+testOr(void)
+{
+  {attrL}           char  cL;
+  {attrL}  unsigned char ucL;
+  {attrR}           char  cR;
+  {attrR}  unsigned char ucR;
+  volatile         short r16, r16b;
+
+   cL = 0x00;  cR = 0x80; r16 =  cL |  cR; r16b =  cR |  cL; ASSERT(r16 == (short) 0xff80); ASSERT(r16b == (short) 0xff80);
+  ucL = 0x80;  cR = 0x00; r16 = ucL |  cR; r16b =  cR | ucL; ASSERT(r16 ==           0x80); ASSERT(r16b ==           0x80);
+  ucL = 0x80; ucR = 0x80; r16 = ucL | ucR; r16b = ucR | ucL; ASSERT(r16 ==           0x80); ASSERT(r16b ==           0x80);
+}
+
+void
+testXor(void)
+{
+  {attrL}           char  cL;
+  {attrL}  unsigned char ucL;
+  {attrR}           char  cR;
+  {attrR}  unsigned char ucR;
+  volatile         short r16, r16b;
+
+   cL = 0x80;  cR = 0x80; r16 =  cL ^  cR; r16b =  cR ^  cL; ASSERT(r16 ==              0); ASSERT(r16b ==              0);
+   cL = 0x80;  cR = 0x00; r16 =  cL ^  cR; r16b =  cR ^  cL; ASSERT(r16 == (short) 0xff80); ASSERT(r16b == (short) 0xff80);
+
+  ucL = 0x80;  cR = 0x80; r16 = ucL ^  cR; r16b =  cR ^ ucL; ASSERT(r16 == (short) 0xff00); ASSERT(r16b == (short) 0xff00);
+  ucL = 0x80;  cR =    0; r16 = ucL ^  cR; r16b =  cR ^ ucL; ASSERT(r16 ==           0x80); ASSERT(r16b ==           0x80);
+  ucL =    0;  cR = 0x80; r16 = ucL ^  cR; r16b =  cR ^ ucL; ASSERT(r16 == (short) 0xff80); ASSERT(r16b == (short) 0xff80);
+
+  ucL = 0x80; ucR = 0x80; r16 = ucL ^ ucR; r16b = ucR ^ ucL; ASSERT(r16 ==      0); ASSERT(r16b ==      0);
+  ucL =    0; ucR = 0x80; r16 = ucL ^ ucR; r16b = ucR ^ ucL; ASSERT(r16 ==   0x80); ASSERT(r16b ==   0x80);
+}
+
+void
+testAnd(void)
+{
+  {attrL}           char  cL;
+  {attrL}  unsigned char ucL;
+  {attrR}           char  cR;
+  {attrR}  unsigned char ucR;
+  volatile         short r16, r16b;
+
+   cL = 0x80;  cR = 0x80; r16 =  cL &  cR; r16b =  cR &  cL; ASSERT(r16 == (short) 0xff80); ASSERT(r16b == (short) 0xff80);
+  ucL = 0x80;  cR = 0x80; r16 = ucL &  cR; r16b =  cR & ucL; ASSERT(r16 ==           0x80); ASSERT(r16b ==           0x80);
+  ucL = 0x80; ucR = 0x80; r16 = ucL & ucR; r16b = ucR & ucL; ASSERT(r16 ==           0x80); ASSERT(r16b ==           0x80);
+}