* Making an 8051r CPU object
*/
-t_uc51r::t_uc51r(int Itype, int Itech, class cl_sim *asim):
- t_uc52(Itype, Itech, asim)
+cl_uc51r::cl_uc51r(int Itype, int Itech, class cl_sim *asim):
+ cl_uc52(Itype, Itech, asim)
{
- int i;
-
+ /* int i;
for (i= 0; i < ERAM_SIZE; i++)
- ERAM[i]= 0;
+ ERAM[i]= 0;*/
clock_out= 0;
}
void
-t_uc51r::mk_hw_elements(void)
+cl_uc51r::mk_hw_elements(void)
{
class cl_hw *h;
- t_uc52::mk_hw_elements();
+ cl_uc52::mk_hw_elements();
hws->add(h= new cl_wdt(this, 0x3fff));
h->init();
+ hws->add(h= new cl_uc51r_dummy_hw(this));
+ h->init();
}
-/*
- * Resetting of the microcontroller
- *
- * Original method is extended with handling of WDT.
- */
-
void
-t_uc51r::reset(void)
+cl_uc51r::make_memories(void)
{
- t_uc52::reset();
- sfr->set(SADDR, 0);
- sfr->set(SADEN, 0);
+ class cl_address_space *as;
+
+ rom= as= new cl_address_space("rom", 0, 0x10000, 8);
+ as->init();
+ address_spaces->add(as);
+ iram= as= new cl_address_space("iram", 0, 0x100, 8);
+ as->init();
+ address_spaces->add(as);
+ sfr= as= new cl_address_space("sfr", 0x80, 0x80, 8);
+ as->init();
+ address_spaces->add(as);
+ xram= as= new cl_address_space("xram", 0, 0x10000, 8);
+ as->init();
+ address_spaces->add(as);
+
+ class cl_address_decoder *ad;
+ class cl_memory_chip *chip;
+
+ chip= new cl_memory_chip("rom_chip", 0x10000, 8);
+ chip->init();
+ memchips->add(chip);
+ ad= new cl_address_decoder(as= address_space("rom"), chip, 0, 0xffff, 0);
+ ad->init();
+ as->decoders->add(ad);
+ ad->activate(0);
+
+ chip= new cl_memory_chip("iram_chip", 0x100, 8);
+ chip->init();
+ memchips->add(chip);
+ ad= new cl_address_decoder(as= address_space("iram"), chip, 0, 0xff, 0);
+ ad->init();
+ as->decoders->add(ad);
+ ad->activate(0);
+
+ chip= new cl_memory_chip("xram_chip", 0x10000, 8);
+ chip->init();
+ memchips->add(chip);
+ ad= new cl_address_decoder(as= address_space("xram"), chip, 0, 0xffff, 0);
+ ad->init();
+ as->decoders->add(ad);
+ ad->activate(0);
+ chip= new cl_memory_chip("eram_chip", 0x100, 8);
+ chip->init();
+ memchips->add(chip);
+
+ chip= new cl_memory_chip("sfr_chip", 0x80, 8);
+ chip->init();
+ memchips->add(chip);
+ ad= new cl_address_decoder(as= address_space("sfr"), chip, 0x80, 0xff, 0);
+ ad->init();
+ as->decoders->add(ad);
+ ad->activate(0);
+
+ acc= sfr->get_cell(ACC);
+ psw= sfr->get_cell(PSW);
}
/*
- * Copying ERAM to XRAM and vice versa
+ * Resetting of the microcontroller
*
- * This two methods are used by command interpreter to make ERAM and
- * beginning of XRAM to be equivalent.
+ * Original method is extended with handling of WDT.
*/
void
-t_uc51r::eram2xram(void)
+cl_uc51r::reset(void)
{
- int i;
-
- for (i= 0; i < ERAM_SIZE; i++)
- set_mem(MEM_XRAM, i, ERAM[i]);
+ cl_uc52::reset();
+ sfr->write(SADDR, 0);
+ sfr->write(SADEN, 0);
+ sfr->write(AUXR, 0);
}
void
-t_uc51r::xram2eram(void)
+cl_uc51r::clear_sfr(void)
{
- int i;
-
- for (i= 0; i < ERAM_SIZE; i++)
- ERAM[i]= get_mem(MEM_XRAM, i);
+ cl_uc52::clear_sfr();
+ sfr->write(SADDR, 0);
+ sfr->write(SADEN, 0);
+ sfr->write(AUXR, 0);
+ sfr->write(IPH, 0);
}
void
-t_uc51r::received(int c)
+cl_uc51r::received(int c)
{
t_mem br= sfr->get(SADDR) | sfr->get(SADEN);
int scon= sfr->get(SCON);
/*
- * 0xe0 1 24 MOVX A,@DPTR
- *____________________________________________________________________________
- *
*/
-int
-t_uc51r::inst_movx_a_Sdptr(uchar code)
-{
- if ((sfr->get(AUXR) & bmEXTRAM) ||
- sfr->get(DPH))
- acc->write(read_mem(MEM_XRAM,
- sfr->read(DPH)*256+
- sfr->read(DPL)));
- else
- acc->write(ERAM[sfr->read(DPL)]);
- tick(1);
- return(resGO);
-}
-
-
-/*
- * 0xe2-0xe3 1 24 MOVX A,@Ri
- *____________________________________________________________________________
- *
- */
+cl_uc51r_dummy_hw::cl_uc51r_dummy_hw(class cl_uc *auc):
+ cl_hw(auc, HW_DUMMY, 0, "_51r_dummy")
+{}
int
-t_uc51r::inst_movx_a_Sri(uchar code)
+cl_uc51r_dummy_hw::init(void)
{
- class cl_cell *cell;
- t_mem d= 0;
-
- cell= iram->get_cell(get_reg(code & 0x01)->read());
- d= cell->read();
- if (sfr->get(AUXR) & bmEXTRAM)
- acc->write(read_mem(MEM_XRAM, sfr->read(P2)*256+d));
- else
- acc->write(ERAM[d]);
- tick(1);
- return(resGO);
+ class cl_address_space *sfr= uc->address_space(MEM_SFR_ID);
+ if (!sfr)
+ {
+ fprintf(stderr, "No SFR to register %s[%d] into\n", id_string, id);
+ }
+ //use_cell(sfr, PSW, &cell_psw, wtd_restore);
+ register_cell(sfr, AUXR, &cell_auxr, wtd_restore);
+ return(0);
}
-
-/*
- * 0xf0 1 24 MOVX @DPTR,A
- *____________________________________________________________________________
- *
- */
-
-int
-t_uc51r::inst_movx_Sdptr_a(uchar code)
+void
+cl_uc51r_dummy_hw::write(class cl_memory_cell *cell, t_mem *val)
{
- if ((sfr->get(AUXR) & bmEXTRAM) ||
- sfr->get(DPH))
- write_mem(MEM_XRAM, sfr->read(DPH)*256 + sfr->read(DPL), acc->read());
- else
- ERAM[sfr->read(DPL)]= acc->read();
- return(resGO);
+ if (cell == cell_auxr)
+ {
+ class cl_address_space *xram= uc->address_space(MEM_XRAM_ID);
+ class cl_memory_chip *eram=
+ dynamic_cast<class cl_memory_chip *>(uc->memory("eram_chip"));
+ class cl_address_decoder *d;
+ if (eram &&
+ xram)
+ {
+ if (*val & bmEXTRAM)
+ d= new cl_address_decoder(xram, uc->memory("xram_chip"), 0,0xff,0);
+ else
+ d= new cl_address_decoder(xram, eram, 0, 0xff, 0);
+ d->init();
+ xram->decoders->add(d);
+ d->activate(0);
+ }
+ }
+ /*else if (cell == cell_pcon)
+ {
+ printf("PCON write 0x%x (PC=0x%x)\n", *val, uc->PC);
+ uc->sim->stop(0);
+ }*/
}
-
-/*
- * 0xf2-0xf3 1 24 MOVX @Ri,A
- *____________________________________________________________________________
- *
- */
-
-int
-t_uc51r::inst_movx_Sri_a(uchar code)
+/*void
+cl_uc51r_dummy_hw::happen(class cl_hw *where, enum hw_event he, void *params)
{
- class cl_cell *cell;
- t_mem d= 0;
-
- cell= iram->get_cell(get_reg(code & 0x01)->read());
- d= cell->read();
- if (sfr->get(AUXR) & bmEXTRAM)
- write_mem(MEM_XRAM, sfr->read(P2)*256 + d, acc->read());
- else
- ERAM[d]= acc->read();
- tick(1);
- return(resGO);
-}
+ struct ev_port_changed *ep= (struct ev_port_changed *)params;
+
+ if (where->cathegory == HW_PORT &&
+ he == EV_PORT_CHANGED &&
+ ep->id == 3)
+ {
+ t_mem p3o= ep->pins & ep->prev_value;
+ t_mem p3n= ep->new_pins & ep->new_value;
+ if ((p3o & bm_INT0) &&
+ !(p3n & bm_INT0))
+ uc51->p3_int0_edge++;
+ if ((p3o & bm_INT1) &&
+ !(p3n & bm_INT1))
+ uc51->p3_int1_edge++;
+ }
+}*/
/* End of s51.src/uc51r.cc */
projects / fw / sdcc / blobdiff