*/
int
-t_uc51::inst_mov_a_$data(uchar code)
+cl_51core::inst_mov_a_Sdata(uchar code)
{
- sfr->set(event_at.ws= ACC, fetch());
+ acc->write(fetch());
return(resGO);
}
*/
int
-t_uc51::inst_mov_addr_$data(uchar code)
+cl_51core::inst_mov_addr_Sdata(uchar code)
{
- uchar *addr;
+ class cl_memory_cell *cell;
- addr= get_direct(fetch(), &event_at.wi, &event_at.ws);
- (*addr)= fetch();
- proc_write(addr);
+ cell= get_direct(fetch());
+ cell->write(fetch());
tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_mov_$ri_$data(uchar code)
+cl_51core::inst_mov_Sri_Sdata(uchar code)
{
- uchar *addr;
- int res;
-
- addr= get_indirect(event_at.wi= *(get_reg(code & 0x01)), &res);
- (*addr)= fetch();
- proc_write(addr);
- return(res);
+ class cl_memory_cell *cell;
+
+ cell= iram->get_cell(get_reg(code & 0x01)->read());
+ t_mem d= fetch();
+ cell->write(d);
+ return(resGO);
}
*/
int
-t_uc51::inst_mov_rn_$data(uchar code)
+cl_51core::inst_mov_rn_Sdata(uchar code)
{
- uchar *reg;
+ class cl_memory_cell *reg;
- reg= get_reg(code & 0x07, &event_at.wi);
- (*reg)= fetch();
+ reg= get_reg(code & 0x07);
+ reg->write(fetch());
return(resGO);
}
*/
int
-t_uc51::inst_movc_a_$a_pc(uchar code)
+cl_51core::inst_movc_a_Sa_pc(uchar code)
{
- //SFR[ACC]= EROM[event_at.rc= (PC + SFR[ACC]) & (EROM_SIZE - 1)];
- sfr->set(ACC,
- mem(MEM_ROM)->get(event_at.rc=
- (PC + sfr->get(ACC)))&(EROM_SIZE - 1));
+ acc->write(rom->read(PC + acc->read()));
tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_mov_addr_addr(uchar code)
+cl_51core::inst_mov_addr_addr(uchar code)
{
- uchar *d, *s;
+ class cl_memory_cell *d, *s;
/* SD reversed s & d here */
- s= get_direct(fetch(), &event_at.ri, &event_at.rs);
- d= get_direct(fetch(), &event_at.wi, &event_at.ws);
- (*d)= read(s);
- proc_write(d);
+ s= get_direct(fetch());
+ d= get_direct(fetch());
+ d->write(s->read());
tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_mov_addr_$ri(uchar code)
+cl_51core::inst_mov_addr_Sri(uchar code)
{
- uchar *d, *s;
- int res;
+ class cl_memory_cell *d, *s;
- d= get_direct(fetch(), &event_at.wi, &event_at.ws);
- s= get_indirect(event_at.ri= *(get_reg(code & 0x01)), &res);
- *d= *s;
- proc_write(d);
+ d= get_direct(fetch());
+ s= iram->get_cell(get_reg(code & 0x01)->read());
+ d->write(s->read());
tick(1);
- return(res);
+ return(resGO);
}
*/
int
-t_uc51::inst_mov_addr_rn(uchar code)
+cl_51core::inst_mov_addr_rn(uchar code)
{
- uchar *addr;
+ class cl_memory_cell *cell;
- addr= get_direct(fetch(), &event_at.wi, &event_at.ws);
- (*addr)= *(get_reg(code & 0x07, &event_at.ri));
- proc_write(addr);
+ cell= get_direct(fetch());
+ cell->write(get_reg(code & 0x07)->read());
tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_mov_dptr_$data(uchar code)
+cl_51core::inst_mov_dptr_Sdata(uchar code)
{
- sfr->set(event_at.ws= DPH, fetch());
- sfr->set(DPL, fetch());
+ sfr->write(DPH, fetch());
+ sfr->write(DPL, fetch());
tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_movc_a_$a_dptr(uchar code)
+cl_51core::inst_movc_a_Sa_dptr(uchar code)
{
- //SFR[ACC]= EROM[event_at.rc= (SFR[DPH]*256+SFR[DPL]+SFR[ACC])&(EROM_SIZE-1)];
- sfr->set(ACC, get_mem(MEM_ROM, event_at.rc=
- (sfr->get(DPH)*256+sfr->get(DPL) +
- sfr->get(ACC)) & (EROM_SIZE-1)));
+ acc->write(rom->read(sfr->read(DPH)*256+sfr->read(DPL) + acc->read()));
tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_mov_$ri_addr(uchar code)
+cl_51core::inst_mov_Sri_addr(uchar code)
{
- uchar *d, *s;
- int res;
+ class cl_memory_cell *d, *s;
- d= get_indirect(event_at.wi= *(get_reg(code & 0x01)), &res);
- s= get_direct(fetch(), &event_at.ri, &event_at.rs);
- (*d)= read(s);
+ d= iram->get_cell(get_reg(code & 0x01)->read());
+ s= get_direct(fetch());
+ d->write(s->read());
tick(1);
- return(res);
+ return(resGO);
}
*/
int
-t_uc51::inst_mov_rn_addr(uchar code)
+cl_51core::inst_mov_rn_addr(uchar code)
{
- uchar *reg, *addr;
+ class cl_memory_cell *reg, *cell;
- reg = get_reg(code & 0x07, &event_at.wi);
- addr= get_direct(fetch(), &event_at.ri, &event_at.rs);
- (*reg)= read(addr);
+ reg = get_reg(code & 0x07);
+ cell= get_direct(fetch());
+ reg->write(cell->read());
tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_push(uchar code)
+cl_51core::inst_push(uchar code)
{
- uchar *addr, *sp;
- int res;
-
- addr= get_direct(fetch(), &event_at.ri, &event_at.rs);
- MEM(MEM_SFR)[SP]++;
- sp= get_indirect(sfr->get(SP), &res);
- if (res != resGO)
- res= resSTACK_OV;
- (*sp)= read(addr);
+ t_addr sp, sp_before/*, sp_after*/;
+ t_mem data;
+ class cl_memory_cell *stck, *cell;
+
+ cell= get_direct(fetch());
+ sp_before= sfr->get(SP);
+ sp= /*sp_after= */sfr->wadd(SP, 1);
+ stck= iram->get_cell(sp);
+ stck->write(data= cell->read());
+ class cl_stack_op *so=
+ new cl_stack_push(instPC, data, sp_before, sp/*_after*/);
+ so->init();
+ stack_write(so);
tick(1);
- return(res);
+ return(resGO);
}
*/
int
-t_uc51::inst_xch_a_addr(uchar code)
+cl_51core::inst_xch_a_addr(uchar code)
{
- uchar temp, *addr;
+ t_mem temp;
+ class cl_memory_cell *cell;
- addr= get_direct(fetch(), &event_at.ri, &event_at.rs);
- temp= sfr->get(ACC);
- sfr->set(event_at.ws= ACC, read(addr));
- (*addr)= temp;
- proc_write(addr);
+ cell= get_direct(fetch());
+ temp= acc->read();
+ acc->write(cell->read());
+ cell->write(temp);
return(resGO);
}
*/
int
-t_uc51::inst_xch_a_$ri(uchar code)
+cl_51core::inst_xch_a_Sri(uchar code)
{
- uchar temp, *addr;
- int res;
-
- addr= get_indirect(event_at.ri= *(get_reg(code & 0x01)), &res);
- temp= sfr->get(ACC);
- sfr->set(event_at.ws= ACC, *addr);
- (*addr)= temp;
- return(res);
+ t_mem temp;
+ class cl_memory_cell *cell;
+
+ cell= iram->get_cell(get_reg(code & 0x01)->read());
+ temp= acc->read();
+ acc->write(cell->read());
+ cell->write(temp);
+ return(resGO);
}
*/
int
-t_uc51::inst_xch_a_rn(uchar code)
+cl_51core::inst_xch_a_rn(uchar code)
{
- uchar temp, *reg;
+ t_mem temp;
+ class cl_memory_cell *reg;
- reg = get_reg(code & 0x07, &event_at.ri);
- temp= sfr->get(ACC);
- sfr->set(event_at.wi= ACC, *reg);
- (*reg)= temp;
+ reg = get_reg(code & 0x07);
+ temp= acc->read();
+ acc->write(reg->read());
+ reg->write(temp);
return(resGO);
}
*/
int
-t_uc51::inst_pop(uchar code)
+cl_51core::inst_pop(uchar code)
{
- uchar *addr, *sp;
- int res;
-
- addr= get_direct(fetch(), &event_at.wi, &event_at.ws);
- sp= get_indirect(get_mem(MEM_SFR, SP), &res);
- if (res != resGO)
- res= resSTACK_OV;
- MEM(MEM_SFR)[SP]--;
- (*addr)= *sp;
- proc_write(addr);
+ t_addr sp, sp_before/*, sp_after*/;
+ t_mem data;
+ class cl_memory_cell *cell, *stck;
+
+ sp_before= sfr->get(SP);
+ cell= get_direct(fetch());
+ stck= iram->get_cell(sfr->get(SP));
+ cell->write(data= stck->read());
+ sp= /*sp_after= */sfr->wadd(SP, -1);
tick(1);
- return(res);
+ class cl_stack_op *so=
+ new cl_stack_pop(instPC, data, sp_before, sp/*_after*/);
+ so->init();
+ stack_read(so);
+ return(resGO);
}
*/
int
-t_uc51::inst_xchd_a_$ri(uchar code)
+cl_51core::inst_xchd_a_Sri(uchar code)
{
- uchar *addr, temp;
- int res;
-
- addr= get_indirect(event_at.ri= *(get_reg(code & 0x01)), &res);
- temp= *addr & 0x0f;
- (*addr) = (*addr & 0xf0) | (sfr->get(ACC) & 0x0f);
- sfr->set(event_at.ws= ACC, (sfr->get(ACC) & 0xf0) | temp);
- return(res);
+ t_mem temp, d;
+ class cl_memory_cell *cell;
+
+ cell= iram->get_cell(get_reg(code & 0x01)->read());
+ temp= (d= cell->read()) & 0x0f;
+ cell->write((d & 0xf0) | (acc->read() & 0x0f));
+ acc->write((acc->get() & 0xf0) | temp);
+ return(resGO);
}
*/
int
-t_uc51::inst_movx_a_$dptr(uchar code)
+cl_51core::inst_movx_a_Sdptr(uchar code)
{
- sfr->set(event_at.ws= ACC,
- get_mem(MEM_XRAM, event_at.rx=sfr->get(DPH)*256+sfr->get(DPL)));
+ acc->write(xram->read(sfr->read(DPH)*256 + sfr->read(DPL)));
tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_movx_a_$ri(uchar code)
+cl_51core::inst_movx_a_Sri(uchar code)
{
- uchar *addr;
+ t_mem d;
- addr= get_reg(code & 0x01);
- sfr->set(event_at.ws= ACC,
- read_mem(MEM_XRAM,
- event_at.rx= (sfr->get(P2)&port_pins[2])*256+*addr));
+ d= get_reg(code & 0x01)->read();
+ acc->write(xram->read(sfr->read(P2)*256 + d));
tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_mov_a_addr(uchar code)
+cl_51core::inst_mov_a_addr(uchar code)
{
- uchar *addr;
-
- addr= get_direct(fetch(), &event_at.ri, &event_at.rs);
- sfr->set(event_at.ws= ACC, read(addr));
+ class cl_memory_cell *cell;
+ t_addr address= fetch();
+
+ /* If this is ACC, it is an invalid instruction */
+ if (address == ACC)
+ {
+ //sim->app->get_commander()->
+ //debug("Invalid Instruction : E5 E0 MOV A,ACC at %06x\n", PC);
+ inst_unknown();
+ }
+ else
+ {
+ cell= get_direct(address);
+ acc->write(cell->read());
+ }
return(resGO);
}
*/
int
-t_uc51::inst_mov_a_$ri(uchar code)
+cl_51core::inst_mov_a_Sri(uchar code)
{
- uchar *addr;
- int res;
+ class cl_memory_cell *cell;
- addr= get_indirect(event_at.ri= *(get_reg(code & 0x01)), &res);
- sfr->set(event_at.ws= ACC, *addr);
- return(res);
+ cell= iram->get_cell(get_reg(code & 0x01)->read());
+ acc->write(cell->read());
+ return(resGO);
}
*/
int
-t_uc51::inst_mov_a_rn(uchar code)
+cl_51core::inst_mov_a_rn(uchar code)
{
- sfr->set(event_at.ws= ACC, *(get_reg(code & 0x07, &event_at.ri)));
+ acc->write(get_reg(code & 0x07)->read());
return(resGO);
}
*/
int
-t_uc51::inst_movx_$dptr_a(uchar code)
+cl_51core::inst_movx_Sdptr_a(uchar code)
{
- set_mem(MEM_XRAM, event_at.wx= sfr->get(DPH)*256+sfr->get(DPL),
- sfr->get(event_at.rs= ACC));
+ xram->write(sfr->read(DPH)*256 + sfr->read(DPL), acc->read());
+ tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_movx_$ri_a(uchar code)
+cl_51core::inst_movx_Sri_a(uchar code)
{
- uchar *addr;
+ t_mem d;
- addr= get_reg(code & 0x01);
- set_mem(MEM_XRAM,
- event_at.wx= (sfr->get(P2) & port_pins[2])*256 + *addr,
- sfr->get(ACC));
+ d= get_reg(code & 0x01)->read();
+ xram->write(sfr->read(P2)*256 + d, acc->read());
tick(1);
return(resGO);
}
*/
int
-t_uc51::inst_mov_addr_a(uchar code)
+cl_51core::inst_mov_addr_a(uchar code)
{
- uchar *addr;
-
- addr= get_direct(fetch(), &event_at.wi, &event_at.ws);
- (*addr)= sfr->get(event_at.rs= ACC);
- proc_write(addr);
+ class cl_memory_cell *cell;
+
+ cell= get_direct(fetch());
+ cell->write(acc->read());
return(resGO);
}
*/
int
-t_uc51::inst_mov_$ri_a(uchar code)
+cl_51core::inst_mov_Sri_a(uchar code)
{
- uchar *addr;
- int res;
+ class cl_memory_cell *cell;
- addr= get_indirect(event_at.wi= *(get_reg(code & 0x01)), &res);
- (*addr)= sfr->get(event_at.rs= ACC);
- return(res);
+ cell= iram->get_cell(get_reg(code & 0x01)->read());
+ cell->write(acc->read());
+ return(resGO);
}
*/
int
-t_uc51::inst_mov_rn_a(uchar code)
+cl_51core::inst_mov_rn_a(uchar code)
{
- uchar *reg;
+ class cl_memory_cell *reg;
- reg= get_reg(code &0x07, &event_at.wi);
- (*reg)= sfr->get(event_at.rs= ACC);
+ reg= get_reg(code &0x07);
+ reg->write(acc->read());
return(resGO);
}
projects / fw / sdcc / blobdiff