* device/include/pic16/pic18f*.h: add bit aliases in INTCONbits_t

[fw/sdcc] / device / include / pic16 / pic18f6520.h

diff --git a/device/include/pic16/pic18f6520.h b/device/include/pic16/pic18f6520.h
index 34661e0765de92b1faffaa3bc5c86b7f4845dd76..eee64908b6ef86865502d4107d78e7338e528dde 100644 (file)
--- a/device/include/pic16/pic18f6520.h
+++ b/device/include/pic16/pic18f6520.h
@@ -754,6 +754,16 @@ extern volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits;
 extern __sfr __at (0xfad) TXREG1;
 extern __sfr __at (0xfae) RCREG1;
 extern __sfr __at (0xfaf) SPBRG1;
+
+/* for compatibility reasons */
+extern __sfr __at (0xfab) RCSTA;
+extern volatile __RCSTA1bits_t __at (0xfab) RCSTAbits;
+extern __sfr __at (0xfac) TXSTA;
+extern volatile __TXSTA1bits_t __at (0xfac) TXSTAbits;
+extern __sfr __at (0xfad) TXREG;
+extern __sfr __at (0xfae) RCREG;
+extern __sfr __at (0xfaf) SPBRG;
+
 extern __sfr __at (0xfb0) PSPCON;
 typedef union {
        struct {
@@ -1193,6 +1203,16 @@ typedef union {
                unsigned PEIE:1;
                unsigned GIE:1;
        };
+       struct {
+               unsigned :1;
+               unsigned INT0IF:1;
+               unsigned TMR0IF:1;
+               unsigned :1;
+               unsigned INT0IE:1;
+               unsigned TMR0IE:1;
+               unsigned GIEL:1;
+               unsigned GIEH:1;
+       };
 } __INTCONbits_t;
 
 extern volatile __INTCONbits_t __at (0xff2) INTCONbits;
@@ -1231,8 +1251,8 @@ extern __sfr __at (0xfff) TOSU;
 #define __CONFIG1H     0x300001
 #define __CONFIG2L     0x300002
 #define __CONFIG2H     0x300003
-#define __CONFIG3L     0x300004
 #define __CONFIG3H     0x300005
+#define __CONFIG4L     0x300006
 #define __CONFIG5L     0x300008
 #define __CONFIG5H     0x300009
 #define __CONFIG6L     0x30000A
@@ -1284,28 +1304,21 @@ extern __sfr __at (0xfff) TOSU;
 #define _WDTPS_1_2_2H  0xF3    /* 1:2 */
 #define _WDTPS_1_1_2H  0xF1    /* 1:1 */
 
-/* External Bus Wait 3L options */
-#define _WAIT_OFF_3L   0xFF    /* Disabled */
-#define _WAIT_ON_3L    0x7F    /* Enabled */
-
 /* CCP2 Mux 3H options */
 #define _CCP2MUX_RC1_3H        0xFF    /* RC1 */
-#define _CCP2MUX_RE7_MICROCONTROLLER__RB3_3H   0xFE    /* RE7(Microcontroller)/RB3 */
+#define _CCP2MUX_RE7_3H        0xFE    /* RE7 */
 
-/* Timer1 OSC 3H options */
-#define _T1OSCMX_LOW_3H        0xFD    /* Low Power */
+/* Low Voltage Program 4L options */
+#define _LVP_ON_4L     0xFF    /* Enabled */
+#define _LVP_OFF_4L    0xFB    /* Disabled */
 
-/* Low Voltage Program 3H options */
-#define _LVP_ON_3H     0xFF    /* Enabled */
-#define _LVP_OFF_3H    0xFB    /* Disabled */
+/* Background Debug 4L options */
+#define _BACKBUG_OFF_4L        0xFF    /* Disabled */
+#define _BACKBUG_ON_4L 0x7F    /* Enabled */
 
-/* Background Debug 3H options */
-#define _BACKBUG_OFF_3H        0xFF    /* Disabled */
-#define _BACKBUG_ON_3H 0x7F    /* Enabled */
-
-/* Stack Overflow Reset 3H options */
-#define _STVR_ON_3H    0xFF    /* Enabled */
-#define _STVR_OFF_3H   0xFE    /* Disabled */
+/* Stack Overflow Reset 4L options */
+#define _STVR_ON_4L    0xFF    /* Enabled */
+#define _STVR_OFF_4L   0xFE    /* Disabled */
 
 /* Code Protect 00800-01FFF 5L options */
 #define _CP_0_OFF_5L   0xFF    /* Disabled */
@@ -1391,7 +1404,4 @@ extern __sfr __at (0xfff) TOSU;
 #define __IDLOC7       0x200007
 
 
-/* added for USART compatibility with smaller devices */
-#define __MULTIPLE_USARTS 1
-
 #endif