From ed3632d9c7b89ef2934d48806ada7b2b5ee54a42 Mon Sep 17 00:00:00 2001 From: Gianluca Renzi Date: Thu, 25 Oct 2012 14:29:33 +0200 Subject: [PATCH] Added support for NXP LPC1850 Microcontroller Added a new configuration file for LPC18xx based boards, such as HitexLPC1850RevA Evaluation Board, and all other based on the same microcontroller by NXP. Change-Id: I68c3827be535b6d09a5c70b6d57191937d00354d Signed-off-by: Gianluca Renzi Reviewed-on: http://openocd.zylin.com/930 Tested-by: jenkins Reviewed-by: Spencer Oliver --- tcl/target/lpc1850.cfg | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 tcl/target/lpc1850.cfg diff --git a/tcl/target/lpc1850.cfg b/tcl/target/lpc1850.cfg new file mode 100644 index 000000000..1ea7a49e1 --- /dev/null +++ b/tcl/target/lpc1850.cfg @@ -0,0 +1,31 @@ + +adapter_khz 500 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc1850 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} +# +# M3 JTAG mode TAP +# +if { [info exists M3_JTAG_TAPID] } { + set _M3_JTAG_TAPID $M3_JTAG_TAPID +} else { + set _M3_JTAG_TAPID 0x4ba00477 +} + +jtag newtap $_CHIPNAME m3 -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_JTAG_TAPID + +set _TARGETNAME $_CHIPNAME.m3 +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME + +# if srst is not fitted use SYSRESETREQ to +# perform a soft reset +cortex_m3 reset_config sysresetreq -- 2.30.2