stlink: fix vector catch not being cleared
authorSpencer Oliver <spen@spen-soft.co.uk>
Mon, 8 Oct 2012 09:05:45 +0000 (10:05 +0100)
committerFreddie Chopin <freddie.chopin@gmail.com>
Thu, 18 Oct 2012 14:39:04 +0000 (14:39 +0000)
Seems after a reset the stlink is not clearing the vector catch (VC_CORERESET)
in the Debug Control Register.

This has the side effect if the user presses an external reset the core will
halt, this patch fixes that.

Change-Id: Ic3b2c3991b79cacbbd901c02b79613c2e204e71f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/905
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
src/target/stm32_stlink.c

index aac1eecb7d70843fa64759b293fb51fa1b9490a7..1c755084749e150cc597264c926981e4b49c570c 100644 (file)
@@ -325,6 +325,7 @@ static int stm32_stlink_load_context(struct target *target)
 
 static int stlink_debug_entry(struct target *target)
 {
+       struct stlink_interface_s *stlink_if = target_to_stlink(target);
        struct armv7m_common *armv7m = target_to_armv7m(target);
        struct arm *arm = &armv7m->arm;
        struct reg *r;
@@ -337,6 +338,9 @@ static int stlink_debug_entry(struct target *target)
 
        stm32_stlink_load_context(target);
 
+       /* make sure we clear the vector catch bit */
+       stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DEMCR, 0);
+
        r = armv7m->core_cache->reg_list + ARMV7M_xPSR;
        xPSR = buf_get_u32(r->value, 0, 32);
 
@@ -427,7 +431,12 @@ static int stm32_stlink_assert_reset(struct target *target)
        }
 
        stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DHCSR, DBGKEY|C_DEBUGEN);
-       stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DEMCR, VC_CORERESET);
+
+       /* only set vector catch if halt is requested */
+       if (target->reset_halt)
+               stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DEMCR, VC_CORERESET);
+       else
+               stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DEMCR, 0);
 
        if (jtag_reset_config & RESET_HAS_SRST) {
                if (!srst_asserted) {