target/riscv: fix undefined operation

[fw/openocd] / src / target / riscv / riscv.c

diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 5444fca01b84696afb5ab2d9dfc33f4a50aa734b..dfd6a3e3d4fd15029ee2e4e7f315563700ee3b73 100644 (file)
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -1607,6 +1607,7 @@ static int riscv_address_translate(struct target *target,
        LOG_DEBUG("virtual=0x%" TARGET_PRIxADDR "; mode=%s", virtual, info->name);
 
        /* verify bits xlen-1:va_bits-1 are all equal */
+       assert(xlen >= info->va_bits);
        target_addr_t mask = ((target_addr_t)1 << (xlen - (info->va_bits - 1))) - 1;
        target_addr_t masked_msbs = (virtual >> (info->va_bits - 1)) & mask;
        if (masked_msbs != 0 && masked_msbs != mask) {