return retval;
}
+ /* If the processor is sleeping in a WFI or WFE instruction, the
+ * C_HALT bit must be asserted to regain control */
+ if (cortex_m3->dcb_dhcsr & S_SLEEP) {
+ retval = mem_ap_write_u32(swjdp, DCB_DHCSR, DBGKEY | C_HALT | C_DEBUGEN);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
retval = mem_ap_write_u32(swjdp, DCB_DCRDR, 0);
if (retval != ERROR_OK)
return retval;
if (reset_config == CORTEX_M3_RESET_VECTRESET) {
LOG_WARNING("Only resetting the Cortex-M3 core, use a reset-init event "
- "handler to reset any peripherals");
+ "handler to reset any peripherals or configure hardware srst support.");
}
{