struct stm32x_flash_bank {
struct stm32x_options option_bytes;
- struct working_area *write_algorithm;
int ppage_size;
int probed;
stm32x_info = malloc(sizeof(struct stm32x_flash_bank));
bank->driver_priv = stm32x_info;
- stm32x_info->write_algorithm = NULL;
stm32x_info->probed = 0;
stm32x_info->has_dual_banks = false;
stm32x_info->register_base = FLASH_REG_BASE_B0;
stm32x_info = bank->driver_priv;
+ /* stlink is currently does not support 16bit
+ * read/writes. so we cannot write option bytes */
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ if (armv7m && armv7m->stlink) {
+ LOG_ERROR("Option bytes currently unsupported for stlink");
+ return ERROR_FAIL;
+ }
+
/* read current options */
stm32x_read_options(bank);
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
struct target *target = bank->target;
uint32_t buffer_size = 16384;
+ struct working_area *write_algorithm;
struct working_area *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[5];
/* see contrib/loaders/flash/stm32f1x.S for src */
static const uint8_t stm32x_flash_write_code[] = {
- /* #define STM32_FLASH_CR_OFFSET 0x10 */
/* #define STM32_FLASH_SR_OFFSET 0x0C */
/* wait_fifo: */
0x16, 0x68, /* ldr r6, [r2, #0] */
0x00, 0x2e, /* cmp r6, #0 */
- 0x1a, 0xd0, /* beq exit */
+ 0x18, 0xd0, /* beq exit */
0x55, 0x68, /* ldr r5, [r2, #4] */
0xb5, 0x42, /* cmp r5, r6 */
0xf9, 0xd0, /* beq wait_fifo */
- 0x01, 0x26, /* movs r6, #1 */
- 0x06, 0x61, /* str r6, [r0, #STM32_FLASH_CR_OFFSET] */
0x2e, 0x88, /* ldrh r6, [r5, #0] */
0x26, 0x80, /* strh r6, [r4, #0] */
0x02, 0x35, /* adds r5, #2 */
0x01, 0x39, /* subs r1, r1, #1 */
0x00, 0x29, /* cmp r1, #0 */
0x02, 0xd0, /* beq exit */
- 0xe3, 0xe7, /* b wait_fifo */
+ 0xe5, 0xe7, /* b wait_fifo */
/* error: */
0x00, 0x20, /* movs r0, #0 */
0x50, 0x60, /* str r0, [r2, #4] */
/* flash write code */
if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code),
- &stm32x_info->write_algorithm) != ERROR_OK) {
+ &write_algorithm) != ERROR_OK) {
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
- retval = target_write_buffer(target, stm32x_info->write_algorithm->address,
+ retval = target_write_buffer(target, write_algorithm->address,
sizeof(stm32x_flash_write_code), (uint8_t *)stm32x_flash_write_code);
if (retval != ERROR_OK)
return retval;
buffer_size /= 2;
buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */
if (buffer_size <= 256) {
- /* if we already allocated the writing code, but failed to get a
+ /* we already allocated the writing code, but failed to get a
* buffer, free the algorithm */
- if (stm32x_info->write_algorithm)
- target_free_working_area(target, stm32x_info->write_algorithm);
+ target_free_working_area(target, write_algorithm);
LOG_WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
0, NULL,
5, reg_params,
source->address, source->size,
- stm32x_info->write_algorithm->address, 0,
+ write_algorithm->address, 0,
&armv7m_info);
if (retval == ERROR_FLASH_OPERATION_FAILED) {
}
target_free_working_area(target, source);
- target_free_working_area(target, stm32x_info->write_algorithm);
+ target_free_working_area(target, write_algorithm);
destroy_reg_param(®_params[0]);
destroy_reg_param(®_params[1]);
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
- uint32_t words_remaining = (count / 2);
- uint32_t bytes_remaining = (count & 0x00000001);
- uint32_t address = bank->base + offset;
- uint32_t bytes_written = 0;
- int retval;
+ uint8_t *new_buffer = NULL;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
}
if (offset & 0x1) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
+ LOG_ERROR("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
+ /* If there's an odd number of bytes, the data has to be padded. Duplicate
+ * the buffer and use the normal code path with a single block write since
+ * it's probably cheaper than to special case the last odd write using
+ * discrete accesses. */
+ if (count & 1) {
+ new_buffer = malloc(count + 1);
+ if (new_buffer == NULL) {
+ LOG_ERROR("odd number of bytes to write and no memory for padding buffer");
+ return ERROR_FAIL;
+ }
+ LOG_INFO("odd number of bytes to write, padding with 0xff");
+ buffer = memcpy(new_buffer, buffer, count);
+ buffer[count++] = 0xff;
+ }
+
+ uint32_t words_remaining = count / 2;
+ int retval, retval2;
+
/* unlock flash registers */
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY1);
if (retval != ERROR_OK)
- return retval;
+ goto cleanup;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY2);
if (retval != ERROR_OK)
- return retval;
+ goto cleanup;
- /* multiple half words (2-byte) to be programmed? */
- if (words_remaining > 0) {
- /* try using a block write */
- retval = stm32x_write_block(bank, buffer, offset, words_remaining);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single dword accesses */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
- }
- } else {
- buffer += words_remaining * 2;
- address += words_remaining * 2;
- words_remaining = 0;
- }
- }
+ retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
+ if (retval != ERROR_OK)
+ goto cleanup;
- if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
- return retval;
+ /* try using a block write */
+ retval = stm32x_write_block(bank, buffer, offset, words_remaining);
- while (words_remaining > 0) {
- uint16_t value;
- memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
+ if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
+ /* if block write failed (no sufficient working area),
+ * we use normal (slow) single halfword accesses */
+ LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u16(target, address, value);
- if (retval != ERROR_OK)
- return retval;
+ while (words_remaining > 0) {
+ uint16_t value;
+ memcpy(&value, buffer, sizeof(uint16_t));
- retval = stm32x_wait_status_busy(bank, 5);
- if (retval != ERROR_OK)
- return retval;
+ retval = target_write_u16(target, bank->base + offset, value);
+ if (retval != ERROR_OK)
+ goto reset_pg_and_lock;
- bytes_written += 2;
- words_remaining--;
- address += 2;
- }
+ retval = stm32x_wait_status_busy(bank, 5);
+ if (retval != ERROR_OK)
+ goto reset_pg_and_lock;
- if (bytes_remaining) {
- uint16_t value = 0xffff;
- memcpy(&value, buffer + bytes_written, bytes_remaining);
+ words_remaining--;
+ buffer += 2;
+ offset += 2;
+ }
+ }
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u16(target, address, value);
- if (retval != ERROR_OK)
- return retval;
+reset_pg_and_lock:
+ retval2 = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
+ if (retval == ERROR_OK)
+ retval = retval2;
- retval = stm32x_wait_status_busy(bank, 5);
- if (retval != ERROR_OK)
- return retval;
- }
+cleanup:
+ if (new_buffer)
+ free(new_buffer);
- return target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
+ return retval;
}
static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
} else if (((cpuid >> 4) & 0xFFF) == 0xC23) {
/* 0xC23 is M3 devices */
device_id_register = 0xE0042000;
+ } else if (((cpuid >> 4) & 0xFFF) == 0xC24) {
+ /* 0xC24 is M4 devices */
+ device_id_register = 0xE0042000;
} else {
LOG_ERROR("Cannot identify target as a stm32x");
return ERROR_FAIL;
} else if (((cpuid >> 4) & 0xFFF) == 0xC23) {
/* 0xC23 is M3 devices */
flash_size_reg = 0x1FFFF7E0;
+ } else if (((cpuid >> 4) & 0xFFF) == 0xC24) {
+ /* 0xC24 is M4 devices */
+ flash_size_reg = 0x1FFFF7CC;
} else {
LOG_ERROR("Cannot identify target as a stm32x");
return ERROR_FAIL;
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
int i;
uint16_t flash_size_in_kb;
+ uint16_t max_flash_size_in_kb;
uint32_t device_id;
int page_size;
uint32_t base_address = 0x08000000;
LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
- /* get flash size from target. */
- retval = stm32x_get_flash_size(bank, &flash_size_in_kb);
- if (retval != ERROR_OK) {
- LOG_WARNING("failed reading flash size, default to max target family");
- /* failed reading flash size, default to max target family */
- flash_size_in_kb = 0xffff;
- }
-
- if ((device_id & 0xfff) == 0x410) {
- /* medium density - we have 1k pages
- * 4 pages for a protection area */
+ /* set page size, protection granularity and max flash size depending on family */
+ switch (device_id & 0xfff) {
+ case 0x410: /* medium density */
page_size = 1024;
stm32x_info->ppage_size = 4;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff) {
- /* number of sectors incorrect on revA */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash");
- flash_size_in_kb = 128;
- }
- } else if ((device_id & 0xfff) == 0x412) {
- /* low density - we have 1k pages
- * 4 pages for a protection area */
+ max_flash_size_in_kb = 128;
+ break;
+ case 0x412: /* low density */
page_size = 1024;
stm32x_info->ppage_size = 4;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff) {
- /* number of sectors incorrect on revA */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 32k flash");
- flash_size_in_kb = 32;
- }
- } else if ((device_id & 0xfff) == 0x414) {
- /* high density - we have 2k pages
- * 2 pages for a protection area */
+ max_flash_size_in_kb = 32;
+ break;
+ case 0x414: /* high density */
page_size = 2048;
stm32x_info->ppage_size = 2;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff) {
- /* number of sectors incorrect on revZ */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 512k flash");
- flash_size_in_kb = 512;
- }
- } else if ((device_id & 0xfff) == 0x418) {
- /* connectivity line density - we have 2k pages
- * 2 pages for a protection area */
+ max_flash_size_in_kb = 512;
+ break;
+ case 0x418: /* connectivity line density */
page_size = 2048;
stm32x_info->ppage_size = 2;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff) {
- /* number of sectors incorrect on revZ */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 256k flash");
- flash_size_in_kb = 256;
- }
- } else if ((device_id & 0xfff) == 0x420) {
- /* value line density - we have 1k pages
- * 4 pages for a protection area */
+ max_flash_size_in_kb = 256;
+ break;
+ case 0x420: /* value line density */
page_size = 1024;
stm32x_info->ppage_size = 4;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff) {
- /* number of sectors may be incorrrect on early silicon */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash");
- flash_size_in_kb = 128;
- }
- } else if ((device_id & 0xfff) == 0x428) {
- /* value line High density - we have 2k pages
- * 4 pages for a protection area */
+ max_flash_size_in_kb = 128;
+ break;
+ case 0x422: /* stm32f30x */
+ page_size = 2048;
+ stm32x_info->ppage_size = 2;
+ max_flash_size_in_kb = 256;
+ break;
+ case 0x428: /* value line High density */
page_size = 2048;
stm32x_info->ppage_size = 4;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff) {
- /* number of sectors may be incorrrect on early silicon */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash");
- flash_size_in_kb = 128;
- }
- } else if ((device_id & 0xfff) == 0x430) {
- /* xl line density - we have 2k pages
- * 2 pages for a protection area */
+ max_flash_size_in_kb = 128;
+ break;
+ case 0x430: /* xl line density (dual flash banks) */
page_size = 2048;
stm32x_info->ppage_size = 2;
+ max_flash_size_in_kb = 1024;
stm32x_info->has_dual_banks = true;
+ break;
+ case 0x432: /* stm32f37x */
+ page_size = 2048;
+ stm32x_info->ppage_size = 2;
+ max_flash_size_in_kb = 256;
+ break;
+ case 0x440: /* stm32f0x */
+ page_size = 1024;
+ stm32x_info->ppage_size = 4;
+ max_flash_size_in_kb = 64;
+ break;
+ default:
+ LOG_WARNING("Cannot identify target as a STM32 family.");
+ return ERROR_FAIL;
+ }
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff) {
- /* number of sectors may be incorrrect on early silicon */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 1024k flash");
- flash_size_in_kb = 1024;
- }
+ /* get flash size from target. */
+ retval = stm32x_get_flash_size(bank, &flash_size_in_kb);
+ /* failed reading flash size or flash size invalid (early silicon),
+ * default to max target family */
+ if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) {
+ LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
+ max_flash_size_in_kb);
+ flash_size_in_kb = max_flash_size_in_kb;
+ }
+
+ if (stm32x_info->has_dual_banks) {
/* split reported size into matching bank */
if (bank->base != 0x08080000) {
/* bank 0 will be fixed 512k */
stm32x_info->register_base = FLASH_REG_BASE_B1;
base_address = 0x08080000;
}
- } else if ((device_id & 0xfff) == 0x440) {
- /* stm32f0x - we have 1k pages
- * 4 pages for a protection area */
- page_size = 1024;
- stm32x_info->ppage_size = 4;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff) {
- /* number of sectors incorrect on revZ */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 64k flash");
- flash_size_in_kb = 64;
- }
- } else {
- LOG_WARNING("Cannot identify target as a STM32 family.");
- return ERROR_FAIL;
}
LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
snprintf(buf, buf_size, "Z");
break;
+ default:
+ snprintf(buf, buf_size, "unknown");
+ break;
+ }
+ } else if ((device_id & 0xfff) == 0x422) {
+ printed = snprintf(buf, buf_size, "stm32f30x - Rev: ");
+ buf += printed;
+ buf_size -= printed;
+
+ switch (device_id >> 16) {
+ case 0x1000:
+ snprintf(buf, buf_size, "1.0");
+ break;
+
+ case 0x2000:
+ snprintf(buf, buf_size, "2.0");
+ break;
+
default:
snprintf(buf, buf_size, "unknown");
break;
snprintf(buf, buf_size, "A");
break;
+ default:
+ snprintf(buf, buf_size, "unknown");
+ break;
+ }
+ } else if ((device_id & 0xfff) == 0x432) {
+ printed = snprintf(buf, buf_size, "stm32f37x - Rev: ");
+ buf += printed;
+ buf_size -= printed;
+
+ switch (device_id >> 16) {
+ case 0x1000:
+ snprintf(buf, buf_size, "1.0");
+ break;
+
+ case 0x2000:
+ snprintf(buf, buf_size, "2.0");
+ break;
+
default:
snprintf(buf, buf_size, "unknown");
break;
.read = default_flash_read,
.probe = stm32x_probe,
.auto_probe = stm32x_auto_probe,
- .erase_check = default_flash_mem_blank_check,
+ .erase_check = default_flash_blank_check,
.protect_check = stm32x_protect_check,
.info = get_stm32x_info,
};
projects / fw / openocd / blobdiff