# NXP LPC11U14 Cortex-M0 with 32kB Flash and 4kB Local On-Chip SRAM,

set CHIPNAME lpc11u14
set CPUTAPID 0x0bb11477
set CPURAMSIZE 0x1000
set CPUROMSIZE 0x8000

# After reset the chip is clocked by the ~12MHz internal RC oscillator.
# When board-specific code (reset-init handler or device firmware)
# configures another oscillator and/or PLL0, set CCLK to match; if
# you don't, then flash erase and write operations may misbehave.
# (The ROM code doing those updates cares about core clock speed...)
#
# CCLK is the core clock frequency in KHz
set CCLK 12000

# Include the main configuration file.
source [find target/lpc11uxx_stlink.cfg]