-.SILENT:
+#.SILENT:
#
# -D CFG_CONSOLE_USB for console on USB
export OBJDUMP=arm-elf-objdump
export CRT0=boot.s
export WARNINGS=-Wall -Wextra -Wshadow -Wpointer-arith -Wbad-function-cast -Wcast-align -Wsign-compare -Waggregate-return -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations -Wunused
-export CFLAGS=$(WARNINGS) -D RUN_MODE=RUN_FROM_ROM -D GCC_ARM7 $(INCLUDES) $(BASEINCLUDE) -mcpu=arm7tdmi -T$(LDSCRIPT) -g -O3 -fomit-frame-pointer $(LPC2148DEMO_OPTS)
+export CFLAGS=$(WARNINGS) -D RUN_MODE=RUN_FROM_ROM -D GCC_ARM7 $(INCLUDES) $(BASEINCLUDE) -mcpu=arm7tdmi -T$(LDSCRIPT) -g -O3 -fomit-frame-pointer $(LPC2148DEMO_OPTS) -DFC1025 -DBDALE
export LDSCRIPT=lpc2148-rom.ld
export LINKER_FLAGS=$(COMMON)/common.a -Xlinker -olpc2148.elf -Xlinker -M -Xlinker -Map=lpc2148.map
export ROOT=$(shell pwd)
@for i in $(SUBDIRS); do \
(cd $$i; $(MAKE) $(MFLAGS) $(MYMAKEFLAGS) all); done
make lpc2148.hex
+ make lpc2148.bin
+
+program: lpc2148.bin
+ sudo openocd -f ./openocd-flash.cfg
+
+debug: lpc2148.bin
+ sudo openocd -f ./openocd-debug.cfg
lpc2148.hex : .depend Makefile lpc2148.elf
$(OBJCOPY) lpc2148.elf -O ihex lpc2148.hex
@echo "Length is " `grep __"end_of_text__ = ." *.map | cut -b 17-35` "bytes"
+lpc2148.bin : .depend Makefile lpc2148.elf
+ $(OBJCOPY) lpc2148.elf -O binary lpc2148.bin
+ @echo "Length is " `grep __"end_of_text__ = ." *.map | cut -b 17-35` "bytes"
+
lpc2148.elf : .depend Makefile $(ARM_OBJ) $(COMMON)/common.a $(CRT0) $(LDSCRIPT)
$(CC) $(CFLAGS) $(ARM_OBJ) -nostartfiles $(CRT0) $(LINKER_FLAGS)
$(OBJDUMP) -d -S lpc2148.elf >lpc2148.lst
//
int adcRead0_3 (void)
{
+ AD0_CR = AD_CR_CLKS10 | AD_CR_PDN | ((11 - 1) << AD_CR_CLKDIVSHIFT) | AD_CR_SEL3;
AD0_CR |= AD_CR_START_NOW;
while (!(AD0_DR3 & AD_DR_DONE))
#define _ADC_H_
int adcRead0_3 (void);
+int adcRead0_7 (void);
void adcInit (void);
#endif
address %= EEPROM_SIZE;
if ((rwAddress = address) >= 65536)
+#ifdef FC1025
+ deviceAddress |= 0x08;
+ else
+ deviceAddress &= ~0x08;
+#else
deviceAddress |= 0x02;
else
deviceAddress &= ~0x02;
+#endif
return r;
}
//
#define EEPROM_ADDRESS (0xa0)
#define EEPROM_SIZE (131072)
-#define EEPROM_PAGESIZE (256)
+#ifdef FC1025
+# define EEPROM_PAGESIZE (128)
+#else
+# define EEPROM_PAGESIZE (256)
+#endif
//
//
I2C0_CONCLR = I2C_CONCLR_MASK;
I2C0_CONSET = I2C_CONSET_I2EN;
+#ifdef FC1025
+ // the Microchip 24FC1025 can handle a 1 Mhz clock
+ // PCLK / (i2c_clock * 2), with 48 Mhz PCLK that's 24...
+ // for AltusMetrum, 14.7456 Mhz xtal, it's 29.4912, use 30.
+ I2C0_SCLL = 30;
+ I2C0_SCLH = 30;
+#else
I2C0_SCLL = 240;
I2C0_SCLH = 240;
+#endif
//
// Initialize the interrupt vector
--- /dev/null
+# configure gdb to use openocd to talk to the LPC2148 board via Olimex USB JTAG
+
+#target remote localhost:3333
+#monitor arm7_9 sw_bkpts enable
+#monitor poll
+
+target remote localhost:3333
+monitor reset
+monitor sleep 500
+monitor soft_reset_halt
+#monitor mww 0xFFFFFF00 0x01
+#monitor reg pc 0x00000000
+monitor poll
+monitor wait_halt
+monitor ARM7_9 force_hw_bkpts enable
+symbol-file lpc2148.elf
+thbreak main
+#load
+continue
int main (void)
{
cpuSetupHardware ();
+//#ifndef BDALE
uartInit (0, BAUD_UART0, 64);
uartInit (1, BAUD_UART1, 64);
+//#endif
#ifndef CFG_USB_MSC
usbserInit ();
#else
usbmassInit ();
#endif
+//#ifndef BDALE
rtcInit ();
adcInit ();
dacInit ();
+//#endif
i2cInit ();
+//#ifndef BDALE
eintsInit ();
fiqInit ();
iapInit ();
+//#endif
memset (taskHandles, 0, sizeof (taskHandles));
xTaskCreate (vSensorsTask, (const signed portCHAR * const) "Sensors", 512, NULL, (configMAX_PRIORITIES - 2), &taskHandles [TASKHANDLE_SENSORS]);
+//#ifndef BDALE
#ifndef CFG_CONSOLE_UART1
xTaskCreate (vGPSTask, (const signed portCHAR * const) "GPS", 768, NULL, (tskIDLE_PRIORITY + 1), &taskHandles [TASKHANDLE_GPS]);
#endif
+//#endif
xTaskCreate (vMonitorTask, (const signed portCHAR * const) "Monitor", 1024, NULL, (tskIDLE_PRIORITY + 1), &taskHandles [TASKHANDLE_MONITOR]);
+//#ifndef BDALE
xTaskCreate (vLEDFlashTask, (const signed portCHAR * const) "LEDx", configMINIMAL_STACK_SIZE, NULL, (tskIDLE_PRIORITY + 1), &taskHandles [TASKHANDLE_LED]);
+//#endif
vTaskStartScheduler ();
return 0;
--- /dev/null
+#
+# The following commands will be executed on
+# reset (because of run_and_init in the config-file)
+# - wait for target halt
+# - erase memory
+# - flash content of file main.bin into target-memory
+# - shutdown openocd
+#
+# created by Martin Thomas
+# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects
+# based on information from Dominic Rath
+#
+arm7_9 dcc_downloads enable
+wait_halt
+sleep 10
+poll
+flash probe 0
+# erase first bank only:
+flash erase 0 0 26
+flash write 0 lpc2148.bin 0x0
+#flash write 0 scripts/lpc2148_freertos.bin 0x0
+#flash write 0 scripts/main.bin 0x0
+reset run
+sleep 10
+shutdown
+
--- /dev/null
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+#interface
+interface ft2232
+ft2232_device_desc "Olimex OpenOCD JTAG"
+ft2232_layout "olimex-jtag"
+ft2232_vid_pid 0x15BA 0x0003
+jtag_speed 3
+#use combined on interfaces or targets that can't set TRST/SRST separately
+#reset_config trst_and_srst separate
+reset_config trst_and_srst srst_pulls_trst
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+#target configuration
+daemon_startup reset
+#target <type> <startup mode>
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
+target arm7tdmi little run_and_init 0 arm7tdmi-s_r4
+run_and_halt_time 0 30
+#target_script 0 reset oocd_flash_lpc2148.script
+working_area 0 0x40000000 0x40000 nobackup
+#flash configuration
+#flash bank lpc2000 0x0 0x7D000 0 0 lpc2000_v2 0 14765 calc_checksum
+flash bank lpc2000 0x0 0x7D000 0 0 0 lpc2000_v2 12000 calc_checksum
+arm7_9 swbkpts enable
+# For more information about the configuration files, take a look at:
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
--- /dev/null
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+#interface
+interface ft2232
+ft2232_device_desc "Olimex OpenOCD JTAG"
+ft2232_layout "olimex-jtag"
+ft2232_vid_pid 0x15BA 0x0003
+jtag_speed 3
+#use combined on interfaces or targets that can't set TRST/SRST separately
+#reset_config trst_and_srst separate
+reset_config trst_and_srst srst_pulls_trst
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+#target configuration
+daemon_startup reset
+#target <type> <startup mode>
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
+target arm7tdmi little run_and_init 0 arm7tdmi-s_r4
+run_and_halt_time 0 30
+target_script 0 reset oocd_flash_lpc2148.script
+working_area 0 0x40000000 0x40000 nobackup
+#flash configuration
+#flash bank lpc2000 0x0 0x7D000 0 0 lpc2000_v2 0 14765 calc_checksum
+flash bank lpc2000 0x0 0x7D000 0 0 0 lpc2000_v2 12000 calc_checksum
+arm7_9 swbkpts enable
+# For more information about the configuration files, take a look at:
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
// Yuck. Don't like this here, but what the heck...
//
#if !defined CFG_CONSOLE_USB && !defined CFG_CONSOLE_UART0 && !defined CFG_CONSOLE_UART1
-#error "Must define CFG_CONSOLE_USB, CFG_CONSOLE_UART0 or CFG_CONSOLE_UART1
+#error "Must define CFG_CONSOLE_USB, CFG_CONSOLE_UART0 or CFG_CONSOLE_UART1"
#endif
#if defined CFG_CONSOLE_USB && (defined CFG_CONSOLE_UART0 || defined CFG_CONSOLE_UART1)