From 3770a5f527cb6d519ce22fe91e0cc4078bf72661 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Sat, 18 Feb 2017 22:53:03 -0800 Subject: [PATCH] altos/stmf0: Complain if the SPI configuration isn't complete If the pin usage values SPI_1_PA5_PA6_PA7 or SPI_1_PB3_PB4_PB5 aren't defined, then the speed values for the pins aren't going to get set correctly, which results in erratic SPI behaviour. Signed-off-by: Keith Packard --- src/stmf0/ao_spi_stm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/stmf0/ao_spi_stm.c b/src/stmf0/ao_spi_stm.c index 0448ad8c..5e76d6c3 100644 --- a/src/stmf0/ao_spi_stm.c +++ b/src/stmf0/ao_spi_stm.c @@ -536,12 +536,18 @@ void ao_spi_init(void) { #if HAS_SPI_1 +#ifndef SPI_1_PA5_PA6_PA7 +#error SPI_1_PA5_PA6_PA7 undefined +#endif # if SPI_1_PA5_PA6_PA7 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPAEN); stm_ospeedr_set(&stm_gpioa, 5, SPI_1_OSPEEDR); stm_ospeedr_set(&stm_gpioa, 6, SPI_1_OSPEEDR); stm_ospeedr_set(&stm_gpioa, 7, SPI_1_OSPEEDR); # endif +# ifndef SPI_1_PB3_PB4_PB5 +# error SPI_1_PB3_PB4_PB5 undefined +# endif # if SPI_1_PB3_PB4_PB5 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPBEN); stm_ospeedr_set(&stm_gpiob, 3, SPI_1_OSPEEDR); -- 2.30.2