From: Keith Packard <keithp@keithp.com>
Date: Fri, 20 May 2022 23:20:32 +0000 (-0700)
Subject: lpc: Make beeper configurable
X-Git-Tag: 1.9.11~1^2~5
X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=commitdiff_plain;h=d95995ec702a891884f353cf2078d7ed3261c5c2;hp=03753fbddfbc82f18b2e4527a2e3afc58ea972f4

lpc: Make beeper configurable

Need to set the port, pin, timer and channel values

Signed-off-by: Keith Packard <keithp@keithp.com>
---

diff --git a/src/lpc/ao_beep_lpc.c b/src/lpc/ao_beep_lpc.c
index 13aa3374..8cbd3ed2 100644
--- a/src/lpc/ao_beep_lpc.c
+++ b/src/lpc/ao_beep_lpc.c
@@ -18,42 +18,64 @@
 
 #include "ao.h"
 
+#define _cat2(a,b) a##b
+#define cat2(a,b) _cat2(a,b)
+#define _cat4(a,b,c,d) a##b##c##d
+#define cat4(a,b,c,d) _cat4(a,b,c,d)
+#define _cat8(a,b,c,d,e,f,g,h) a##b##c##d##e##f##g##h
+#define cat8(a,b,c,d,e,f,g,h) _cat8(a,b,c,d,e,f,g,h)
+
+#ifndef AO_LPC_BEEP_TIMER
+#define AO_LPC_BEEP_TIMER 1
+#define AO_LPC_BEEP_CHANNEL 1
+#define AO_LPC_BEEP_PORT	0
+#define AO_LPC_BEEP_PIN		14
+#endif
+
+#define AO_LPC_CT_BEEP 		cat2(lpc_ct32b, AO_LPC_BEEP_TIMER)
+#define AO_LPC_CT_BEEP_CLKCTRL	cat2(LPC_SCB_SYSAHBCLKCTRL_CT32B, AO_LPC_BEEP_TIMER)
+#define AO_LPC_CT_BEEP_EMR	cat2(LPC_CT32B_EMR_EMC, AO_LPC_BEEP_CHANNEL)
+#define AO_LPC_CT_BEEP_MR	AO_LPC_BEEP_CHANNEL
+#define AO_LPC_CT_BEEP_PWMC	cat2(LPC_CT32B_PWMC_PWMEN, AO_LPC_BEEP_CHANNEL)
+#define AO_LPC_CT_BEEP_IOCONF	cat4(pio,AO_LPC_BEEP_PORT,_,AO_LPC_BEEP_PIN)
+#define AO_LPC_CT_BEEP_FUNC	cat8(LPC_IOCONF_FUNC_PIO,AO_LPC_BEEP_PORT,_,AO_LPC_BEEP_PIN,_CT32B,AO_LPC_BEEP_TIMER,_MAT,AO_LPC_BEEP_CHANNEL)
+
 void
 ao_beep(uint8_t beep)
 {
 	if (beep == 0) {
-		lpc_ct32b1.tcr = ((0 << LPC_CT32B_TCR_CEN) |
+		AO_LPC_CT_BEEP.tcr = ((0 << LPC_CT32B_TCR_CEN) |
 				  (1 << LPC_CT32B_TCR_CRST));
-		lpc_scb.sysahbclkctrl &= ~(1UL << LPC_SCB_SYSAHBCLKCTRL_CT32B1);
+		lpc_scb.sysahbclkctrl &= ~(1UL << AO_LPC_CT_BEEP_CLKCTRL);
 	} else {
-		lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_CT32B1);
+		lpc_scb.sysahbclkctrl |= (1UL << AO_LPC_CT_BEEP_CLKCTRL);
 
 		/* Set prescaler to match cc1111 clocks
 		 */
-		lpc_ct32b1.pr = AO_LPC_SYSCLK / 750000 - 1;
+		AO_LPC_CT_BEEP.pr = AO_LPC_SYSCLK / 750000 - 1;
 
 		/* Write the desired data in the match registers */
 
 		/* Reset after two time units */
-		lpc_ct32b1.mr[0] = beep << 1;
+		AO_LPC_CT_BEEP.mr[0] = beep << 1;
 
 		/* PWM width is half of that */
-		lpc_ct32b1.mr[1] = beep;
+		AO_LPC_CT_BEEP.mr[AO_LPC_CT_BEEP_MR] = beep;
 
-		/* Flip output 1 on PWM match */
-		lpc_ct32b1.emr = (LPC_CT32B_EMR_EMC_TOGGLE << LPC_CT32B_EMR_EMC1);
+		/* Flip output on PWM match */
+		AO_LPC_CT_BEEP.emr = (LPC_CT32B_EMR_EMC_TOGGLE << AO_LPC_CT_BEEP_EMR);
 
 		/* Reset on match 0 */
-		lpc_ct32b1.mcr = (1 << LPC_CT32B_MCR_MR0R);
+		AO_LPC_CT_BEEP.mcr = (1 << LPC_CT32B_MCR_MR0R);
+
+		/* PWM on match */
+		AO_LPC_CT_BEEP.pwmc = (1 << AO_LPC_CT_BEEP_PWMC);
 
-		/* PWM on match 1 */
-		lpc_ct32b1.pwmc = (1 << LPC_CT32B_PWMC_PWMEN1);
-		
 		/* timer mode */
-		lpc_ct32b1.ctcr = 0;
+		AO_LPC_CT_BEEP.ctcr = 0;
 
 		/* And turn the timer on */
-		lpc_ct32b1.tcr = ((1 << LPC_CT32B_TCR_CEN) |
+		AO_LPC_CT_BEEP.tcr = ((1 << LPC_CT32B_TCR_CEN) |
 				  (0 << LPC_CT32B_TCR_CRST));
 	}
 }
@@ -73,16 +95,16 @@ ao_beep_init(void)
 	 * which is on pin pio0_14
 	 */
 
-	lpc_ioconf.pio0_14 = ((LPC_IOCONF_FUNC_PIO0_14_CT32B1_MAT1 << LPC_IOCONF_FUNC) |
+	lpc_ioconf.AO_LPC_CT_BEEP_IOCONF = ((AO_LPC_CT_BEEP_FUNC << LPC_IOCONF_FUNC) |
 			      (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) |
 			      (0 << LPC_IOCONF_HYS) |
 			      (0 << LPC_IOCONF_INV) |
 			      (1 << LPC_IOCONF_ADMODE) |
 			      (0 << LPC_IOCONF_OD));
 
-	lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_CT32B1);
+	lpc_scb.sysahbclkctrl |= (1 << AO_LPC_CT_BEEP_CLKCTRL);
 
 	/* Disable the counter and reset the value */
-	lpc_ct32b1.tcr = ((0 << LPC_CT32B_TCR_CEN) |
+	AO_LPC_CT_BEEP.tcr = ((0 << LPC_CT32B_TCR_CEN) |
 			  (1 << LPC_CT32B_TCR_CRST));
 }