From: Keith Packard Date: Mon, 31 Dec 2012 22:22:37 +0000 (-0800) Subject: Allow CC1120 to sit on other SPI busses X-Git-Tag: 1.1.9.3~8^2~9^2~36 X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=commitdiff_plain;h=434e946aa79b5a7e60799f996887bc6467889b92;hp=2bd6aca54fc465995d6985c8799cd0d016c9a543 Allow CC1120 to sit on other SPI busses Reading the incoming data bypasses the SPI API and touches the SPI data register directly; which port that is needs to be specified in the pins file Signed-off-by: Keith Packard --- diff --git a/src/drivers/ao_cc1120.c b/src/drivers/ao_cc1120.c index 63d2f955..d9b2e5bf 100644 --- a/src/drivers/ao_cc1120.c +++ b/src/drivers/ao_cc1120.c @@ -834,8 +834,8 @@ ao_radio_rx_isr(void) { uint8_t d; - d = stm_spi2.dr; - stm_spi2.dr = 0; + d = AO_CC1120_SPI.dr; + AO_CC1120_SPI.dr = 0; if (rx_ignore == 0) { if (rx_data_cur >= rx_data_count) ao_exti_disable(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN); @@ -922,10 +922,10 @@ ao_radio_recv(__xdata void *d, uint8_t size) ao_radio_wake = 0; ao_radio_mcu_wake = 0; - stm_spi2.cr2 = 0; + AO_CC1120_SPI.cr2 = 0; /* clear any RXNE */ - (void) stm_spi2.dr; + (void) AO_CC1120_SPI.dr; /* Have the radio signal when the preamble quality goes high */ ao_radio_reg_write(AO_CC1120_INT_GPIO_IOCFG, CC1120_IOCFG_GPIO_CFG_PQT_REACHED); diff --git a/src/megadongle-v0.1/ao_pins.h b/src/megadongle-v0.1/ao_pins.h index 5a5eaa30..c766a48c 100644 --- a/src/megadongle-v0.1/ao_pins.h +++ b/src/megadongle-v0.1/ao_pins.h @@ -135,9 +135,10 @@ #define AO_CC1120_SPI_CS_PORT (&stm_gpioa) #define AO_CC1120_SPI_CS_PIN 0 #define AO_CC1120_SPI_BUS AO_SPI_2_PB13_PB14_PB15 +#define AO_CC1120_SPI stm_spi2 #define AO_CC1120_INT_PORT (&stm_gpioc) -#define AO_CC1120_INT_PIN 14 +#define AO_CC1120_INT_PIN 13 #define AO_CC1120_MCU_WAKEUP_PORT (&stm_gpioc) #define AO_CC1120_MCU_WAKEUP_PIN (0) diff --git a/src/megametrum-v0.1/ao_pins.h b/src/megametrum-v0.1/ao_pins.h index b1a70ea2..64da41a9 100644 --- a/src/megametrum-v0.1/ao_pins.h +++ b/src/megametrum-v0.1/ao_pins.h @@ -281,6 +281,7 @@ struct ao_adc { #define AO_CC1120_SPI_CS_PORT (&stm_gpioc) #define AO_CC1120_SPI_CS_PIN 5 #define AO_CC1120_SPI_BUS AO_SPI_2_PB13_PB14_PB15 +#define AO_CC1120_SPI stm_spi2 #define AO_CC1120_INT_PORT (&stm_gpioc) #define AO_CC1120_INT_PIN 14