From: Keith Packard <keithp@keithp.com>
Date: Wed, 25 Mar 2009 00:04:45 +0000 (-0700)
Subject: Adjust clock/data phase for spi test
X-Git-Tag: 0.5~58^2~50
X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=commitdiff_plain;h=3429016d1359ec650993d2fb0596184e3f717871

Adjust clock/data phase for spi test
---

diff --git a/target/ee/ee.c b/target/ee/ee.c
index 221d5979..83dd57eb 100644
--- a/target/ee/ee.c
+++ b/target/ee/ee.c
@@ -73,6 +73,7 @@ delay (unsigned char n)
 void
 cs(uint8_t b)
 {
+	SCK = 0;
 	CS = b;
 	delay(1);
 }
@@ -81,10 +82,10 @@ void
 out_bit(uint8_t b)
 {
 	MOSI = b;
+	delay(1);
 	SCK = 1;
 	delay(1);
 	SCK = 0;
-	delay(1);
 }
 
 void
@@ -103,11 +104,12 @@ uint8_t
 in_bit(void)
 {
 	uint8_t	b;
+	
+	delay(1);
 	SCK = 1;
 	delay(1);
 	b = MISO;
 	SCK = 0;
-	delay(1);
 	return b;
 }