altos: Create a 32-bit 1MHz timer for use in profiling execution

This provides a simple method for getting high-resolution timer data
to use in performance tuning code. It's not used by default anywhere.

Signed-off-by: Keith Packard <keithp@keithp.com>

diff --git a/src/stm/ao_profile.c b/src/stm/ao_profile.c
new file mode 100644 (file)
index 0000000..149ca29
--- /dev/null
+++ b/src/stm/ao_profile.c
@@ -0,0 +1,112 @@
+/*
+ * Copyright © 2012 Keith Packard <keithp@keithp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ */
+
+#include <ao.h>
+#include <ao_profile.h>
+
+static void ao_profile_test(void)
+{
+       uint8_t i;
+       uint32_t        ticks[20];
+
+       for (i = 0; i < 20; i++) {
+               ticks[i] = ao_profile_tick();
+               ao_delay(0);
+       }
+       for (i = 0; i < 19; i++)
+               printf ("%d\n", ticks[i+1] - ticks[i]);
+}
+
+static const struct ao_cmds ao_profile_cmds[] = {
+       { ao_profile_test,      "P\0Test profile counter" },
+       { 0, NULL }
+};
+
+void ao_profile_init(void)
+{
+       /* Turn on timer 2 and 4 */
+       stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_TIM2EN) |
+               (1 << STM_RCC_APB1ENR_TIM4EN);
+
+       /* disable timers */
+       stm_tim4.cr1 = 0;
+       stm_tim2.cr1 = 0;
+
+       /* tim4 is master */
+
+
+       stm_tim4.cr2 = ((0 << STM_TIM234_CR2_TI1S) |
+                       (STM_TIM234_CR2_MMS_UPDATE << STM_TIM234_CR2_MMS) |
+                       (0 << STM_TIM234_CR2_CCDS));
+
+       stm_tim4.smcr = ((0 << STM_TIM234_SMCR_ETP) |
+                        (0 << STM_TIM234_SMCR_ECE) |
+                        (STM_TIM234_SMCR_ETPS_OFF << STM_TIM234_SMCR_ETPS) |
+                        (STM_TIM234_SMCR_ETF_NONE << STM_TIM234_SMCR_ETF) |
+                        (0 << STM_TIM234_SMCR_MSM) |
+                        (STM_TIM234_SMCR_TS_ITR3 << STM_TIM234_SMCR_TS) |
+                        (0 << STM_TIM234_SMCR_OCCS) |
+                        (STM_TIM234_SMCR_SMS_DISABLE << STM_TIM234_SMCR_SMS));
+
+       stm_tim4.dier = 0;
+       stm_tim4.sr = 0;
+
+       stm_tim4.psc = 31;
+       stm_tim4.cnt = 0;
+       stm_tim4.arr = 0xffff;
+
+       /* tim2 is slaved to tim4 */
+
+       stm_tim2.cr2 = ((0 << STM_TIM234_CR2_TI1S) |
+                       (STM_TIM234_CR2_MMS_ENABLE << STM_TIM234_CR2_MMS) |
+                       (0 << STM_TIM234_CR2_CCDS));
+       stm_tim2.smcr = ((0 << STM_TIM234_SMCR_ETP) |
+                        (0 << STM_TIM234_SMCR_ECE) |
+                        (STM_TIM234_SMCR_ETPS_OFF << STM_TIM234_SMCR_ETPS) |
+                        (STM_TIM234_SMCR_ETF_NONE << STM_TIM234_SMCR_ETF) |
+                        (0 << STM_TIM234_SMCR_MSM) |
+                        (STM_TIM234_SMCR_TS_ITR3 << STM_TIM234_SMCR_TS) |
+                        (0 << STM_TIM234_SMCR_OCCS) |
+                        (STM_TIM234_SMCR_SMS_EXTERNAL_CLOCK << STM_TIM234_SMCR_SMS));
+       stm_tim2.dier = 0;
+       stm_tim2.sr = 0;
+       stm_tim2.psc = 0;
+       stm_tim2.cnt = 0;
+       stm_tim2.arr = 0xffff;
+
+       /* Start your timers */
+
+       stm_tim2.cr1 = ((STM_TIM234_CR1_CKD_1 << STM_TIM234_CR1_CKD) |
+                       (0 << STM_TIM234_CR1_ARPE) |
+                       (STM_TIM234_CR1_CMS_EDGE | STM_TIM234_CR1_CMS) |
+                       (STM_TIM234_CR1_DIR_UP << STM_TIM234_CR1_DIR) |
+                       (0 << STM_TIM234_CR1_OPM) |
+                       (0 << STM_TIM234_CR1_URS) |
+                       (0 << STM_TIM234_CR1_UDIS) |
+                       (1 << STM_TIM234_CR1_CEN));
+
+       stm_tim4.cr1 = ((STM_TIM234_CR1_CKD_1 << STM_TIM234_CR1_CKD) |
+                       (0 << STM_TIM234_CR1_ARPE) |
+                       (STM_TIM234_CR1_CMS_EDGE | STM_TIM234_CR1_CMS) |
+                       (STM_TIM234_CR1_DIR_UP << STM_TIM234_CR1_DIR) |
+                       (0 << STM_TIM234_CR1_OPM) |
+                       (1 << STM_TIM234_CR1_URS) |
+                       (0 << STM_TIM234_CR1_UDIS) |
+                       (1 << STM_TIM234_CR1_CEN));
+
+       ao_cmd_register(&ao_profile_cmds[0]);
+}

diff --git a/src/stm/ao_profile.h b/src/stm/ao_profile.h
new file mode 100644 (file)
index 0000000..f7dd029
--- /dev/null
+++ b/src/stm/ao_profile.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright © 2012 Keith Packard <keithp@keithp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ */
+
+#ifndef _AO_PROFILE_H_
+#define _AO_PROFILE_H_
+
+void   ao_profile_init();
+
+static uint32_t inline ao_profile_tick(void) {
+       uint16_t        hi, lo, second_hi;
+
+       do {
+               hi = stm_tim2.cnt;
+               lo = stm_tim4.cnt;
+               second_hi = stm_tim2.cnt;
+       } while (hi != second_hi);
+       return ((uint32_t) hi << 16) | lo;
+}
+
+#endif

diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h
index cb66df6c9bdb440d4e745ba5b34aa0abf7cd752e..60f0b6d05370beec61a9740e012caf7cf6816dd3 100644 (file)
--- a/src/stm/stm32l.h
+++ b/src/stm/stm32l.h
@@ -1331,6 +1331,8 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_CR1_CMS_CENTER_3   3
 #define  STM_TIM234_CR1_CMS_MASK       3
 #define STM_TIM234_CR1_DIR     4
+#define  STM_TIM234_CR1_DIR_UP         0
+#define  STM_TIM234_CR1_DIR_DOWN       1
 #define STM_TIM234_CR1_OPM     3
 #define STM_TIM234_CR1_URS     2
 #define STM_TIM234_CR1_UDIS    1
@@ -1377,10 +1379,10 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_SMCR_ETF_MASK              15
 #define STM_TIM234_SMCR_MSM    7
 #define STM_TIM234_SMCR_TS     4
-#define  STM_TIM234_SMCR_TS_TR0                        0
-#define  STM_TIM234_SMCR_TS_TR1                        1
-#define  STM_TIM234_SMCR_TS_TR2                        2
-#define  STM_TIM234_SMCR_TS_TR3                        3
+#define  STM_TIM234_SMCR_TS_ITR0               0
+#define  STM_TIM234_SMCR_TS_ITR1               1
+#define  STM_TIM234_SMCR_TS_ITR2               2
+#define  STM_TIM234_SMCR_TS_ITR3               3
 #define  STM_TIM234_SMCR_TS_TI1F_ED            4
 #define  STM_TIM234_SMCR_TS_TI1FP1             5
 #define  STM_TIM234_SMCR_TS_TI2FP2             6