altos/cc1111: Adjust receive parameters to improve sensitivity
authorKeith Packard <keithp@keithp.com>
Thu, 3 Jul 2014 05:30:23 +0000 (22:30 -0700)
committerKeith Packard <keithp@keithp.com>
Sat, 5 Jul 2014 07:38:10 +0000 (00:38 -0700)
This removes the packet quality test and carrier sense tests when
deciding whether to start decoding a packet. This lets more bad
packets through, but the CRC check catches those and now we're
regularly receiving packets down to -110 or even -112 dBm. Before this
change, we'd rarely see packets as low as -105dBm

Signed-off-by: Keith Packard <keithp@keithp.com>
src/cc1111/ao_pins.h
src/cc1111/ao_radio.c
src/cc1111/cc1111.h
src/telebt-v1.0/ao_pins.h

index b40acbbd5495f105ffca582ddbf0738ee1a78f33..2d524188679a211d3bc1af7e1f0b8327144edccf 100644 (file)
        #define HAS_RSSI                1
        #define HAS_AES                 0
        #define HAS_TELEMETRY           0
+       #define AO_RADIO_REG_TEST       1
 #endif
 
 #if defined(TELEMINI_V_1_0)
        #define HAS_RSSI                0
        #define HAS_AES                 0
        #define HAS_TELEMETRY           0
+       #define AO_RADIO_REG_TEST       1
 #endif
 
 #if defined(TELEBT_V_0_1)
        #define HAS_RSSI                0
        #define HAS_AES                 0
        #define HAS_TELEMETRY           0
+       #define AO_RADIO_REG_TEST       1
 #endif
 
 #if defined(TELELAUNCH_V_0_1)
index 190647ce0dbe432f6a0b4ee5f8428b686110cf69..fbdf7762633c65a4b382ef23490b1ad77708a945 100644 (file)
@@ -126,9 +126,9 @@ static __code uint8_t radio_setup[] = {
                                 (CHANBW_M << RF_MDMCFG4_CHANBW_M_SHIFT) |
                                 (DRATE_E << RF_MDMCFG4_DRATE_E_SHIFT)),
        RF_MDMCFG3_OFF,         (DRATE_M << RF_MDMCFG3_DRATE_M_SHIFT),
-       RF_MDMCFG2_OFF,         (RF_MDMCFG2_DEM_DCFILT_OFF |
+       RF_MDMCFG2_OFF,         (RF_MDMCFG2_DEM_DCFILT_ON |
                                 RF_MDMCFG2_MOD_FORMAT_GFSK |
-                                RF_MDMCFG2_SYNC_MODE_15_16_THRES),
+                                RF_MDMCFG2_SYNC_MODE_15_16),
        RF_MDMCFG1_OFF,         (RF_MDMCFG1_FEC_EN |
                                 RF_MDMCFG1_NUM_PREAMBLE_4 |
                                 (2 << RF_MDMCFG1_CHANSPC_E_SHIFT)),
@@ -155,8 +155,8 @@ static __code uint8_t radio_setup[] = {
        RF_FSCAL1_OFF,          0x00,
        RF_FSCAL0_OFF,          0x1F,
 
-       RF_TEST2_OFF,           0x88,
-       RF_TEST1_OFF,           0x31,
+       RF_TEST2_OFF,           RF_TEST2_RX_LOW_DATA_RATE_MAGIC,
+       RF_TEST1_OFF,           RF_TEST1_RX_LOW_DATA_RATE_MAGIC,
        RF_TEST0_OFF,           0x09,
 
        /* default sync values */
@@ -187,10 +187,16 @@ static __code uint8_t radio_setup[] = {
                                 RF_BSCFG_BS_POST_KI_PRE_KI|
                                 RF_BSCFG_BS_POST_KP_PRE_KP|
                                 RF_BSCFG_BS_LIMIT_0),
-       RF_AGCCTRL2_OFF,        0x03,
-       RF_AGCCTRL1_OFF,        0x40,
-       RF_AGCCTRL0_OFF,        0x91,
-
+       RF_AGCCTRL2_OFF,        (RF_AGCCTRL2_MAX_DVGA_GAIN_ALL|
+                                RF_AGCCTRL2_MAX_LNA_GAIN_0|
+                                RF_AGCCTRL2_MAGN_TARGET_33dB),
+       RF_AGCCTRL1_OFF,        (RF_AGCCTRL1_AGC_LNA_PRIORITY_0 |
+                                RF_AGCCTRL1_CARRIER_SENSE_REL_THR_DISABLE |
+                                RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_0DB),
+       RF_AGCCTRL0_OFF,        (RF_AGCCTRL0_HYST_LEVEL_NONE |
+                                RF_AGCCTRL0_WAIT_TIME_8 |
+                                RF_AGCCTRL0_AGC_FREEZE_NORMAL |
+                                RF_AGCCTRL0_FILTER_LENGTH_8),
        RF_IOCFG2_OFF,          0x00,
        RF_IOCFG1_OFF,          0x00,
        RF_IOCFG0_OFF,          0x00,
@@ -212,7 +218,7 @@ static __code uint8_t rdf_setup[] = {
                                 (RDF_DEVIATION_M << RF_DEVIATN_DEVIATION_M_SHIFT)),
 
        /* packet length is set in-line */
-       RF_PKTCTRL1_OFF,        ((1 << PKTCTRL1_PQT_SHIFT)|
+       RF_PKTCTRL1_OFF,        ((0 << PKTCTRL1_PQT_SHIFT)|
                                 PKTCTRL1_ADR_CHK_NONE),
        RF_PKTCTRL0_OFF,        (RF_PKTCTRL0_PKT_FORMAT_NORMAL|
                                 RF_PKTCTRL0_LENGTH_CONFIG_FIXED),
@@ -223,9 +229,9 @@ static __code uint8_t fixed_pkt_setup[] = {
                                 (CHANBW_M << RF_MDMCFG4_CHANBW_M_SHIFT) |
                                 (DRATE_E << RF_MDMCFG4_DRATE_E_SHIFT)),
        RF_MDMCFG3_OFF,         (DRATE_M << RF_MDMCFG3_DRATE_M_SHIFT),
-       RF_MDMCFG2_OFF,         (RF_MDMCFG2_DEM_DCFILT_OFF |
+       RF_MDMCFG2_OFF,         (RF_MDMCFG2_DEM_DCFILT_ON |
                                 RF_MDMCFG2_MOD_FORMAT_GFSK |
-                                RF_MDMCFG2_SYNC_MODE_15_16_THRES),
+                                RF_MDMCFG2_SYNC_MODE_15_16),
        RF_MDMCFG1_OFF,         (RF_MDMCFG1_FEC_EN |
                                 RF_MDMCFG1_NUM_PREAMBLE_4 |
                                 (2 << RF_MDMCFG1_CHANSPC_E_SHIFT)),
@@ -551,8 +557,31 @@ ao_radio_test_cmd(void)
                ao_radio_test(0);
 }
 
+#if AO_RADIO_REG_TEST
+static void
+ao_radio_set_reg(void)
+{
+       uint8_t offset;
+       ao_cmd_hex();
+       offset = ao_cmd_lex_i;
+       if (ao_cmd_status != ao_cmd_success)
+               return;
+       ao_cmd_hex();
+       printf("RF[%x] %x", offset, RF[offset]);
+       if (ao_cmd_status == ao_cmd_success) {
+               RF[offset] = ao_cmd_lex_i;
+               printf (" -> %x", RF[offset]);
+       }
+       ao_cmd_status = ao_cmd_success;
+       printf("\n");
+}
+#endif
+
 __code struct ao_cmds ao_radio_cmds[] = {
        { ao_radio_test_cmd,    "C <1 start, 0 stop, none both>\0Radio carrier test" },
+#if AO_RADIO_REG_TEST
+       { ao_radio_set_reg,     "V <offset> <value>\0Set radio register" },
+#endif
        { 0,    NULL },
 };
 
index 80d3fb70b7d2219f5218b74b4de2bc2a2e4c3080..ac1e71c971028fc33ac3a822b4660b6c45088ba7 100644 (file)
@@ -1165,12 +1165,73 @@ __xdata __at (0xdf16) uint8_t RF_BSCFG;
 __xdata __at (0xdf17) uint8_t RF_AGCCTRL2;
 #define RF_AGCCTRL2_OFF        0x17
 
+#define RF_AGCCTRL2_MAX_DVGA_GAIN_ALL          (0 << 6)
+#define RF_AGCCTRL2_MAX_DVGA_GAIN_BUT_1                (1 << 6)
+#define RF_AGCCTRL2_MAX_DVGA_GAIN_BUT_2                (2 << 6)
+#define RF_AGCCTRL2_MAX_DVGA_GAIN_BUT_3                (3 << 6)
+#define RF_AGCCTRL2_MAX_LNA_GAIN_0             (0 << 3)
+#define RF_AGCCTRL2_MAX_LNA_GAIN_2_6           (1 << 3)
+#define RF_AGCCTRL2_MAX_LNA_GAIN_6_1           (2 << 3)
+#define RF_AGCCTRL2_MAX_LNA_GAIN_7_4           (3 << 3)
+#define RF_AGCCTRL2_MAX_LNA_GAIN_9_2           (4 << 3)
+#define RF_AGCCTRL2_MAX_LNA_GAIN_11_5          (5 << 3)
+#define RF_AGCCTRL2_MAX_LNA_GAIN_14_6          (6 << 3)
+#define RF_AGCCTRL2_MAX_LNA_GAIN_17_1          (7 << 3)
+#define RF_AGCCTRL2_MAGN_TARGET_24dB           (0 << 0)
+#define RF_AGCCTRL2_MAGN_TARGET_27dB           (1 << 0)
+#define RF_AGCCTRL2_MAGN_TARGET_30dB           (2 << 0)
+#define RF_AGCCTRL2_MAGN_TARGET_33dB           (3 << 0)
+#define RF_AGCCTRL2_MAGN_TARGET_36dB           (4 << 0)
+#define RF_AGCCTRL2_MAGN_TARGET_38dB           (5 << 0)
+#define RF_AGCCTRL2_MAGN_TARGET_40dB           (6 << 0)
+#define RF_AGCCTRL2_MAGN_TARGET_42dB           (7 << 0)
+
 __xdata __at (0xdf18) uint8_t RF_AGCCTRL1;
 #define RF_AGCCTRL1_OFF        0x18
 
+#define RF_AGCCTRL1_AGC_LNA_PRIORITY_0         (0 << 6)
+#define RF_AGCCTRL1_AGC_LNA_PRIORITY_1         (1 << 6)
+#define RF_AGCCTRL1_CARRIER_SENSE_REL_THR_DISABLE      (0 << 4)
+#define RF_AGCCTRL1_CARRIER_SENSE_REL_THR_6DB          (1 << 4)
+#define RF_AGCCTRL1_CARRIER_SENSE_REL_THR_10DB         (2 << 4)
+#define RF_AGCCTRL1_CARRIER_SENSE_REL_THR_14DB         (3 << 4)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_DISABLE      (0x8 << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_7DB_BELOW    (0x9 << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_6DB_BELOW    (0xa << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_5DB_BELOW    (0xb << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_4DB_BELOW    (0xc << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_3DB_BELOW    (0xd << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_2DB_BELOW    (0xe << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_1DB_BELOW    (0xf << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_0DB          (0x0 << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_1DB_ABOVE    (0x1 << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_2DB_ABOVE    (0x2 << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_3DB_ABOVE    (0x3 << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_4DB_ABOVE    (0x4 << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_5DB_ABOVE    (0x5 << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_6DB_ABOVE    (0x6 << 0)
+#define RF_AGCCTRL1_CARRIER_SENSE_ABS_THR_7DB_ABOVE    (0x7 << 0)
+
 __xdata __at (0xdf19) uint8_t RF_AGCCTRL0;
 #define RF_AGCCTRL0_OFF        0x19
 
+#define RF_AGCCTRL0_HYST_LEVEL_NONE            (0 << 6)
+#define RF_AGCCTRL0_HYST_LEVEL_LOW             (1 << 6)
+#define RF_AGCCTRL0_HYST_LEVEL_MEDIUM          (2 << 6)
+#define RF_AGCCTRL0_HYST_LEVEL_HIGH            (3 << 6)
+#define RF_AGCCTRL0_WAIT_TIME_8                        (0 << 4)
+#define RF_AGCCTRL0_WAIT_TIME_16               (1 << 4)
+#define RF_AGCCTRL0_WAIT_TIME_24               (2 << 4)
+#define RF_AGCCTRL0_WAIT_TIME_32               (3 << 4)
+#define RF_AGCCTRL0_AGC_FREEZE_NORMAL          (0 << 2)
+#define RF_AGCCTRL0_AGC_FREEZE_SYNC            (1 << 2)
+#define RF_AGCCTRL0_AGC_FREEZE_MANUAL_ANALOG   (2 << 2)
+#define RF_AGCCTRL0_AGC_FREEZE_MANUAL_BOTH     (3 << 2)
+#define RF_AGCCTRL0_FILTER_LENGTH_8            (0 << 0)
+#define RF_AGCCTRL0_FILTER_LENGTH_16           (1 << 0)
+#define RF_AGCCTRL0_FILTER_LENGTH_32           (2 << 0)
+#define RF_AGCCTRL0_FILTER_LENGTH_64           (3 << 0)
+
 __xdata __at (0xdf1a) uint8_t RF_FREND1;
 #define RF_FREND1_OFF  0x1a
 
index b5562573b67723ca7017afe156cec2626bfcde8c..4181ef35a782d0c0ae58f4810c3a16089853aae9 100644 (file)
@@ -49,6 +49,7 @@
 #define HAS_MONITOR            1
 #define LEGACY_MONITOR         0
 #define HAS_TELEMETRY          0
+#define AO_RADIO_REG_TEST      1
 
 #define HAS_ADC                        1
 #define AO_PAD_ADC_BATT                0