Timer 3 working with slower clock and all 16 bits.

diff --git a/src/avr/ao_pwmin.c b/src/avr/ao_pwmin.c
index 4d96404dca1b07af8850cfa651506e09ec92910d..edcb163641cea8a1aa28db542e787d4f9650f892 100644 (file)
--- a/src/avr/ao_pwmin.c
+++ b/src/avr/ao_pwmin.c
@@ -25,6 +25,8 @@
  * project payload developed at Challenger Middle School.  
  */
 
  * project payload developed at Challenger Middle School.  
  */
 

+volatile __data uint16_t ao_tick3_count;
+

 static void
 ao_pwmin_display(void) __reentrant
 {
 static void
 ao_pwmin_display(void) __reentrant
 {


@@ -32,10 +34,19 @@ ao_pwmin_display(void) __reentrant
        uint8_t hi = TCNT1H;
        uint16_t value = (hi <<8) | lo;
 
        uint8_t hi = TCNT1H;
        uint16_t value = (hi <<8) | lo;
 

+       uint8_t lo3 = TCNT3L; 
+       uint8_t hi3 = TCNT3H;
+       uint16_t value3 = (hi3 <<8) | lo3;
+

        /* now display the value we read */
        /* now display the value we read */

-       printf("timer 1: %5u",  value);
+       printf("timer 1: %5u %2x %2x\n", value, hi, lo);
+       printf("timer 3: %5u %2x %2x\n", value3, hi3, lo3);

 
 }
 
 }

+ISR(TIMER3_COMPA_vect)
+{
+        ++ao_tick3_count;
+}

 
 __code struct ao_cmds ao_pwmin_cmds[] = {
        { ao_pwmin_display,     "p\0PWM input" },
 
 __code struct ao_cmds ao_pwmin_cmds[] = {
        { ao_pwmin_display,     "p\0PWM input" },


@@ -46,6 +57,18 @@ void
 ao_pwmin_init(void)
 {
        /* do hardware setup here */
 ao_pwmin_init(void)
 {
        /* do hardware setup here */

+       TCCR3A = ((0 << WGM31) |        /* normal mode, OCR3A */
+                  (0 << WGM30));        /* normal mode, OCR3A */
+        TCCR3B = ((0 << ICNC3) |        /* no input capture noise canceler */
+                  (0 << ICES3) |        /* input capture on falling edge (don't care) */
+                  (0 << WGM33) |        /* normal mode, OCR3A */
+                  (0 << WGM32) |        /* normal mode, OCR3A */
+                  (4 << CS30));         /* clk/256 from prescaler */
+
+        OCR3A = 1250;                   /* 8MHz clock */
+
+        TIMSK3 = (1 << OCIE3A);         /* Interrupt on compare match */
+

                /* set the spike filter bit in the TCCR3B register */
 
        ao_cmd_register(&ao_pwmin_cmds[0]);
                /* set the spike filter bit in the TCCR3B register */
 
        ao_cmd_register(&ao_pwmin_cmds[0]);