X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fstmf0%2Fao_arch_funcs.h;h=a0c6e08876cbb012e350b18dc585e02346db9c7c;hp=ccfa3fc78d5dc4905a3e640d4058dbd11534bc7f;hb=4d4f018f22a0a9814e675a232b1c4239572bdd9a;hpb=cfb91ec7ef6ef485d813af96a0f206bb7a2204dd

diff --git a/src/stmf0/ao_arch_funcs.h b/src/stmf0/ao_arch_funcs.h
index ccfa3fc7..a0c6e088 100644
--- a/src/stmf0/ao_arch_funcs.h
+++ b/src/stmf0/ao_arch_funcs.h
@@ -3,7 +3,8 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -82,7 +83,57 @@ void
 ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index);
 
 void
-ao_spi_send_sync(void *block, uint16_t len, uint8_t spi_index);
+ao_spi_send_sync(const void *block, uint16_t len, uint8_t spi_index);
+
+void
+ao_spi_start_bytes(uint8_t spi_index);
+
+void
+ao_spi_stop_bytes(uint8_t spi_index);
+
+static inline void
+ao_spi_send_byte(uint8_t byte, uint8_t spi_index)
+{
+	struct stm_spi	*stm_spi;
+
+	switch (AO_SPI_INDEX(spi_index)) {
+	case 0:
+		stm_spi = &stm_spi1;
+		break;
+	case 1:
+		stm_spi = &stm_spi2;
+		break;
+	}
+
+	while (!(stm_spi->sr & (1 << STM_SPI_SR_TXE)))
+		;
+	stm_spi->dr = byte;
+	while (!(stm_spi->sr & (1 << STM_SPI_SR_RXNE)))
+		;
+	(void) stm_spi->dr;
+}
+
+static inline uint8_t
+ao_spi_recv_byte(uint8_t spi_index)
+{
+	struct stm_spi	*stm_spi;
+
+	switch (AO_SPI_INDEX(spi_index)) {
+	case 0:
+		stm_spi = &stm_spi1;
+		break;
+	case 1:
+		stm_spi = &stm_spi2;
+		break;
+	}
+
+	while (!(stm_spi->sr & (1 << STM_SPI_SR_TXE)))
+		;
+	stm_spi->dr = 0xff;
+	while (!(stm_spi->sr & (1 << STM_SPI_SR_RXNE)))
+		;
+	return stm_spi->dr;
+}
 
 void
 ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
@@ -117,13 +168,15 @@ ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t s
 		ao_spi_put(bus);		\
 	} while (0)
 
-#define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
-#define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
+#define ao_spi_get_bit(reg,bit,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
+#define ao_spi_put_bit(reg,bit,bus) ao_spi_put_mask(reg,(1<<bit),bus)
 
+#if AO_POWER_MANAGEMENT
 extern struct ao_power	ao_power_gpioa;
 extern struct ao_power	ao_power_gpiob;
 extern struct ao_power	ao_power_gpioc;
 extern struct ao_power	ao_power_gpiof;
+#endif
 
 static inline void ao_enable_port(struct stm_gpio *port)
 {
@@ -159,13 +212,13 @@ static inline void ao_disable_port(struct stm_gpio *port)
 	}
 }
 
-#define ao_gpio_set(port, bit, pin, v) stm_gpio_set(port, bit, v)
+#define ao_gpio_set(port, bit, v) stm_gpio_set(port, bit, v)
 
-#define ao_gpio_get(port, bit, pin) stm_gpio_get(port, bit)
+#define ao_gpio_get(port, bit) stm_gpio_get(port, bit)
 
-#define ao_enable_output(port,bit,pin,v) do {			\
+#define ao_enable_output(port,bit,v) do {			\
 		ao_enable_port(port);				\
-		ao_gpio_set(port, bit, pin, v);			\
+		ao_gpio_set(port, bit, v);			\
 		stm_moder_set(port, bit, STM_MODER_OUTPUT);\
 	} while (0)
 
@@ -185,7 +238,7 @@ static inline void ao_disable_port(struct stm_gpio *port)
 	} while (0)
 
 #define ao_enable_cs(port,bit) do {				\
-		ao_enable_output(port, bit, pin, 1);		\
+		ao_enable_output(port, bit, 1);		\
 	} while (0)
 
 #define ao_spi_init_cs(port, mask) do {				\
@@ -259,11 +312,43 @@ void
 ao_i2c_init(void);
 
 /* ao_serial_stm.c */
+
+#if USE_SERIAL_1_FLOW && USE_SERIAL_1_SW_FLOW || USE_SERIAL_2_FLOW && USE_SERIAL_2_SW_FLOW
+#define HAS_SERIAL_SW_FLOW	1
+#else
+#define HAS_SERIAL_SW_FLOW	0
+#endif
+
+#if USE_SERIAL_2_FLOW && !USE_SERIAL_2_SW_FLOW
+#define USE_SERIAL_2_HW_FLOW	1
+#endif
+
+#if USE_SERIAL_1_FLOW && !USE_SERIAL_1_SW_FLOW
+#define USE_SERIAL_1_HW_FLOW	1
+#endif
+
+#if USE_SERIAL_1_HW_FLOW || USE_SERIAL_2_HW_FLOW
+#define HAS_SERIAL_HW_FLOW	1
+#else
+#define HAS_SERIAL_HW_FLOW	0
+#endif
+
 struct ao_stm_usart {
 	struct ao_fifo		rx_fifo;
 	struct ao_fifo		tx_fifo;
 	struct stm_usart	*reg;
-	uint8_t			tx_started;
+	uint8_t			tx_running;
+	uint8_t			draining;
+#if HAS_SERIAL_SW_FLOW
+	/* RTS - 0 if we have FIFO space, 1 if not
+	 * CTS - 0 if we can send, 0 if not
+	 */
+	struct stm_gpio		*gpio_rts;
+	struct stm_gpio		*gpio_cts;
+	uint8_t			pin_rts;
+	uint8_t			pin_cts;
+	uint8_t			rts;
+#endif
 };
 
 #if HAS_SERIAL_1
@@ -296,7 +381,7 @@ ao_arch_irqrestore(uint32_t primask) {
 }
 
 static inline void
-ao_arch_memory_barrier() {
+ao_arch_memory_barrier(void) {
 	asm volatile("" ::: "memory");
 }
 
@@ -304,7 +389,7 @@ ao_arch_memory_barrier() {
 static inline void
 ao_arch_init_stack(struct ao_task *task, void *start)
 {
-	uint32_t	*sp = (uint32_t *) (task->stack + AO_STACK_SIZE);
+	uint32_t	*sp = &task->stack32[AO_STACK_SIZE >> 2];
 	uint32_t	a = (uint32_t) start;
 	int		i;
 
@@ -322,7 +407,7 @@ ao_arch_init_stack(struct ao_task *task, void *start)
 	/* PRIMASK with interrupts enabled */
 	ARM_PUSH32(sp, 0);
 
-	task->sp = sp;
+	task->sp32 = sp;
 }
 
 static inline void ao_arch_save_regs(void) {
@@ -341,17 +426,14 @@ static inline void ao_arch_save_regs(void) {
 static inline void ao_arch_save_stack(void) {
 	uint32_t	*sp;
 	asm("mov %0,sp" : "=&r" (sp) );
-	ao_cur_task->sp = (sp);
-	if ((uint8_t *) sp < &ao_cur_task->stack[0])
+	ao_cur_task->sp32 = (sp);
+	if (sp < &ao_cur_task->stack32[0])
 		ao_panic (AO_PANIC_STACK);
 }
 
 static inline void ao_arch_restore_stack(void) {
-	uint32_t	sp;
-	sp = (uint32_t) ao_cur_task->sp;
-
 	/* Switch stacks */
-	asm("mov sp, %0" : : "r" (sp) );
+	asm("mov sp, %0" : : "r" (ao_cur_task->sp32) );
 
 	/* Restore PRIMASK */
 	asm("pop {r0}");
@@ -365,6 +447,31 @@ static inline void ao_arch_restore_stack(void) {
 	asm("pop {r0-r7,pc}\n");
 }
 
+static inline void ao_sleep_mode(void) {
+
+	/*
+	  WFI (Wait for Interrupt) or WFE (Wait for Event) while:
+	   – Set SLEEPDEEP in Cortex ® -M0 System Control register
+	   – Set PDDS bit in Power Control register (PWR_CR)
+	   – Clear WUF bit in Power Control/Status register (PWR_CSR)
+	*/
+
+	ao_arch_block_interrupts();
+
+	stm_scb.scr |= (1 << STM_SCB_SCR_SLEEPDEEP);
+	ao_arch_nop();
+	stm_pwr.cr |= (1 << STM_PWR_CR_PDDS) | (1 << STM_PWR_CR_LPDS);
+	ao_arch_nop();
+	stm_pwr.cr |= (1 << STM_PWR_CR_CWUF);
+	ao_arch_nop();
+	ao_arch_nop();
+	ao_arch_nop();
+	ao_arch_nop();
+	ao_arch_nop();
+	asm("wfi");
+	ao_arch_nop();
+}
+
 #ifndef HAS_SAMPLE_PROFILE
 #define HAS_SAMPLE_PROFILE 0
 #endif
@@ -405,17 +512,22 @@ static inline void ao_arch_start_scheduler(void) {
 /* ao_usb_stm.c */
 
 #if AO_USB_DIRECTIO
-uint16_t *
-ao_usb_alloc(void);
+uint8_t
+ao_usb_alloc(uint16_t *buffers[2]);
 
-void
-ao_usb_free(uint16_t *buffer);
+uint8_t
+ao_usb_alloc2(uint16_t *buffers[2]);
 
-void
-ao_usb_write(uint16_t *buffer, uint16_t len);
+uint8_t
+ao_usb_write(uint16_t len);
 
-void
-ao_usb_write2(uint16_t *buffer, uint16_t len);
+uint8_t
+ao_usb_write2(uint16_t len);
 #endif /* AO_USB_DIRECTIO */
 
+void start(void);
+
+void
+ao_debug_out(char c);
+
 #endif /* _AO_ARCH_FUNCS_H_ */