X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fstmf0%2Fao_arch_funcs.h;h=a0c6e08876cbb012e350b18dc585e02346db9c7c;hp=9233f0440eb9d8c6f49c62dee60281f9dfd8e273;hb=4d4f018f22a0a9814e675a232b1c4239572bdd9a;hpb=2ef794e60b4f6a6e9cb5e9a14ef732f7d6d36b3d

diff --git a/src/stmf0/ao_arch_funcs.h b/src/stmf0/ao_arch_funcs.h
index 9233f044..a0c6e088 100644
--- a/src/stmf0/ao_arch_funcs.h
+++ b/src/stmf0/ao_arch_funcs.h
@@ -447,6 +447,31 @@ static inline void ao_arch_restore_stack(void) {
 	asm("pop {r0-r7,pc}\n");
 }
 
+static inline void ao_sleep_mode(void) {
+
+	/*
+	  WFI (Wait for Interrupt) or WFE (Wait for Event) while:
+	   – Set SLEEPDEEP in Cortex ® -M0 System Control register
+	   – Set PDDS bit in Power Control register (PWR_CR)
+	   – Clear WUF bit in Power Control/Status register (PWR_CSR)
+	*/
+
+	ao_arch_block_interrupts();
+
+	stm_scb.scr |= (1 << STM_SCB_SCR_SLEEPDEEP);
+	ao_arch_nop();
+	stm_pwr.cr |= (1 << STM_PWR_CR_PDDS) | (1 << STM_PWR_CR_LPDS);
+	ao_arch_nop();
+	stm_pwr.cr |= (1 << STM_PWR_CR_CWUF);
+	ao_arch_nop();
+	ao_arch_nop();
+	ao_arch_nop();
+	ao_arch_nop();
+	ao_arch_nop();
+	asm("wfi");
+	ao_arch_nop();
+}
+
 #ifndef HAS_SAMPLE_PROFILE
 #define HAS_SAMPLE_PROFILE 0
 #endif