X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fstm%2Fstm32l.h;h=5741a846c573a3b65f41599e90bb2d2df8481473;hp=463125e25f19ebea5472adbd1c0cab57eaa407ff;hb=49ce3e9a2eb4e1918773b80c355d720a3dadc7e0;hpb=1085ec5d57e0ed5d132f2bbdac1a0b6a32c0ab4a diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h index 463125e2..5741a846 100644 --- a/src/stm/stm32l.h +++ b/src/stm/stm32l.h @@ -52,7 +52,32 @@ stm_moder_set(struct stm_gpio *gpio, int pin, vuint32_t value) { ~(STM_MODER_MASK << STM_MODER_SHIFT(pin))) | value << STM_MODER_SHIFT(pin)); } - + +static inline uint32_t +stm_spread_mask(uint16_t mask) { + uint32_t m = mask; + + /* 0000000000000000mmmmmmmmmmmmmmmm */ + m = (m & 0xff) | ((m & 0xff00) << 8); + /* 00000000mmmmmmmm00000000mmmmmmmm */ + m = (m & 0x000f000f) | ((m & 0x00f000f0) << 4); + /* 0000mmmm0000mmmm0000mmmm0000mmmm */ + m = (m & 0x03030303) | ((m & 0x0c0c0c0c) << 2); + /* 00mm00mm00mm00mm00mm00mm00mm00mm */ + m = (m & 0x11111111) | ((m & 0x22222222) << 2); + /* 0m0m0m0m0m0m0m0m0m0m0m0m0m0m0m0m */ + return m; +} + +static inline void +stm_moder_set_mask(struct stm_gpio *gpio, uint16_t mask, uint32_t value) { + uint32_t bits32 = stm_spread_mask(mask); + uint32_t mask32 = 3 * bits32; + uint32_t value32 = (value & 3) * bits32; + + gpio->moder = ((gpio->moder & ~mask32) | value32); +} + static inline uint32_t stm_moder_get(struct stm_gpio *gpio, int pin) { return (gpio->moder >> STM_MODER_SHIFT(pin)) & STM_MODER_MASK; @@ -69,7 +94,7 @@ stm_otyper_set(struct stm_gpio *gpio, int pin, vuint32_t value) { ~(STM_OTYPER_MASK << STM_OTYPER_SHIFT(pin))) | value << STM_OTYPER_SHIFT(pin)); } - + static inline uint32_t stm_otyper_get(struct stm_gpio *gpio, int pin) { return (gpio->otyper >> STM_OTYPER_SHIFT(pin)) & STM_OTYPER_MASK; @@ -83,12 +108,21 @@ stm_otyper_get(struct stm_gpio *gpio, int pin) { #define STM_OSPEEDR_40MHz 3 static inline void -stm_ospeedr_set(struct stm_gpio *gpio, int pin, vuint32_t value) { +stm_ospeedr_set(struct stm_gpio *gpio, int pin, uint32_t value) { gpio->ospeedr = ((gpio->ospeedr & ~(STM_OSPEEDR_MASK << STM_OSPEEDR_SHIFT(pin))) | value << STM_OSPEEDR_SHIFT(pin)); } - + +static inline void +stm_ospeedr_set_mask(struct stm_gpio *gpio, uint16_t mask, uint32_t value) { + uint32_t bits32 = stm_spread_mask(mask); + uint32_t mask32 = 3 * bits32; + uint32_t value32 = (value & 3) * bits32; + + gpio->ospeedr = ((gpio->ospeedr & ~mask32) | value32); +} + static inline uint32_t stm_ospeedr_get(struct stm_gpio *gpio, int pin) { return (gpio->ospeedr >> STM_OSPEEDR_SHIFT(pin)) & STM_OSPEEDR_MASK; @@ -107,7 +141,16 @@ stm_pupdr_set(struct stm_gpio *gpio, int pin, uint32_t value) { ~(STM_PUPDR_MASK << STM_PUPDR_SHIFT(pin))) | value << STM_PUPDR_SHIFT(pin)); } - + +static inline void +stm_pupdr_set_mask(struct stm_gpio *gpio, uint16_t mask, uint32_t value) { + uint32_t bits32 = stm_spread_mask(mask); + uint32_t mask32 = 3 * bits32; + uint32_t value32 = (value & 3) * bits32; + + gpio->pupdr = (gpio->pupdr & ~mask32) | value32; +} + static inline uint32_t stm_pupdr_get(struct stm_gpio *gpio, int pin) { return (gpio->pupdr >> STM_PUPDR_SHIFT(pin)) & STM_PUPDR_MASK; @@ -167,6 +210,12 @@ stm_gpio_set(struct stm_gpio *gpio, int pin, uint8_t value) { gpio->bsrr = ((uint32_t) (value ^ 1) << (pin + 16)) | ((uint32_t) value << pin); } +static inline void +stm_gpio_set_mask(struct stm_gpio *gpio, uint16_t bits, uint16_t mask) { + /* Use the bit set/reset register to do this atomically */ + gpio->bsrr = ((uint32_t) (~bits & mask) << 16) | ((uint32_t) (bits & mask)); +} + static inline void stm_gpio_set_bits(struct stm_gpio *gpio, uint16_t bits) { gpio->bsrr = bits; @@ -192,15 +241,14 @@ stm_gpio_get_all(struct stm_gpio *gpio) { * ao_enable_gpio macro will expand into a huge pile of code * as the compiler won't do correct constant folding and * dead-code elimination + */ - extern struct stm_gpio stm_gpioa; - extern struct stm_gpio stm_gpiob; - extern struct stm_gpio stm_gpioc; - extern struct stm_gpio stm_gpiod; - extern struct stm_gpio stm_gpioe; - extern struct stm_gpio stm_gpioh; - -*/ +extern struct stm_gpio stm_gpioa; +extern struct stm_gpio stm_gpiob; +extern struct stm_gpio stm_gpioc; +extern struct stm_gpio stm_gpiod; +extern struct stm_gpio stm_gpioe; +extern struct stm_gpio stm_gpioh; #define stm_gpioh (*((struct stm_gpio *) 0x40021400)) #define stm_gpioe (*((struct stm_gpio *) 0x40021000)) @@ -518,7 +566,7 @@ extern struct stm_rcc stm_rcc; #define STM_RCC_CFGR_MCOPRE_DIV_4 2 #define STM_RCC_CFGR_MCOPRE_DIV_8 3 #define STM_RCC_CFGR_MCOPRE_DIV_16 4 -#define STM_RCC_CFGR_MCOPRE_DIV_MASK 7 +#define STM_RCC_CFGR_MCOPRE_MASK 7 #define STM_RCC_CFGR_MCOSEL (24) #define STM_RCC_CFGR_MCOSEL_DISABLE 0 @@ -897,7 +945,11 @@ struct stm_nvic { vuint32_t sc; /* 0xc10 0xe000ed10 System Control Register */ vuint32_t cc; /* 0xc14 0xe000ed14 Configuration Control Register */ - uint8_t _unusedc18[0xe00 - 0xc18]; + vuint32_t shpr7_4; /* 0xc18 0xe000ed18 System Hander Priority Registers */ + vuint32_t shpr11_8; /* 0xc1c */ + vuint32_t shpr15_12; /* 0xc20 */ + + uint8_t _unusedc18[0xe00 - 0xc24]; vuint32_t stir; /* 0xe00 */ }; @@ -1051,64 +1103,67 @@ extern struct stm_mpu stm_mpu; #define STM_MPU_RASR_SIZE_MASK 0x1f #define STM_MPU_RASR_ENABLE 0 -#define isr(name) void stm_ ## name ## _isr(void); - -isr(nmi) -isr(hardfault) -isr(memmanage) -isr(busfault) -isr(usagefault) -isr(svc) -isr(debugmon) -isr(pendsv) -isr(systick) -isr(wwdg) -isr(pvd) -isr(tamper_stamp) -isr(rtc_wkup) -isr(flash) -isr(rcc) -isr(exti0) -isr(exti1) -isr(exti2) -isr(exti3) -isr(exti4) -isr(dma1_channel1) -isr(dma1_channel2) -isr(dma1_channel3) -isr(dma1_channel4) -isr(dma1_channel5) -isr(dma1_channel6) -isr(dma1_channel7) -isr(adc1) -isr(usb_hp) -isr(usb_lp) -isr(dac) -isr(comp) -isr(exti9_5) -isr(lcd) -isr(tim9) -isr(tim10) -isr(tim11) -isr(tim2) -isr(tim3) -isr(tim4) -isr(i2c1_ev) -isr(i2c1_er) -isr(i2c2_ev) -isr(i2c2_er) -isr(spi1) -isr(spi2) -isr(usart1) -isr(usart2) -isr(usart3) -isr(exti15_10) -isr(rtc_alarm) -isr(usb_fs_wkup) -isr(tim6) -isr(tim7) - -#undef isr +#define isr_decl(name) void stm_ ## name ## _isr(void) + +isr_decl(halt); +isr_decl(ignore); + +isr_decl(nmi); +isr_decl(hardfault); +isr_decl(memmanage); +isr_decl(busfault); +isr_decl(usagefault); +isr_decl(svc); +isr_decl(debugmon); +isr_decl(pendsv); +isr_decl(systick); +isr_decl(wwdg); +isr_decl(pvd); +isr_decl(tamper_stamp); +isr_decl(rtc_wkup); +isr_decl(flash); +isr_decl(rcc); +isr_decl(exti0); +isr_decl(exti1); +isr_decl(exti2); +isr_decl(exti3); +isr_decl(exti4); +isr_decl(dma1_channel1); +isr_decl(dma1_channel2); +isr_decl(dma1_channel3); +isr_decl(dma1_channel4); +isr_decl(dma1_channel5); +isr_decl(dma1_channel6); +isr_decl(dma1_channel7); +isr_decl(adc1); +isr_decl(usb_hp); +isr_decl(usb_lp); +isr_decl(dac); +isr_decl(comp); +isr_decl(exti9_5); +isr_decl(lcd); +isr_decl(tim9); +isr_decl(tim10); +isr_decl(tim11); +isr_decl(tim2); +isr_decl(tim3); +isr_decl(tim4); +isr_decl(i2c1_ev); +isr_decl(i2c1_er); +isr_decl(i2c2_ev); +isr_decl(i2c2_er); +isr_decl(spi1); +isr_decl(spi2); +isr_decl(usart1); +isr_decl(usart2); +isr_decl(usart3); +isr_decl(exti15_10); +isr_decl(rtc_alarm); +isr_decl(usb_fs_wkup); +isr_decl(tim6); +isr_decl(tim7); + +#undef isr_decl #define STM_ISR_WWDG_POS 0 #define STM_ISR_PVD_POS 1 @@ -1401,6 +1456,9 @@ struct stm_adc { extern struct stm_adc stm_adc; +#define STM_ADC_SQ_TEMP 16 +#define STM_ADC_SQ_V_REF 17 + #define STM_ADC_SR_JCNR 9 #define STM_ADC_SR_RCNR 8 #define STM_ADC_SR_ADONS 6 @@ -1594,6 +1652,7 @@ extern struct stm_i2c stm_i2c1, stm_i2c2; #define STM_I2C_CR2_FREQ_4_MHZ 4 #define STM_I2C_CR2_FREQ_8_MHZ 8 #define STM_I2C_CR2_FREQ_16_MHZ 16 +#define STM_I2C_CR2_FREQ_24_MHZ 24 #define STM_I2C_CR2_FREQ_32_MHZ 32 #define STM_I2C_CR2_FREQ_MASK 0x3f @@ -1740,6 +1799,20 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4; #define STM_TIM234_SMCR_SMS_EXTERNAL_CLOCK 7 #define STM_TIM234_SMCR_SMS_MASK 7 +#define STM_TIM234_DIER_TDE 14 +#define STM_TIM234_DIER_CC4DE 12 +#define STM_TIM234_DIER_CC3DE 11 +#define STM_TIM234_DIER_CC2DE 10 +#define STM_TIM234_DIER_CC1DE 9 +#define STM_TIM234_DIER_UDE 8 + +#define STM_TIM234_DIER_TIE 6 +#define STM_TIM234_DIER_CC4IE 4 +#define STM_TIM234_DIER_CC3IE 3 +#define STM_TIM234_DIER_CC2IE 2 +#define STM_TIM234_DIER_CC1IE 1 +#define STM_TIM234_DIER_UIE 0 + #define STM_TIM234_SR_CC4OF 12 #define STM_TIM234_SR_CC3OF 11 #define STM_TIM234_SR_CC2OF 10 @@ -1840,15 +1913,23 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4; #define STM_TIM234_CCER_CC4NP 15 #define STM_TIM234_CCER_CC4P 13 +#define STM_TIM234_CCER_CC4P_ACTIVE_HIGH 0 +#define STM_TIM234_CCER_CC4P_ACTIVE_LOW 1 #define STM_TIM234_CCER_CC4E 12 #define STM_TIM234_CCER_CC3NP 11 #define STM_TIM234_CCER_CC3P 9 +#define STM_TIM234_CCER_CC3P_ACTIVE_HIGH 0 +#define STM_TIM234_CCER_CC3P_ACTIVE_LOW 1 #define STM_TIM234_CCER_CC3E 8 #define STM_TIM234_CCER_CC2NP 7 #define STM_TIM234_CCER_CC2P 5 +#define STM_TIM234_CCER_CC2P_ACTIVE_HIGH 0 +#define STM_TIM234_CCER_CC2P_ACTIVE_LOW 1 #define STM_TIM234_CCER_CC2E 4 #define STM_TIM234_CCER_CC1NP 3 #define STM_TIM234_CCER_CC1P 1 +#define STM_TIM234_CCER_CC1P_ACTIVE_HIGH 0 +#define STM_TIM234_CCER_CC1P_ACTIVE_LOW 1 #define STM_TIM234_CCER_CC1E 0 struct stm_usb { @@ -1961,7 +2042,7 @@ union stm_usb_bdt { #define STM_USB_BDT_SIZE 8 -extern uint8_t stm_usb_sram[]; +extern uint8_t stm_usb_sram[] __attribute__ ((aligned(4))); struct stm_exti { vuint32_t imr;