X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fstm%2Fstm32l.h;h=310b334bae22a64171e66eb6cd6596f9e49240f7;hp=5741a846c573a3b65f41599e90bb2d2df8481473;hb=5d3436ed8551537287dc6cf418f93b0989e1aee8;hpb=49ce3e9a2eb4e1918773b80c355d720a3dadc7e0

diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h
index 5741a846..310b334b 100644
--- a/src/stm/stm32l.h
+++ b/src/stm/stm32l.h
@@ -1871,6 +1871,51 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_CCMR1_CC1S_INPUT_TRC		3
 #define  STM_TIM234_CCMR1_CC1S_MASK			3
 
+#define STM_TIM234_CCMR1_IC2F	12
+#define  STM_TIM234_CCMR1_IC2F_NONE			0
+#define  STM_TIM234_CCMR1_IC2F_CK_INT_N_2		1
+#define  STM_TIM234_CCMR1_IC2F_CK_INT_N_4		2
+#define  STM_TIM234_CCMR1_IC2F_CK_INT_N_8		3
+#define  STM_TIM234_CCMR1_IC2F_DTS_2_N_6		4
+#define  STM_TIM234_CCMR1_IC2F_DTS_2_N_8		5
+#define  STM_TIM234_CCMR1_IC2F_DTS_4_N_6		6
+#define  STM_TIM234_CCMR1_IC2F_DTS_4_N_8		7
+#define  STM_TIM234_CCMR1_IC2F_DTS_8_N_6		8
+#define  STM_TIM234_CCMR1_IC2F_DTS_8_N_8		9
+#define  STM_TIM234_CCMR1_IC2F_DTS_16_N_5		10
+#define  STM_TIM234_CCMR1_IC2F_DTS_16_N_6		11
+#define  STM_TIM234_CCMR1_IC2F_DTS_16_N_8		12
+#define  STM_TIM234_CCMR1_IC2F_DTS_32_N_5		13
+#define  STM_TIM234_CCMR1_IC2F_DTS_32_N_6		14
+#define  STM_TIM234_CCMR1_IC2F_DTS_32_N_8		15
+#define STM_TIM234_CCMR1_IC2PSC	10
+#define  STM_TIM234_CCMR1_IC2PSC_NONE			0
+#define  STM_TIM234_CCMR1_IC2PSC_2			1
+#define  STM_TIM234_CCMR1_IC2PSC_4			2
+#define  STM_TIM234_CCMR1_IC2PSC_8			3
+#define STM_TIM234_CCMR1_IC1F	4
+#define  STM_TIM234_CCMR1_IC1F_NONE			0
+#define  STM_TIM234_CCMR1_IC1F_CK_INT_N_2		1
+#define  STM_TIM234_CCMR1_IC1F_CK_INT_N_4		2
+#define  STM_TIM234_CCMR1_IC1F_CK_INT_N_8		3
+#define  STM_TIM234_CCMR1_IC1F_DTS_2_N_6		4
+#define  STM_TIM234_CCMR1_IC1F_DTS_2_N_8		5
+#define  STM_TIM234_CCMR1_IC1F_DTS_4_N_6		6
+#define  STM_TIM234_CCMR1_IC1F_DTS_4_N_8		7
+#define  STM_TIM234_CCMR1_IC1F_DTS_8_N_6		8
+#define  STM_TIM234_CCMR1_IC1F_DTS_8_N_8		9
+#define  STM_TIM234_CCMR1_IC1F_DTS_16_N_5		10
+#define  STM_TIM234_CCMR1_IC1F_DTS_16_N_6		11
+#define  STM_TIM234_CCMR1_IC1F_DTS_16_N_8		12
+#define  STM_TIM234_CCMR1_IC1F_DTS_32_N_5		13
+#define  STM_TIM234_CCMR1_IC1F_DTS_32_N_6		14
+#define  STM_TIM234_CCMR1_IC1F_DTS_32_N_8		15
+#define STM_TIM234_CCMR1_IC1PSC	2
+#define  STM_TIM234_CCMR1_IC1PSC_NONE			0
+#define  STM_TIM234_CCMR1_IC1PSC_2			1
+#define  STM_TIM234_CCMR1_IC1PSC_4			2
+#define  STM_TIM234_CCMR1_IC1PSC_8			3
+
 #define STM_TIM234_CCMR2_OC4CE	15
 #define STM_TIM234_CCMR2_OC4M	12
 #define  STM_TIM234_CCMR2_OC4M_FROZEN			0