X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fstm%2Fao_timer.c;h=9e9436cfa685dae451ae27ff59b8c9af6b32be1c;hp=5cf1e4a87dd37ab88be0c562e38ff1b78f699384;hb=c6e57291d91f1f6c4de5c54a5cfd3eef66d9f830;hpb=6802b6a65b1fec06c2c873282be792c40b3c8f5e diff --git a/src/stm/ao_timer.c b/src/stm/ao_timer.c index 5cf1e4a8..9e9436cf 100644 --- a/src/stm/ao_timer.c +++ b/src/stm/ao_timer.c @@ -3,7 +3,8 @@ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of @@ -17,11 +18,16 @@ #include "ao.h" #include +#if HAS_FAKE_FLIGHT +#include +#endif #ifndef HAS_TICK #define HAS_TICK 1 #endif +#if HAS_TICK || defined(AO_TIMER_HOOK) + #if HAS_TICK volatile AO_TICK_TYPE ao_tick_count; @@ -30,16 +36,20 @@ ao_time(void) { return ao_tick_count; } +#endif #if AO_DATA_ALL -volatile __data uint8_t ao_data_interval = 1; -volatile __data uint8_t ao_data_count; +volatile uint8_t ao_data_interval = 1; +volatile uint8_t ao_data_count; #endif void stm_systick_isr(void) { + ao_validate_cur_stack(); if (stm_systick.csr & (1 << STM_SYSTICK_CSR_COUNTFLAG)) { +#if HAS_TICK ++ao_tick_count; +#endif #if HAS_TASK_QUEUE if (ao_task_alarm_tick && (int16_t) (ao_tick_count - ao_task_alarm_tick) >= 0) ao_task_check_alarm((uint16_t) ao_tick_count); @@ -47,11 +57,19 @@ void stm_systick_isr(void) #if AO_DATA_ALL if (++ao_data_count == ao_data_interval) { ao_data_count = 0; - ao_adc_poll(); +#if HAS_FAKE_FLIGHT + if (ao_fake_flight_active) + ao_fake_flight_poll(); + else +#endif + ao_adc_poll(); #if (AO_DATA_ALL & ~(AO_DATA_ADC)) ao_wakeup((void *) &ao_data_count); #endif } +#endif +#ifdef AO_TIMER_HOOK + AO_TIMER_HOOK; #endif } } @@ -77,6 +95,7 @@ ao_timer_init(void) stm_systick.csr = ((1 << STM_SYSTICK_CSR_ENABLE) | (1 << STM_SYSTICK_CSR_TICKINT) | (STM_SYSTICK_CSR_CLKSOURCE_HCLK_8 << STM_SYSTICK_CSR_CLKSOURCE)); + stm_nvic.shpr15_12 |= AO_STM_NVIC_CLOCK_PRIORITY << 24; } #endif @@ -90,7 +109,15 @@ ao_clock_init(void) /* Switch to MSI while messing about */ stm_rcc.cr |= (1 << STM_RCC_CR_MSION); while (!(stm_rcc.cr & (1 << STM_RCC_CR_MSIRDY))) - asm("nop"); + ao_arch_nop(); + + stm_rcc.cfgr = (stm_rcc.cfgr & ~(STM_RCC_CFGR_SW_MASK << STM_RCC_CFGR_SW)) | + (STM_RCC_CFGR_SW_MSI << STM_RCC_CFGR_SW); + + /* wait for system to switch to MSI */ + while ((stm_rcc.cfgr & (STM_RCC_CFGR_SWS_MASK << STM_RCC_CFGR_SWS)) != + (STM_RCC_CFGR_SWS_MSI << STM_RCC_CFGR_SWS)) + ao_arch_nop(); /* reset SW, HPRE, PPRE1, PPRE2, MCOSEL and MCOPRE */ stm_rcc.cfgr &= (uint32_t)0x88FFC00C; @@ -127,7 +154,7 @@ ao_clock_init(void) #define STM_RCC_CFGR_PLLSRC_TARGET_CLOCK (0 << STM_RCC_CFGR_PLLSRC) #endif -#if !AO_HSE || HAS_ADC +#if !AO_HSE || HAS_ADC || HAS_ADC_SINGLE /* Enable HSI RC clock 16MHz */ stm_rcc.cr |= (1 << STM_RCC_CR_HSION); while (!(stm_rcc.cr & (1 << STM_RCC_CR_HSIRDY))) @@ -141,7 +168,6 @@ ao_clock_init(void) stm_flash.acr |= (1 << STM_FLASH_ACR_PRFEN); /* Enable 1 wait state so the CPU can run at 32MHz */ - /* (haven't managed to run the CPU at 32MHz yet, it's at 16MHz) */ stm_flash.acr |= (1 << STM_FLASH_ACR_LATENCY); /* Enable power interface clock */