X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fstm%2Fao_arch_funcs.h;h=d2cc11201a7e7c550d36985d9ef0df871d61764e;hp=b294c379ee7a330efe1161e683c4b660a1fbcc58;hb=HEAD;hpb=09f8710eb320f37f20dda8c635497c2b505d25e2

diff --git a/src/stm/ao_arch_funcs.h b/src/stm/ao_arch_funcs.h
index b294c379..0f2f36a6 100644
--- a/src/stm/ao_arch_funcs.h
+++ b/src/stm/ao_arch_funcs.h
@@ -24,20 +24,30 @@
 
 /* PCLK is set to 16MHz (HCLK 32MHz, APB prescaler 2) */
 
-#define AO_SPI_SPEED_8MHz	STM_SPI_CR1_BR_PCLK_2
-#define AO_SPI_SPEED_4MHz	STM_SPI_CR1_BR_PCLK_4
-#define AO_SPI_SPEED_2MHz	STM_SPI_CR1_BR_PCLK_8
-#define AO_SPI_SPEED_1MHz	STM_SPI_CR1_BR_PCLK_16
-#define AO_SPI_SPEED_500kHz	STM_SPI_CR1_BR_PCLK_32
-#define AO_SPI_SPEED_250kHz	STM_SPI_CR1_BR_PCLK_64
-#define AO_SPI_SPEED_125kHz	STM_SPI_CR1_BR_PCLK_128
-#define AO_SPI_SPEED_62500Hz	STM_SPI_CR1_BR_PCLK_256
+//#define AO_SPI_SPEED_8MHz	STM_SPI_CR1_BR_PCLK_2	/* too fast to use safely */
+#define _AO_SPI_SPEED_4MHz	STM_SPI_CR1_BR_PCLK_4
+#define _AO_SPI_SPEED_2MHz	STM_SPI_CR1_BR_PCLK_8
+#define _AO_SPI_SPEED_1MHz	STM_SPI_CR1_BR_PCLK_16
+#define _AO_SPI_SPEED_500kHz	STM_SPI_CR1_BR_PCLK_32
+#define _AO_SPI_SPEED_250kHz	STM_SPI_CR1_BR_PCLK_64
+#define _AO_SPI_SPEED_125kHz	STM_SPI_CR1_BR_PCLK_128
+#define _AO_SPI_SPEED_62500Hz	STM_SPI_CR1_BR_PCLK_256
 
-#define AO_SPI_SPEED_FAST	AO_SPI_SPEED_8MHz
-
-/* Companion bus wants something no faster than 200kHz */
+static inline uint32_t
+ao_spi_speed(int index, uint32_t hz)
+{
+	(void) index;
+	if (hz >= 4000000) return _AO_SPI_SPEED_4MHz;
+	if (hz >= 2000000) return _AO_SPI_SPEED_2MHz;
+	if (hz >= 1000000) return _AO_SPI_SPEED_1MHz;
+	if (hz >=  500000) return _AO_SPI_SPEED_500kHz;
+	if (hz >=  250000) return _AO_SPI_SPEED_250kHz;
+	if (hz >=  125000) return _AO_SPI_SPEED_125kHz;
+	return _AO_SPI_SPEED_62500Hz;
+}
 
-#define AO_SPI_SPEED_200kHz	AO_SPI_SPEED_125kHz
+#define AO_SPI_CPOL_BIT		4
+#define AO_SPI_CPHA_BIT		5
 
 #define AO_SPI_CONFIG_1		0x00
 #define AO_SPI_1_CONFIG_PA5_PA6_PA7	AO_SPI_CONFIG_1
@@ -64,6 +74,15 @@
 
 #define AO_SPI_INDEX(id)	((id) & AO_SPI_INDEX_MASK)
 #define AO_SPI_CONFIG(id)	((id) & AO_SPI_CONFIG_MASK)
+#define AO_SPI_PIN_CONFIG(id)	((id) & (AO_SPI_INDEX_MASK | AO_SPI_CONFIG_MASK))
+#define AO_SPI_CPOL(id)		((uint32_t) (((id) >> AO_SPI_CPOL_BIT) & 1))
+#define AO_SPI_CPHA(id)		((uint32_t) (((id) >> AO_SPI_CPHA_BIT) & 1))
+
+#define AO_SPI_MAKE_MODE(pol,pha)	(((pol) << AO_SPI_CPOL_BIT) | ((pha) << AO_SPI_CPHA_BIT))
+#define AO_SPI_MODE_0		AO_SPI_MAKE_MODE(0,0)
+#define AO_SPI_MODE_1		AO_SPI_MAKE_MODE(0,1)
+#define AO_SPI_MODE_2		AO_SPI_MAKE_MODE(1,0)
+#define AO_SPI_MODE_3		AO_SPI_MAKE_MODE(1,1)
 
 uint8_t
 ao_spi_try_get(uint8_t spi_index, uint32_t speed, uint8_t task_id);
@@ -74,6 +93,9 @@ ao_spi_get(uint8_t spi_index, uint32_t speed);
 void
 ao_spi_put(uint8_t spi_index);
 
+void
+ao_spi_put_pins(uint8_t spi_index);
+
 void
 ao_spi_send(const void *block, uint16_t len, uint8_t spi_index);
 
@@ -130,7 +152,7 @@ ao_spi_recv_byte(uint8_t spi_index)
 	stm_spi->dr = 0xff;
 	while (!(stm_spi->sr & (1 << STM_SPI_SR_RXNE)))
 		;
-	return stm_spi->dr;
+	return (uint8_t) stm_spi->dr;
 }
 
 void
@@ -139,8 +161,6 @@ ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
 void
 ao_spi_duplex(const void *out, void *in, uint16_t len, uint8_t spi_index);
 
-extern uint16_t	ao_spi_speed[STM_NUM_SPI];
-
 void
 ao_spi_init(void);
 
@@ -166,8 +186,8 @@ ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t s
 		ao_spi_put(bus);		\
 	} while (0)
 
-#define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
-#define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
+#define ao_spi_get_bit(reg,bit,bus,speed) ao_spi_get_mask(reg,1<<(bit),bus,speed)
+#define ao_spi_put_bit(reg,bit,bus) ao_spi_put_mask(reg,1<<(bit),bus)
 
 #define ao_enable_port(port) do {					\
 		if ((port) == &stm_gpioa)				\
@@ -184,37 +204,46 @@ ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t s
 
 #define ao_disable_port(port) do {					\
 		if ((port) == &stm_gpioa)				\
-			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOAEN); \
+			stm_rcc.ahbenr &= ~(1UL << STM_RCC_AHBENR_GPIOAEN); \
 		else if ((port) == &stm_gpiob)				\
-			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOBEN); \
+			stm_rcc.ahbenr &= ~(1UL << STM_RCC_AHBENR_GPIOBEN); \
 		else if ((port) == &stm_gpioc)				\
-			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOCEN); \
+			stm_rcc.ahbenr &= ~(1UL << STM_RCC_AHBENR_GPIOCEN); \
 		else if ((port) == &stm_gpiod)				\
-			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIODEN); \
+			stm_rcc.ahbenr &= ~(1UL << STM_RCC_AHBENR_GPIODEN); \
 		else if ((port) == &stm_gpioe)				\
-			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOEEN); \
+			stm_rcc.ahbenr &= ~(1UL << STM_RCC_AHBENR_GPIOEEN); \
 	} while (0)
 
 
-#define ao_gpio_set(port, bit, pin, v) stm_gpio_set(port, bit, v)
+#define ao_gpio_set(port, bit, v) stm_gpio_set(port, bit, v)
 
-#define ao_gpio_get(port, bit, pin) stm_gpio_get(port, bit)
+#define ao_gpio_get(port, bit) stm_gpio_get(port, bit)
 
 #define ao_gpio_set_bits(port, bits) stm_gpio_set_bits(port, bits)
 
+#define ao_gpio_set_mask(port, bits, mask) stm_gpio_set_mask(port, bits, mask)
+
 #define ao_gpio_clr_bits(port, bits) stm_gpio_clr_bits(port, bits);
 
+#define ao_gpio_get_all(port) stm_gpio_get_all(port)
 
-#define ao_enable_output(port,bit,pin,v) do {			\
+#define ao_enable_output(port,bit,v) do {			\
 		ao_enable_port(port);				\
-		ao_gpio_set(port, bit, pin, v);			\
+		ao_gpio_set(port, bit, v);			\
 		stm_moder_set(port, bit, STM_MODER_OUTPUT);\
 	} while (0)
 
+#define ao_enable_output_mask(port,bits,mask) do {		\
+		ao_enable_port(port);				\
+		ao_gpio_set_mask(port, bits, mask);		\
+		ao_set_output_mask(port, mask);			\
+	} while (0)
+
 #define AO_OUTPUT_PUSH_PULL	STM_OTYPER_PUSH_PULL
 #define AO_OUTPUT_OPEN_DRAIN	STM_OTYPER_OPEN_DRAIN
 
-#define ao_gpio_set_output_mode(port,bit,pin,mode) \
+#define ao_gpio_set_output_mode(port,pin,mode) \
 	stm_otyper_set(port, pin, mode)
 
 #define ao_gpio_set_mode(port,bit,mode) do {				\
@@ -226,35 +255,72 @@ ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t s
 			stm_pupdr_set(port, bit, STM_PUPDR_NONE);	\
 	} while (0)
 
+#define ao_gpio_set_mode_mask(port,mask,mode) do {			\
+		if (mode == AO_EXTI_MODE_PULL_UP)			\
+			stm_pupdr_set_mask(port, mask, STM_PUPDR_PULL_UP); \
+		else if (mode == AO_EXTI_MODE_PULL_DOWN)		\
+			stm_pupdr_set_mask(port, mask, STM_PUPDR_PULL_DOWN); \
+		else							\
+			stm_pupdr_set_mask(port, mask, STM_PUPDR_NONE);	\
+	} while (0)
+
+#define ao_set_input(port, bit) do {				\
+		stm_moder_set(port, bit, STM_MODER_INPUT);	\
+	} while (0)
+
+#define ao_set_output(port, bit, v) do {			\
+		ao_gpio_set(port, bit, v);			\
+		stm_moder_set(port, bit, STM_MODER_OUTPUT);	\
+	} while (0)
+
+#define ao_set_output_mask(port, mask) do {			\
+		stm_moder_set_mask(port, mask, STM_MODER_OUTPUT);	\
+	} while (0)
+
+#define ao_set_input_mask(port, mask) do {				\
+		stm_moder_set_mask(port, mask, STM_MODER_INPUT);	\
+	} while (0)
+
 #define ao_enable_input(port,bit,mode) do {				\
 		ao_enable_port(port);					\
-		stm_moder_set(port, bit, STM_MODER_INPUT);		\
+		ao_set_input(port, bit);				\
 		ao_gpio_set_mode(port, bit, mode);			\
 	} while (0)
 
-#define ao_enable_cs(port,bit) do {				\
+#define ao_enable_input_mask(port,mask,mode) do {	\
+		ao_enable_port(port);			\
+		ao_gpio_set_mode_mask(port, mask, mode);	\
+		ao_set_input_mask(port, mask);		\
+	} while (0)
+
+#define _ao_enable_cs(port, bit) do {				\
 		stm_gpio_set((port), bit, 1);			\
 		stm_moder_set((port), bit, STM_MODER_OUTPUT);	\
 	} while (0)
 
+#define ao_enable_cs(port,bit) do {				\
+		ao_enable_port(port);				\
+		_ao_enable_cs(port, bit);			\
+	} while (0)
+
 #define ao_spi_init_cs(port, mask) do {				\
 		ao_enable_port(port);				\
-		if ((mask) & 0x0001) ao_enable_cs(port, 0);	\
-		if ((mask) & 0x0002) ao_enable_cs(port, 1);	\
-		if ((mask) & 0x0004) ao_enable_cs(port, 2);	\
-		if ((mask) & 0x0008) ao_enable_cs(port, 3);	\
-		if ((mask) & 0x0010) ao_enable_cs(port, 4);	\
-		if ((mask) & 0x0020) ao_enable_cs(port, 5);	\
-		if ((mask) & 0x0040) ao_enable_cs(port, 6);	\
-		if ((mask) & 0x0080) ao_enable_cs(port, 7);	\
-		if ((mask) & 0x0100) ao_enable_cs(port, 8);	\
-		if ((mask) & 0x0200) ao_enable_cs(port, 9);	\
-		if ((mask) & 0x0400) ao_enable_cs(port, 10);\
-		if ((mask) & 0x0800) ao_enable_cs(port, 11);\
-		if ((mask) & 0x1000) ao_enable_cs(port, 12);\
-		if ((mask) & 0x2000) ao_enable_cs(port, 13);\
-		if ((mask) & 0x4000) ao_enable_cs(port, 14);\
-		if ((mask) & 0x8000) ao_enable_cs(port, 15);\
+		if ((mask) & 0x0001) _ao_enable_cs(port, 0);	\
+		if ((mask) & 0x0002) _ao_enable_cs(port, 1);	\
+		if ((mask) & 0x0004) _ao_enable_cs(port, 2);	\
+		if ((mask) & 0x0008) _ao_enable_cs(port, 3);	\
+		if ((mask) & 0x0010) _ao_enable_cs(port, 4);	\
+		if ((mask) & 0x0020) _ao_enable_cs(port, 5);	\
+		if ((mask) & 0x0040) _ao_enable_cs(port, 6);	\
+		if ((mask) & 0x0080) _ao_enable_cs(port, 7);	\
+		if ((mask) & 0x0100) _ao_enable_cs(port, 8);	\
+		if ((mask) & 0x0200) _ao_enable_cs(port, 9);	\
+		if ((mask) & 0x0400) _ao_enable_cs(port, 10);\
+		if ((mask) & 0x0800) _ao_enable_cs(port, 11);\
+		if ((mask) & 0x1000) _ao_enable_cs(port, 12);\
+		if ((mask) & 0x2000) _ao_enable_cs(port, 13);\
+		if ((mask) & 0x4000) _ao_enable_cs(port, 14);\
+		if ((mask) & 0x8000) _ao_enable_cs(port, 15);\
 	} while (0)
 
 /* ao_dma_stm.c
@@ -335,6 +401,9 @@ struct ao_stm_usart {
 #endif
 };
 
+void
+ao_debug_out(char c);
+
 #if HAS_SERIAL_1
 extern struct ao_stm_usart	ao_stm_usart1;
 #endif
@@ -391,7 +460,7 @@ ao_arch_irqrestore(uint32_t basepri) {
 }
 
 static inline void
-ao_arch_memory_barrier() {
+ao_arch_memory_barrier(void) {
 	asm volatile("" ::: "memory");
 }
 
@@ -412,9 +481,8 @@ ao_arch_irq_check(void) {
 
 #if HAS_TASK
 static inline void
-ao_arch_init_stack(struct ao_task *task, void *start)
+ao_arch_init_stack(struct ao_task *task, uint32_t *sp, void *start)
 {
-	uint32_t	*sp = (uint32_t *) ((void*) task->stack + AO_STACK_SIZE);
 	uint32_t	a = (uint32_t) start;
 	int		i;
 
@@ -432,7 +500,7 @@ ao_arch_init_stack(struct ao_task *task, void *start)
 	/* BASEPRI with interrupts enabled */
 	ARM_PUSH32(sp, 0);
 
-	task->sp = sp;
+	task->sp32 = sp;
 }
 
 static inline void ao_arch_save_regs(void) {
@@ -456,12 +524,12 @@ static inline void ao_arch_save_regs(void) {
 static inline void ao_arch_save_stack(void) {
 	uint32_t	*sp;
 	asm("mov %0,sp" : "=&r" (sp) );
-	ao_cur_task->sp = (sp);
+	ao_cur_task->sp32 = (sp);
 }
 
 static inline void ao_arch_restore_stack(void) {
 	/* Switch stacks */
-	asm("mov sp, %0" : : "r" (ao_cur_task->sp) );
+	asm("mov sp, %0" : : "r" (ao_cur_task->sp32) );
 
 #ifdef AO_NONMASK_INTERRUPTS
 	/* Restore BASEPRI */
@@ -498,8 +566,8 @@ ao_validate_cur_stack(void)
 
 	asm("mrs %0,psp" : "=&r" (psp));
 	if (ao_cur_task &&
-	    psp <= ao_cur_task->stack &&
-	    psp >= ao_cur_task->stack - 256)
+	    (psp <= ao_cur_task->stack8 ||
+	     psp >= ao_cur_task->stack8 + AO_STACK_SIZE))
 		ao_panic(AO_PANIC_STACK);
 }
 #endif
@@ -549,4 +617,6 @@ ao_arch_wait_interrupt(void) {
 		ao_arch_irqrestore(__mask);		\
 	} while (0)
 
+void start(void);
+
 #endif /* _AO_ARCH_FUNCS_H_ */